Claims
- 1. A heterojunction light-emitting diode array having a plurality of light-emitting diodes positioned in a desired arrangement on a substrate each diode comprising:
- a superlattice layer on the substrate having alternations of a multiplicity of layers of at least two different semiconductor materials with one of the semiconductor materials having a band gap larger than the other semiconductor materials, and a region of said superlattice layer being doped with an impurity different from that contained in the layers of the superlattice layer to form a diffusion mixed region, the diffusion mixed region forming a light-emitting heterojunction at its interface with the superlattice layer and serving as a window for light generated at the junction, the diffusion mixed region having a larger energy gap than that of the superlattice layer, the superlattice layer having no internal adsorption of the light so as to reduce cross-talk between diodes to thereby improve emission efficiency.
- 2. The diode array of claim 1 wherein the superlattice layer is n-type and the diffusion mixed region is p-type.
- 3. The diode array of claim 1 wherein the superlattice layer is undoped, the diffusion mixed region is doped n-type and further including a second superlattice layer having alternating of a multiplicity of layers of at least two different semiconductor materials which are p-type and which is in contact with the said undoped superlattice layer.
- 4. A heterojunction light-emitting diode array having a plurality of light-emitting diodes positioned in a desired arrangement comprising:
- a substrate;
- a superlattice layer on said substrate, said superlattice layer comprising alternations of a plurality of layers of at least two different semiconductor materials with one of the materials having a band gap larger than the other semiconductor materials; and
- a plurality of spaced regions in said superlattice layer containing a doping impurity different from that in the layers of the superlattice layer to form diffusion mixed regions, each diffusion mixed region forming a light-emitting heterojunction with the superlattice layer and having a larger band gap than that of the superlattice layer;
- each of the diffusion mixed regions serving as a window for the generated light and the superlattice layer having no internal absorptions of the light so as to reduce cross-talk between the diodes in the array to thereby improve emission efficiency.
- 5. The diode array of claim 4 in which the diffusion mixed regions are doped p-type.
- 6. The diode array of claim 5 in which the superlattice layer is doped n-type.
- 7. The diode array of claim 4 in which the superlattice layer is undoped, the diffusion mixed region is doped p-type and further comprising a second superlattice layer of a plurality of layers of at least two different semiconductor materials which is doped n-type between the undoped superlattice layer and the substrate.
Priority Claims (1)
Number |
Date |
Country |
Kind |
1-161791 |
Jun 1989 |
JPX |
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BACKGROUND OF THE INVENTION
1. Field of the Invention
This is a continuation of application Ser. No. 465,696, filed Jan. 16, 1990, now abandoned.
US Referenced Citations (11)
Foreign Referenced Citations (6)
Number |
Date |
Country |
56-42388 |
Apr 1981 |
JPX |
58-154279 |
Sep 1983 |
JPX |
58-223382 |
Dec 1983 |
JPX |
61-199679 |
Sep 1986 |
JPX |
63-128775 |
Jun 1988 |
JPX |
1-32690 |
Feb 1989 |
JPX |
Non-Patent Literature Citations (1)
Entry |
Blakeslee et al., "Reducing Resistance in PN Junctions using GaAsP", IBM Technical Disclosure Bulletin, vol. 15, No. 4, Sep. 1972. |
Continuations (1)
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Number |
Date |
Country |
Parent |
465696 |
Jan 1990 |
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