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The present invention relates to vacuum electronic devices employing an interacting electron beam and electromagnetic wave (such as in a traveling-wave tube) and in particular such devices providing extremely high-frequency operation.
Terahertz electromagnetic waves have a frequency that lies between microwaves and infrared light. The production and amplification of terahertz electromagnetic radiation may prove important in a variety of technologies including imaging, spectroscopy, and data communication; however, the ability to produce compact and robust devices producing terahertz radiation in meaningful power levels (milliwatts or higher) is elusive.
One potential candidate for terahertz-level electromagnetic amplification is the traveling-wave tube, being a class of vacuum electronic devices (VEDs) that generally includes klystrons, magnetrons, gyrotrons, and backward-wave oscillators, among other devices. Each of these vacuum electronic devices converts the kinetic energy of an accelerated electron beam into electromagnetic-field energy.
A typical traveling-wave tube provides a helical conductor along which an electromagnetic wave is guided. An accelerated electron beam is directed to the center of the helix, along the axis of the helix. The helix reduces the speed of the electromagnetic wave, measured in the direction of the electron beam, to match that of the electron beam (by increasing the path length of the electromagnetic wave along the helix compared with the path length of the beam) and also provides close proximity between the electromagnetic wave and the electron beam, promoting energy transfer from the beam to the electromagnetic field.
A challenge in producing a traveling-wave tube in the terahertz range is the small size of the helix required for these frequencies that must be precisely fabricated and aligned with an electron beam.
The present invention provides a vacuum electronic device such as a traveling-wave tube that employs a self-assembled helical conductor, for example, formed by a conductor applied to a thin layer of material subject to differential strain, causing that material to coil into a helix. By control of the conductor properties, including thickness, elastic modulus, and built-in strain, small but precisely-defined helices can be generated.
More specifically, the invention provides a vacuum electronic device having a housing defining a cavity supporting a vacuum and holding an electron source for generating a beam of electrons directed along an axis through the cavity. A helical conductor, positioned to spiral about the axis, includes a strip with a stress gradient causing it to relax to form the helix. A coupler directs an electromagnetic signal into the helical conductor for amplification of that signal by a transfer of energy from the electron beam to the electromagnetic signal in the helical conductor.
It is thus a feature of at least one embodiment of the invention to provide extremely small-scale but precisely defined helices useful for structures such as traveling-wave tubes by the self-assembly mechanism of releasing stress.
The strip may provide a differential stress along a non-zero angle with respect to a longest dimension of the extent of the strip when flat to promote self-assembly of a linear strip into a helical form.
It is thus a feature of at least one embodiment of the invention to provide a helical support or conductor having controlled pitch and/or diameter suitable for helical conductors used in devices such as traveling-wave tubes for THz radiation.
The prestressed strip may be a crystalline material that has a longest dimension extending at a nonzero angle with respect to the <100> axis.
It is thus a feature of at least one embodiment of the invention to make use of anisotropic mechanical properties of the crystalline or noncrystalline lattice structures of the film and of the substrate to achieve helices.
The strip may be at least two layers of different materials having different lattice constants.
It is thus a feature of at least one embodiment of the invention to provide great flexibility in the ability to generate differential stresses through the use of different materials.
Alternatively, the strip may be a single material having stress whose magnitude changes (a stress gradient) as one moves in a direction parallel to the thickness.
It is thus a feature of at least one embodiment of the invention to provide a simple fabrication method using a single material with internal stress gradation.
The helical conductor may further include a conductive material attached to the strip so that the conductive material is formed into a helix by relaxing of the strip.
It is thus a feature of at least one embodiment of the invention to provide the ability to optimize conductance separate from the structural considerations of the helical strip.
The conductive material may be graphene.
It is thus a feature of at least one embodiment of the invention to provide a highly conductive material that can be readily deformed into the helix.
The strip may provide a germanium surface supporting the graphene.
It is thus a feature of at least one embodiment of the invention to provide a substrate for the graphene that promotes high conductivity.
The strip may include a second prestressed material relaxing to form a conductive cylinder.
It is thus a feature of at least one embodiment of the invention to provide a rolled-up conductor that may reduce edge roughness causing charge scattering at terahertz frequencies.
The conductive cylinder 1 may have a diameter less than half a diameter of the helix.
It is thus a feature of at least one embodiment of the invention to provide a conductor that minimizes interference with the formation of a helix.
The helical conductor may be passivated at its edges generally normal to the axis.
It is thus a feature of at least one embodiment of the invention to reduce the effects of edge trap states that can cause charge scattering.
The coupler may include a first and second waveguide position perpendicular to the axis at opposite ends of the helical conductor.
It is thus a feature of at least one embodiment of the invention to provide a simple method of connecting the helix to an external device without the need for complex physical connection.
The helix may have a diameter of less than 12 microns and in some cases less than three microns.
It is thus a feature of at least one embodiment of the invention to provide extremely small helical conductors that are believed to produce a better coupling between the electron beam and the helix for extremely high frequencies.
The helix may be supported on a substrate using spaced-apart substrate supports to bridge between the substrate supports with unsupported spans of the helix.
It is thus a feature of at least one embodiment of the invention to provide a simple alignment and support system for the helix that can be integrated with other components manufactured on the same substrate, including the electron source and collector.
The prestressed bilayer strip may be a crystalline material that has a longest dimension extending at a nonzero angle with respect to the most compliant crystalline direction (in the diamond lattice, e.g., for Si and Ge, the <100> axis), and the substrate supports may be spaced along a substrate separation axis angled with respect to this most compliant direction (in this example the <100> axis).
It is thus a feature of at least one embodiment of the invention to position the substrate supports (or posts) so that the strips automatically assemble to the posts as the strips form into helices.
The helix may have an increasing diameter in the direction of electron travel of the electron beam.
It is thus a feature of at least one embodiment of the invention to accommodate electron beam diameter expansion as the electron beam moves through the helix, a factor that is expected to be more pronounced at smaller beam diameters needed for these nanohelices.
Alternatively, or in addition, the helix has an increasing pitch in the direction of travel of the electron beam.
It is thus a feature of at least one embodiment of the invention to accommodate slowing of the electron beam as it releases energy by producing a parallel slowing of the electromagnetic wave (measured along the axis) for improved coupling efficiency.
These particular objects and advantages may apply to only some embodiments falling within the claims and thus do not define the scope of the invention.
Referring now to
Disposed at a first end of the helical conductor 14 along axis 16 is an electron beam source 18 directing an electron beam 20 along the axis 16 concentrically within the helical conductor 14. The opposite end of the helical conductor 14 provides electron collector 22, collecting and dissipating residual energy in the electron beam 20 after passing through the helical conductor 14.
The electron beam source 18 may provide a cathode 24 connected to a source of negative voltage through conductive trace 26 and operates to emit electrons (for example, by field emission) accelerated through an anode 28 positively charged with respect to the cathode 24 through trace 30. Traces 26 and 30 may connect with a high-voltage source (not shown).
The electron beam source 18 and cathode 24 may also be fabricated using integrated circuit techniques or may be implemented through an external device such as a scanning electron microscope. The generation of small electron beams using field emission for integrated circuit-scale vacuum devices is described, for example, in U.S. Pat. No. 7,736,210 assigned to the assignee of the present invention and hereby incorporated by reference. It is contemplated that the invention may alternatively use other known electron beam formation techniques.
The electron collector 22 requires relatively low precision and may adopt conventional designs scaled for the integrated circuit fabricated directly on the substrate 12. Generally, the electron collector 22 is biased to be positive in voltage with respect to the cathode 24 through trace collector 25 (which may be attached to trace 30) to attract electrons and sized to absorb necessary heat energy of those electrons, for example, by an extended length or the use of baffles and fins or the like.
A second planar substrate 31 may be positioned over the substrate 12 and may have been processed to provide a cutout forming part of a cavity 32 that may hold the helical conductor 14 as well as the electron beam source 18 and electron collector 22 providing upstanding walls thereabout. A third capping substrate 34 may then be placed over top of substrate 31 so that cavity 32 becomes an enclosed volume. The substrates 12, 31, and 34 as depicted may be laminated face-to-face and sealed together, for example, by a fusible frit or adhesive to support a vacuum in the cavity 32 which may be evacuated, for example, through an evacuation port 36 in substrate 34.
The substrate 34 may also include preformed first and second couplers 38a and 38b providing metallized channels (for example, using etching and metallization processes known in integrated circuit construction) forming waveguides at terahertz frequencies and extending perpendicularly to axis 16 so that their axes intersect axis 16 at opposite ends of the helical conductor 14.
Referring now to
In one embodiment, opposite ends of the helical conductor 14 maybe supported on insulating standoffs 42a and 42b formed to project upward from the surface of substrate 12 after processing as will be discussed further below. A central standoff 44 of similar height may also be placed to support the helical conductor 14 to promote vibration resistance or to be electrically conductive to enforce boundary conditions, for example, to block a backward wave or the like. More generally the helical conductor 14 is expected to be sufficiently stiff to bridge the distance between the insulating standoffs 42a and 42b without further support.
Referring now to
In a first embodiment, the substrate 12 may have an upper surface comprised of a p-doped silicon crystal having a given lattice constant representing generally the spacing periodicity of the crystalline surface. A crystalline layer of intrinsic or lightly doped silicon (i-Si) 52 may be grown over the top of the substrate 12 (having essentially the same lattice constant) by molecular beam epitaxy or similar process.
Next, a germanium layer 54 is epitaxially grown over the top of i-Si layer 52 at a relatively low temperature (T˜350° C.) on the (001) face of the Si substrate crystal. Because of the different lattice constants of germanium layer 54 with respect to the i-Si layer 52, the crystal structure of the germanium layer 54 in contact with the i-Si layer 52 will be stressed, indicated in simplified form by lines of relative stress 56. As each successive layer of germanium atoms is applied to the germanium layer 54, the epitaxial strain will be reduced as indicated resulting in a differentially stressed germanium layer 54. The strain gradient across the thickness of the germanium layer can be tailored by adjusting the growth rate and temperature. Specifically, in one example, one can grow Ge on Si above the critical thickness so that, after a first thickness (e.g., 4 monolayers (ML)), where the strain is uniform, the strain decreases when additional layers are grown, due to plastic relaxation. Growth at low temperature is needed (1) to “freeze” the strain gradient across the thickness, and (2) to keep the growth two-dimensional above the critical thickness. The above described processing may all occur along the plane of the substrate 12 allowing standard integrated circuit techniques to be employed.
The combined layers of the i-Si layer 52 and the germanium layer 54 may then be trimmed, for example, by masking and ion etching or other techniques known in the art to form the outline of the strip 50 shown in
At the same time, other surfaces of the substrate 12 may be etched to generate the standoffs 42 and 44 described above. It will be understood that desired different materials may be used to create the standoffs 42 and 44, for example, by etching pockets in the substrate 12 and filling them with materials and then etching around those materials.
At a succeeding step, a conductor layer 58 may optionally be applied over the germanium layer 54 to improve electrical conduction or if a material operating in the capacity of the germanium layer 54 is not conductive. In one embodiment this conductor layer 58 may be graphene which provides improved conductive properties when coated on germanium. See generally, Francesca Cavallo, et al. Exceptional Charge Transport Properties of Graphene on Germanium, ACS Nano. 2014 Oct. 28; 8(10):10237-45 hereby incorporated by reference. The conductor layer 58 will normally be bonded to the germanium layer 54 in planar configuration before it is assembled into a helix. Generally, the helical conductor 14 must be conductive at the desired radiofrequency but need not have a long mean free path of electron conduction at terahertz frequencies.
In order to improve the conductivity of the conductor layer 58 (or the germanium layer 54 used as a conductor) these layers may be subject to passivation, for example, serving to inactivate broken bonds of the semiconductor surface by saturation with a reactive material such as hydrogen or by formation of an oxide. It is believed that this process may limit depletion of carriers in the conductor and thus enhance conductance. The conductor layer 58 and/or the germanium layer 54 may also be annealed to reduce edge roughness.
Finally, the i-Si layer 52 may then be etched away as a sacrificial layer, for example, by KOH or NH4OH which selectively attacks the i-Si layer 52 compared to the respective p-type Si substrate 12. The stresses 56 within the germanium layer 54 cause the germanium layer 54 and conductor layer 58 to roll about a cylindrical volume and to progress helically about that cylindrical volume depending on the angle of the net stress 59 compared to an axis of longest extent 61 of the strip 50. As shown in
Referring now to
The combined thickness of layers 60 and 62, for example, may be on the order of 110 nanometers and provide the helix with a radius of 2.4 micrometers and a ribbon width of two micrometers. By varying the bilayer thickness from 10 nanometers to 200 nanometers, helix diameters of 20 nanometers to 100 micrometers can be obtained.
In this example, layer 62 may be again coated with an alternative conductor 64 such as graphene, eliminating the need for high-conductivity properties in the differentially strained materials. As indicated in
Referring again to
Referring now to
As shown in
Referring now to
It will be appreciated that when the strip 50 is formed as a bilayer, the two layers may both comprise crystalline materials, or one may be crystalline and one amorphous, for example a film bonded to a crystalline layer. Two amorphous layers are also possible.
Certain terminology is used herein for purposes of reference only, and thus is not intended to be limiting. For example, terms such as “upper”, “lower”, “above”, and “below” refer to directions in the drawings to which reference is made. Terms such as “front”, “back”, “rear”, “bottom” and “side”, describe the orientation of portions of the component within a consistent but arbitrary frame of reference which is made clear by reference to the text and the associated drawings describing the component under discussion. Such terminology may include the words specifically mentioned above, derivatives thereof, and words of similar import. Similarly, the terms “first”, “second” and other such numerical terms referring to structures do not imply a sequence or order unless clearly indicated by the context.
When introducing elements or features of the present disclosure and the exemplary embodiments, the articles “a”, “an”, “the” and “said” are intended to mean that there are one or more of such elements or features. The terms “comprising”, “including” and “having” are intended to be inclusive and mean that there may be additional elements or features other than those specifically noted. It is further to be understood that the method steps, processes, and operations described herein are not to be construed as necessarily requiring their performance in the particular order discussed or illustrated, unless specifically identified as an order of performance. It is also to be understood that additional or alternative steps may be employed.
It is specifically intended that the present invention not be limited to the embodiments and illustrations contained herein and the claims should be understood to include modified forms of those embodiments including portions of the embodiments and combinations of elements of different embodiments as come within the scope of the following claims. All of the publications described herein, including patents and non-patent publications, are hereby incorporated herein by reference in their entireties.
This invention was made with government support under DE-FG02-03ER46028 awarded by the US Department of Energy. The government has certain rights in the invention.
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Prior Art—AIP—Applied Physics Letters—Fabrication and electrical characterization of Si-based rolled up microtubes—F. Cavallo, R. Songmuang and O. G. Schmidt. |
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Number | Date | Country | |
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20190279834 A1 | Sep 2019 | US |