The present invention relates generally to impact sensors, and more particularly to vehicular impact sensors capable of identifying and responding to high energy shocks.
Impact sensors are common in modern vehicles, and commonly consist of systems of one or more accelerometers with output voltages proportional to shock magnitude. Such accelerometer-based impact sensors are commonly paired with airbags, fire suppression or extinguishing systems, alarms, and other peripheral systems to improve vehicle and passenger safety. Vehicular impact sensors commonly act as triggers for these peripheral safety systems, triggering fire suppression actions, airbags, etc. in response to any impact of more than a threshold magnitude.
Civilian vehicles typically use impact sensors to detect collisions and trigger collision safety systems. Military vehicles may occasionally encounter severe shock events corresponding to much higher energy impacts, such as from rocket propelled grenade or other explosive fire, while routinely experiencing relatively low energy shock events, such as from vehicle collisions or recoil of integrated weaponry. Severe shock events may necessitate immediate fire suppression or inerting action to prevent explosions. Conversely, fire suppression measures may be both unnecessary and undesirable in response to lower energy shock events. Impact magnitude alone may not be sufficient to distinguish between severe shock events and low energy shock events.
There exists a need for an impact threat sensor capable of intelligently differentiating between high energy shocks which may constitute a threat to a vehicle, and lower energy events which may be routine or non-severe.
The present invention is directed toward an impact energy sensor comprising an accelerometer, an analog signal filter, threshold circuitry, and a data processor. The analog signal filter is configured to filter signals from the accelerometer. The threshold circuitry is configured to output a non-zero threshold bit only in response to filtered signals from the accelerometer which exceed a specified sensitivity threshold. The data processor is configured to assess impact energy by accumulating threshold bits from the threshold circuitry, and is further configured to transmit an alarm message only if N or more threshold bits are accumulated within a time window of width T, where N and T are predetermined application-specific values.
Analog processing block 14, digital processing block 28, and interface block 34 each represent logical divisions of impact energy sensor 10 according to functionality. Analog processing block 14, digital processing block 28, and interface block 34 may share some hardware elements, and are in one embodiment fabricated on a shared circuit board with accelerometer 12. Filter 16 is a triaxial analog filter connected to ground and to accelerometer 12. Filter 16 provides analog signal conditioning via, e.g., a band-pass filter which excludes frequencies corresponding to noise and background vibration. Although filter 16 is depicted as a single unit, outputs from each axis of accelerometer 12 may be conditioned separately, for instance to exclude different characteristic noise frequencies associated with each axis, depending on the particular application. In some embodiments, each axis of filter 16 may be connected to accelerometer 12 via a capacitor to remove voltage transients, as shown. Amplifier 18 is a triaxial amplifier capable of conditioning filtered analog signals from filter 16 with a specified gain for reception at threshold circuitry 20. Amplifier 18 may provide the same gain for each filtered axis of accelerometer 12, or may amplify each axis by an axis-specific gain value. In some instances, the gain or gains of amplifier 18 may be configured either during manufacture or during operation (e.g. by data processor 30) to normalize or otherwise adjust the output of each axis of accelerometer 12. This functionality may alternatively be provided via the selection of thresholds for threshold circuitry 20 (stored in accelerometer sensitivity references 22).
Threshold circuitry 20 includes three threshold comparators, each of which provide a binary output for one axis of accelerometer 12. In particular, threshold circuitry 20 outputs a binary threshold bit for each axis (X, Y, Z) of accelerometer 12. This threshold bit is zero where the amplitude of the amplified, filtered accelerometer signal of that axis falls short of a threshold determined by a corresponding accelerometer sensitivity reference 22, and positive where the amplified, filtered accelerometer signal of that axis exceeds the corresponding threshold. Accelerometer sensitivity references 22 are analog values that determine the threshold of corresponding axes of threshold circuitry 20, and which can be adjusted during maintenance or operation of impact energy sensor 10. Each axis of threshold circuitry 20 produces a non-zero output only if a corresponding accelerometer signal exceeds the appropriate threshold value specified by accelerometer sensitivity reference 22. Sensitivity references 22 are selected to exclude low signal amplitudes corresponding to noise or low-energy shock events from collisions, weapon recoil, and the like. In some embodiments, threshold accelerometer sensitivity references 22 may be selected to effectively normalize axes of accelerometer 12, rather than relying on amplifier 18 to provide this functionality. Although threshold circuitry 20 is depicted as outputting three distinct binary threshold bits (one corresponding to each axis of accelerometer 12), some embodiments of threshold circuitry 20 may provide only a single aggregate threshold bit produced by comparing an aggregated accelerometer signal (e.g. the square root of the sum of the squares of accelerometer signals for each axis, or the sum of absolute values of signals for each axis) to a single threshold value.
Data processor 30 is a logic-capable device such as a microprocessor or a complex programmable logic device (CPLD), the logic of which is described in greater detail with respect to
BIT processor 32 is a logic capable device configured to test high impact energy sensor 10 for faults. BIT processor 32 may be a separate component in communication with data processor 30. In alternative embodiments, BIT processor 32 and data processor 30 may be logically separable functions performed by shared processor hardware. BIT processor 32 checks for live voltages from bias voltage monitor 26 indicating that accelerometer 12 is powered. Bias voltage monitor 26 comprises one or voltage connections to bias terminals of accelerometer 12, all of which are live when accelerometer 12 is powered and functioning properly. In some embodiments, BIT processor 32 may also monitor power supply voltages at other board locations to ensure that components are powered at system startup, and/or remain powered throughout operation. BIT processor 32 may test filter 16, amplifier 18, threshold circuitry 20, and digital processor 30 by transmitting a simulated BIT pattern corresponding to a test alert pattern. Amplifier 24 amplifies this simulated BIT pattern with a preset gain sufficient to substantially match outputs of accelerometer 12. This amplified output is received and processed by filter 16, amplifier 18, threshold circuitry 20, and data processor 30. In particular this amplified output is processed identically to signals from accelerometer 12, thereby enabling BIT processor 32 to verify that digital processor 30 throws alarm notifications when provided with appropriate (simulated) accelerometer outputs. During BIT simulation, BIT processor 32 communicates with data processor 30 to suppress alarm notifications to interface circuitry 36. BIT processor 32 may initiate built in tests, either running checking bias voltages or by running simulated values through filter 16, amplifier 18, and threshold circuitry 20, and data processor 30, in response to a variety of conditions. BIT processor 32 may, for instance, initiate built in tests upon startup of impact energy sensor 10 (startup BIT), in response to diagnostic requests from data processor 30 or a downstream controller connected via interface circuitry 36 (solicited BIT), or as a continuous monitoring scheme (continuous BIT) capable of flagging system faults as they develop. In some embodiments, BIT processor 32 continuously receives voltages from bias voltage monitor 26, and suppresses alarm notification outputs from data processor 30 when bias voltages indicate a voltage fault. BIT processor 32 thus enables accelerometer 12 to be swapped out (e.g. for maintenance) during operation of impact energy sensor 10 without risk of triggering alarm notifications. BIT processor 32 may similarly monitor bias voltages of other components for the same purpose. In this way, accelerometer 12 may be hot-swappable. BIT processor 32 may communicate fault status to diagnostic recorders, internal fire suppression and explosion inerting systems, and operator alert interfaces via interface circuitry 36.
Impact energy sensor 10 throws alarm messages in response to high energy shock events, while suppressing alarms from low energy shock events or transient accelerometer signal amplitude noise. In this way, impact sensor 10 is able to distinguish between severe shocks which necessitate emergency action, and less severe shocks for which emergency action such as fire suppression or explosion inerting would be unnecessary or undesirable.
While the invention has been described with reference to an exemplary embodiment(s), it will be understood by those skilled in the art that various changes may be made and equivalents may be substituted for elements thereof without departing from the scope of the invention. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the invention without departing from the essential scope thereof. Therefore, it is intended that the invention not be limited to the particular embodiment(s) disclosed, but that the invention will include all embodiments falling within the scope of the appended claims.