1. Field of the Invention
The invention relates to a method for translating a high-level programming language and, more particularly, to a high-level programming language to hardware component graph (HCG) translation method.
2. Description of Related Art
Typically hardware description languages such as VHDL, Verilog cannot directly describe the programming logic and executing the flow of a high-level programming language. Accordingly, the high-level programming language is translated into an activity diagram (AD) defined in a unified modeling language (UML). The AD is a flow description diagram that represents the programming logic and executing flow of a high-level programming language. Accordingly, the AD is not associated with physical hardware components and cannot be translated directly into a hardware description language, unless the AD is first translated into a hardware component graph (HCG).
However, when the AD is translated into the HCG, method calls of the high-level programming language cannot be presented. Namely, such a process cannot accurately translate the methods of the high-level programming language into the components of the HCQ, and further cannot translate the HCG into a typical hardware description language (HDL).
Therefore, it is desirable to provide an improved method to mitigate and/or obviate the aforementioned problems.
The object of the invention is to provide a high-level programming language to hardware component graph (HCG) translation method, which can translate the methods of the high-level programming language into an HCG that corresponds to hardware components.
To achieve the object, there is provided a high-level programming language to hardware component graph (HCG) translation method. The high-level programming language includes one or more classes. The method includes the steps: (A) reading codes of the high-level programming language; (B) analyzing the codes in order to collect class information and store the class information collected in a class information object, and generating a temporal hardware component graph, wherein the class information object has method object, parameter object and return value object; (C) analyzing the class information object and obtaining corresponding public and private methods, parameters, return values from the temporal hardware component graph; (D) linking the public methods, parameters, return values to a class start node of the temporal hardware component graph; (E) analyzing the class information object and the temporal hardware component graph, and generating a method call table in accordance with one or more in/out edges of a method call node of the temporal hardware component graph and a method information object of the class information object; (F) using the method call table to change the one or more edges linked from the method call node to a method start node to thereby represent a respective method call in the codes of the high-level programming language and translate the temporal hardware component graph into a hardware component graph allowable to correspond to hardware components.
Other objects, advantages, and novel features of the invention will become more apparent from the following detailed description when taken in conjunction with the accompanying drawings.
Step S103 analyzes the codes of the high-level programming language in order to collect class information of the codes of the high-level programming language and store the collected class information in a class information object, and generates a temporal HCG The class information object contains the objects of class name, method, parameter and return value.
The circle 320 notated “add” corresponds to the private method “add” of the Java codes, and represents a method start node. The circle 330 notated “test” corresponds to the public method “test” of the Java codes, and represents another method start node. The public method “test” of the Java codes calls the private method “add”, and accordingly the temporal HCG has a node 340 notated “Call this add”.
It is known in
In the translation process, in addition to the temporal HCG generation, the class information in the temporal HCG is also collected. The class information contains the information of class name, method name, parameter and return value, which are stored in the class information object.
Step S105 analyzes the class information object and the temporal HCG in order to obtain public methods, parameters and return values corresponding to the temporal HCG.
Step S107 links the public methods, parameters and return values obtained in step S105 to a class start node of the temporal HCG. Accordingly, it determines which methods, parameters and return values in the temporal HCG are public, and the public methods, parameters and return values determined are linked to the class start node notated by the circle 310 or “Math” for further having corresponding hardware interfaces to input and output external signals. At linking, if there exist multiple readout or write-in, one or more multiplexers and demultiplexers are added to control the edges linked to the class start node.
Referring again to
Step S109 analyzes the class information object and the temporal HCG, and generates a method call table in accordance with one or more in/out edges of a method call node of the temporal HCG and a method information object of the class information object. The information of method calls, for example, where is a method call, which method is called, which method call nodes are calling and the like, can be collected in accordance with
Step S111 uses the method call table to change the edges in the temporal HCG linked from the method call node to the method start node to thereby represent the method call in the codes of the high-level programming language and translate the temporal hardware component graph into a hardware component graph allowable to correspond to hardware components. At re-linking, if a method is called by multiple method call nodes, one or more multiplexers and demultiplexers are added.
Referring again to
FIGS. 7 to 9 are another embodiment, which performs an subtraction and uses a public method “test” to call another public method “sub”.
As cited, the invention uses the method call table to change one or more edges in the temporal HCG linked from a method call node to a method start node to thereby represent a respective method call in the high-level program codes, and accordingly coverts the temporal HCG into an HCG allowable to correspond to hardware components.
In view of the foregoing, it is known that the invention coverts the method calls coded by a Java language into an HCG allowable to correspond to hardware components. The HCG can correspond to the respective VHDL components and thus be easily translated into the VHDL codes, which overcomes the prior problems that the method calls coded by a high-level programming language cannot be effectively translated into an HCG so that the HCG cannot be translated into a typical HDL.
Although the present invention has been explained in relation to its preferred embodiment, it is to be understood that many other possible modifications and variations can be made without departing from the spirit and scope of the invention as hereinafter claimed.
Number | Date | Country | Kind |
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094147587 | Dec 2005 | TW | national |