Claims
- 1. A matrix addressable display, comprising:
- a display panel having a plurality of input signal terminals;
- a first conductor having a first conductive portion and a second conductive portion, the first conductive portion including a first material that is conductive and has a first relative permeability greater than 1, the second conductive portion including a second material that is conductive and has a relative permeability substantially equal to 1, the first conductor having a plurality of spaced-apart taps coupled to respective input terminals of the display panel;
- a second conductor extending parallel to the first conductor and spaced-apart from the first conductor; and
- a dielectric intermediate the first and the second conductors.
- 2. The matrix addressable display of claim 1 wherein the first conductive portion is positioned between the second conductive portion and the second conductor.
- 3. The matrix addressable display of claim 1 wherein the first conductor includes a substantially planar material coating the dielectric and patterned to an elongated pattern.
- 4. The matrix addressable display of claim 1 wherein the first conductor, the second conductor and the dielectric are shaped to form a coaxial transmission line.
- 5. The matrix addressable display of claim 1 wherein the permeability of the first material is greater than about 1,000.
- 6. A matrix addressable display, comprising:
- a display panel including a plurality of signal lines;
- an input signal source producing a plurality of input signals, each input signal being produced at a respective starting time; and
- a delay line coupled to receive the input signals from the input signal source, the delay line including a first conductor coupled to respective ones of the signal lines at respective spaced-apart locations along the delay line, each of the spaced-apart locations corresponding to a respective desired delay time between the starting time of the respective input signal and a respective arrival time of the respective input signal at the spaced-apart locations, the first conductor having a first conductive portion and a second conductive portion, the second conductive portion including a conductive material having a relative permeability substantially equal to 1, the first conductive portion including a conductive material having a relative permeability greater than 1, the relative permeability of the first conductor being selected such that actual delay times between arrivals of the input signals at respective signal lines substantially equal the respective desired delay times.
- 7. The matrix addressable display of claim 6, further including a second conductor extending parallel to the first conductor and spaced-apart from the first conductor, the second conductor having a second portion having a relative permeability substantially equal 1.
- 8. The matrix addressable display of claim 6, further including a second conductor extending parallel to the first conductor and spaced-apart from the first conductor by a dielectric the second conductor having a relative permeability substantially equal to the relative permeability of the first conductive portion, wherein the first conductive portion of the first conductor is positioned between the second conductive portion and the second conductor.
- 9. The matrix addressable display of claim 6, further including a second conductor extending parallel to the first conductor and spaced-apart from the first conductor, the second conductor having a relative permeability substantially equal to the relative permeability of the first conductive portion.
- 10. The matrix addressable display of claim 6 wherein the permeability of the first conductive portion is greater than about 1,000.
- 11. The matrix addressable display of claim 6 wherein the delay line is a microstrip line including a dielectric substrate and wherein the first conductor is a patterned strip carried by the dielectric substrate.
- 12. The matrix addressable display of claim 11 wherein the delay line is patterned in a serpentine pattern.
- 13. The matrix addressable display of claim 6 wherein the input signals include a principal component at a first frequency and the permeability of the first conductive portion is selected such that the actual delay time is substantially equal to the desired delay time at the first frequency.
- 14. The matrix addressable display of claim 6, further including a second conductor extending parallel to the first conductor and spaced-apart from the first conductor by a dielectric, the second conductor having a relative permeability substantially equal to the relative permeability of the first conductive portion.
- 15. A matrix addressable display, comprising:
- a display panel having a plurality of input terminals;
- a center conductor;
- an outer conductor extending parallel to the center conductor and spaced-apart from the center conductor;
- a dielectric intermediate the center and outer conductors; and
- wherein at least one of the center conductor and the outer conductor has a first conductive portion and a second conductive portion, the first conductive portion including a first material that is conductive and has a first relative permeability greater than 1, the second conductive portion including a second material that is conductive and has a relative permeability substantially equal to 1, at least one of the first and second conductive portions having a plurality of taps coupled to respective ones of the input terminals of the display panel.
- 16. The matrix addressable display of claim 15 wherein the outer conductor a has radially inner portion and a radially outer portion, the radially inner portion including a first material that is conductive and has a first relative permeability greater than 1, the radially inner portion including a second material that is conductive and has a relative permeability substantially equal to 1.
- 17. The matrix addressable display of claim 15 wherein the center conductor has a radially inner portion and a radially outer portion, the radially outer portion including a first material that is conductive and has a first relative permeability greater than 1, the radially inner portion including a second material that is conductive and has a relative permeability substantially equal to 1.
- 18. A method of providing a series of delayed signals to respective input terminals of a matrix addressable display, comprising:
- producing a plurality of input signals;
- extending a first conductor between the spaced-apart locations, the first conductor including a first conductive material having a permeability greater than 1 and a second conductive material having a permeability substantially equal to 1;
- passing the input signals through the first conductor;
- tapping the first conductor at the plurality of spaced-apart locations to obtain a respective delayed signal at each spaced-apart location; and
- coupling the delayed signals to respective input terminals of the matrix addressable display.
- 19. The method of claim 18, further including the steps of:
- determining an expected delay between successive tapped locations for a first conductor permeability of 1;
- determining a desired delay between successive tapped locations; and
- selecting the permeability of the first conductive material to correspond to the determined desired delay.
- 20. The method of claim 18 wherein the permeability of the first conductive material is greater than about 1,000.
CROSS-REFERENCE TO RELATED APPLICATION
This application is a continuation of U.S. patent application Ser. No. 08/752,610, filed Nov. 19, 1996 now U.S. Pat. No 5,801,669.
STATEMENT AS TO GOVERNMENT RIGHTS
This invention was made with government support under Contract No. DABT 63-93-C-0025 awarded by Advanced Research Projects Agency ("ARPA"). The government has certain rights in this invention.
US Referenced Citations (14)
Non-Patent Literature Citations (2)
Entry |
Kinberg et al., Non-Linear Controllable Transmission Lines, IBM Technical Disclosure Bulletin, vol. 2, No. 6, pp. 108-109, Apr. 1960. |
Allen, Mark G., "Integrated Inductors for Low Cost Electronic Packages" International Electron Device Meeting Technical Digest: 95-137 to 95-141, Dec., 1995. |
Continuations (1)
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Number |
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752610 |
Nov 1996 |
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