This invention relates to laser diode systems, particularly it relates to laser diode systems of high power as well as high beam quality.
Standard high power laser diodes are in terms of either diode bar/stack arrays (edge emitting devices), or VCSEL arrays (surface emitting devices). These systems offer high power (tens to hundred of watts), but suffer from a deteriorating beam quality as power increases.
In both cases (diode bars/stacks, VCSEL arrays), the approach to high power is by increasing the number of emitters. In diode bars/stacks, emitters are lined up inside a chip. A chip is broken off to several bars. Each bar consists of a row of emitters (like the teeth of a comb). Light comes out of a bar's edge. Multiple bars are piled up on top of each other to form a stack. In VCSEL, a chip consists of a plane of emitters (each a thin vertical cylinder, chip thickness, circular in cross section). Light comes out of the chip surface.
In both cases (diode bars/stacks, VCSEL arrays), while each emitter is low in power, thousands (or tens of thousands) of emitters as a whole can bring power into hundreds of watt. However, in these systems, the emitters are independent light sources, not coherent with each other. The beam quality goes down as the number of emitters increases towards high power.
This invention describes an approach that aims towards high power as well as coherence. It seeks a large gain volume (for high power) by using a large core for each emitter and by using many emitters. The core of an emitter refers to the active region where the optical gain occurs. A large gain volume is needed for high power. Further, it ensures coherence by coupling these emitter cores as a coherent serial array (i.e. train like). The result is a single lasing wave for all cores. In this way, power can be increased by adding cores (into the array) without deterioration of beam quality.
The cores are circular cylinders like in VCSEL. Now, however, one chip supports only one core (as oppose to thousands of cores per chip in VCSEL). Core diameters are large, hundreds of microns (as opposed to microns in VCSEL). The core chips are flipped up to be vertically standing and then lined up to form a serial array (a chip holder is needed for the purpose). The array is placed inside an external cavity. The cavity contains a mode-selection mechanism that deals with multi-mode excitations which destroy beam quality. The mode selection ensures a single lasing wave for the whole array. Each core chip is attached to a large surface for heat dissipation into air. The result is (1) a large gain volume for high power (many cores, each core a large gain volume), (2) a single lasing wave for high beam quality, and (3) an air-cooled system.
The chip structure is similar to that of a VCSEL chip (with a few modifications). As shown in
However, as shown in
The mode control method has been described in a 2016 US patent [1] and paper [2]. The method is summarized here briefly.
As shown in
The factor 1/(2MF) is contributed by the FP, where M and F are, respectively, the maximum order and the finesse of the FP. The factor δω/ωo is contributed by the seeding laser, where ωo is the laser frequency and δω is the frequency width. For reasonable values,
δ is given by.
A diffraction-limited Gaussian beam has an angular width given by
where W is the beam width and λ is the wavelength. For our beam to be Gaussian beam like, we need to match δ with θD, that is
The condition translates to a ratio between beam size and wavelength given by
For a wavelength of 1 micron, the beam size (or core size) can be as large as 250 micron. For a core above that size, multi mode can occur with reduced beam quality. We shall use a ratio 100 (not 250, for safety margin) for estimates.
For a core radius of 100 micron, relative to a VCSEL size of 1 micron, the ratio in gain volume is 10{circumflex over ( )}4. From that ratio, for a VCSEL power of 1 mW, the power can be scaled up to 10 W. With 100 cores in series, the total power can be scaled up to 1 kilowatt.
Heat removal becomes more important with increasing power. In this method, each chip provides its own surface for heat removal. Each chip can be connected to a package with a large surface area for heat dissipation. As shown in
Heat removal rate q through forced air flow is given by q=hcA(ΔT), where hc is the convection heat transfer coefficient, A is the surface area, and ΔT is the temperature difference between air and the surface being cooled. The heat transfer coefficient depends on the air flow rate. A reasonable value for moderate air flow rate is h=100 W/m2(° K). Using this value, for a surface area of 5 cm×5 cm×2 (two surfaces), and a temperature difference ΔT=10° K, we obtain a heat removal rate q=5 W.
This simple estimate indicates that air cooling might be sufficient for a power per chip in the 10 W range. If so, then a 100 W system based on 10 chips, or even a 1 kW system based on 100 chips, can be possible with air cooling. This remarkable result is because the heat load per chip remains independent of the number of chips employed in the system.
The design knowledge and fabrication know-how of VCSEL chips can be directly transferred to the current chip. Other components (FP, isolator, feed laser, beam splitters, mirrors, etc) are all standard devices.
1) A problem of
inability of related art to efficiently remove heat from the light-amplifying medium (LAM), which is utilized in a large-core-LAM laser systems configured to generate substantially only the lowest spatial mode at power levels on the order of 1 W or higher,
is solved by
structuring the large-core LAM, for use in a laser system configured to generate substantially only the lowest spatial mode at power levels on the order of 1 W or higher, as group of multiple large-core gain chips disposed coaxially with respect to one another to form a sequence or string of chips separated from one another by appropriate separation distance(s) while, at the same time, equipping each of the constituent LAM chips with an individual heat-sink removal contraption and disposing the so-formed sequence in an external laser cavity that is common to all of the constituent LAM chips.
2) A problem of
inability of related art to efficiently remove heat from the light-amplifying medium (LAM), which is utilized in a large-core-LAM laser systems configured to generate substantially only the lowest spatial mode at power levels on the order of 1 W or higher, while maintaining the spatial quality of such lowest spatial mode output from the laser system
is solved by
fabricating a multiplicity of individual LAM chips, each structured in a layered fashion similar to that of a VCSEL structure having a transverse dimension of the gain medium on the order of 100 microns or larger, but without individual optical reflectors (for example, DBRs) on each of the LAM chips, and forming a compound LAM within the external laser cavity by stringing together the multiplicity of the individual LAM chips disposed on the same axis and spatially-separated from one another such that layers of the layered structures of the individual LAM chips are transverse to the axis, to provide the heat removal from the LAM chips individually and independently from one another.
The present application claims priority from and benefit of U.S. Provisional Patent Application No. 62/823,066 filed on Mar. 25, 2019 and titled “A Large-Core, Vertical-Cavity Coherent-Array-Laser (LC-VCCAL) Method”. The disclosure of the above-identified provisional patent application is incorporated herein by reference.