Claims
- 1. A high power, high voltage linear field effect transistor amplifier apparatus comprising in combination:
- a plurality of field effect transistors connected in series between a +B voltage source and ground, the drain of the first field effect transistor connected to said +B voltage source, the source of the last field effect transistor connected to ground,
- a diode pair connected respectively between the source and the drain of adjacent series field effect transistors of said plurality of field effect transistors,
- a gate biasing network connected respectively between the gate and source of each field effect transistor of said plurality of field effect transistors, said gate biasing network maintaining the gate threshold voltage of each field effect transistor, and,
- an input signal source connected respectively to between the gate and source of each field effect transistor of said plurality of field effect transistors.
- 2. A high power, high voltage linear field effect transistor amplifier apparatus as described in claim 1 further including a storing means to store a quiescent bias level, said storing means connected respectively between said input signal source and said source of each field effect transistor of said plurality of field effect transistors.
- 3. A high power, high voltage linear field effect transistor amplifier apparatus as described in claim 2 further including an oscillator means to provide a predetermined frequency signal, and a control amplifier means to receive said predetermined frequency signal, said control amplifier means isolating said oscillator means from said gates of said plurality of field effect transistors, said control amplifier means applying said predetermined frequency signal to said gates of said plurality of field effect transistors.
- 4. A high power, high voltage linear field effect transistor amplifier apparatus as described in claim 3 wherein said predetermined frequency signal comprises 50 MHz.
- 5. A high power, high voltage linear field effect transistor amplifier apparatus as described in claim 1 wherein said gate biasing network comprises an NPN transistor having an emitter, base and collector, each collector of said biasing network respectively connected by a resistive means to the drain of its corresponding field effect transistor, said base of said biasing network respectively connected to the source of its correponding field effect transistor, said emitter connected between said diode pair and input signal source of its corresponding field effect transistor.
STATEMENT OF GOVERNMENT INTEREST
The invention described herein may be manufactured and used by or for the Government for governmental purposes without the payment of any royalty thereon.
US Referenced Citations (8)