Radio frequency (RF) signaling devices, from satellite-based navigational receivers to cell phones to ruggedized military radios, may be subject to very high power RF pulses during operation. As radios have developed, the hardware must support wider frequency bandwidths while maintaining protection for very sensitive receiver components. Damage due to exceeding voltage thresholds may occur very quickly, causing complete radio failure at any of several single points along the RF chain. Because the radios may cover multiple octaves of bandwidth, a coarse/fine passive limiter design does not provide a feasible solution. Similarly, while clipper circuits may be scalable and may react quickly to positive or negative alternating-current (AC) voltages associated with the RF signal, their speed comes at the cost of low power limitations. Active limiter circuits may be sufficiently high-power and sufficiently fast; however, the circuits may incorporate couplers, which may become prohibitively large at very high (VHF) frequencies and limit the versatility of the circuit over very wide band frequency ranges. Additionally, RF detector response flatness may become a concern that must be compensated.
In one aspect, embodiments of the inventive concepts disclosed herein are directed to a high-power RF limiter circuit configured for limiting high-energy pulses of an RF input signal to a desired power level. The limiter circuit may include one or more rectifier diodes for limiting the high-energy pulses, the rectifier diodes biased to a holdoff voltage just below a threshold voltage corresponding to the desired power level. The limiter circuit may include a holdoff circuit for maintaining the holdoff voltage across the rectifier diodes until the power levels of the RF signal are sufficient to warrant turning on the diodes. The holdoff circuit may incorporate Zener diodes rated to the threshold voltage, or similar means of maintaining the holdoff voltage across the rectifier diodes once power levels exceed the threshold level and the rectifier diodes have switched on. In embodiments, the limiter circuit may include an additional light limiter stage, similar to the limiter circuit but biased to a slightly higher voltage and configured to quickly turn on and reduce spike leakage associated with the first, or heavy, limiter stage.
In a further aspect, embodiments of the inventive concepts disclosed herein are directed to a method for high-power limiting of an RF input signal. The method may include determining a desired power threshold to which the input signal will be limited, and a corresponding voltage threshold. The method may include biasing a first PIN diode of a limiter circuit to a bias voltage slightly lower than the voltage threshold. The method may include biasing a second PIN diode of the limiter circuit to a second bias voltage greater than the first bias voltage. The method may include receiving the RF input signal via the limiter circuit. The method may include generating a first RF output signal based on the RF input signal by activating the first PIN diode via a first holdoff circuit once the voltage threshold is reached. The method may include generating a second RF output signal based on the first RF output signal by activating the second PIN diode via a second holdoff circuit biased to a voltage slightly above the voltage threshold, reducing spike leakage associated with the activation of the first PIN diode. The method may include outputting the second RF signal via an RF output of the limiter circuit.
Implementations of the inventive concepts disclosed herein may be better understood when consideration is given to the following detailed description thereof. Such description makes reference to the included drawings, which are not necessarily to scale, and in which some features may be exaggerated and some features may be omitted or may be represented schematically in the interest of clarity. Like reference numerals in the drawings may represent and refer to the same or similar element, feature, or function. In the drawings:
Before explaining at least one embodiment of the inventive concepts disclosed herein in detail, it is to be understood that the inventive concepts are not limited in their application to the details of construction and the arrangement of the components or steps or methodologies set forth in the following description or illustrated in the drawings. In the following detailed description of embodiments of the instant inventive concepts, numerous specific details are set forth in order to provide a more thorough understanding of the inventive concepts. However, it will be apparent to one of ordinary skill in the art having the benefit of the instant disclosure that the inventive concepts disclosed herein may be practiced without these specific details. In other instances, well-known features may not be described in detail to avoid unnecessarily complicating the instant disclosure. The inventive concepts disclosed herein are capable of other embodiments or of being practiced or carried out in various ways. Also, it is to be understood that the phraseology and terminology employed herein is for the purpose of description and should not be regarded as limiting.
As used herein a letter following a reference numeral is intended to reference an embodiment of the feature or element that may be similar, but not necessarily identical, to a previously described element or feature bearing the same reference numeral (e.g., 1, 1a, 1b). Such shorthand notations are used for purposes of convenience only, and should not be construed to limit the inventive concepts disclosed herein in any way unless expressly stated to the contrary.
Further, unless expressly stated to the contrary, “or” refers to an inclusive or and not to an exclusive or. For example, a condition A or B is satisfied by anyone of the following: A is true (or present) and B is false (or not present), A is false (or not present) and B is true (or present), and both A and B are true (or present).
In addition, use of the “a” or “an” are employed to describe elements and components of embodiments of the instant inventive concepts. This is done merely for convenience and to give a general sense of the inventive concepts, and “a’ and “an” are intended to include one or at least one and the singular also includes the plural unless it is obvious that it is meant otherwise.
Finally, as used herein any reference to “one embodiment,” or “some embodiments” means that a particular element, feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment of the inventive concepts disclosed herein. The appearances of the phrase “in some embodiments” in various places in the specification are not necessarily all referring to the same embodiment, and embodiments of the inventive concepts disclosed may include one or more of the features expressly described or inherently present herein, or any combination of sub-combination of two or more such features, along with any other features which may not necessarily be expressly described or inherently present in the instant disclosure.
Broadly, embodiments of the inventive concepts disclosed herein are directed to a high-power radio-frequency (RF) limiter circuit and related method. The limiter circuit provides a quick-reacting means of protecting sensitive internal components of a receiver from high-energy pulses in received RF signals. These high-energy pulses can quickly exceed voltage thresholds and lead to complete radio failure at any of various points along the receiver chain. The RF limiter circuit provides a scalable solution with favorable size, weight, power, and cost (SWaP-C) metrics.
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The high-power RF limiter 100 may be a two-stage or multi-stage limiter incorporating the limiting stage 102 (which serves as a heavy limiter) and a light limiter (light limiting stage) 124 in the same electrical plane as the RF transmission line 104. The light limiter 124 may be generally implemented and may function similarly to the heavy limiter 102, except that while the heavy limiter 102 may activate first to handle the dissipation of high-power pulses of the RF input signal 104 for sustained durations, the light limiter 124 may react more quickly to the leading edge of a high-energy pulse, reducing spike leakage (e.g., video leakage) associated with the slower reaction of the heavy limiter 102. For example, when a high power energy pulse of the inbound RF input signal 106 (via the RF transmission line 104) engages the high-power RF limiter 100, the heavy limiter 102 may activate first but react relatively slowly, due to the thicker intrinsic regions (not shown) of its component PIN diodes 110. The light limiter 124, however, may incorporate one or more PIN diodes 126 having a thinner intrinsic region than those of the PIN diodes 110, allowing the light limiter 124 to switch on more quickly than the heavy limiter 102. The light limiter 124 may be less suitable for long-term power dissipation than the heavy limiter 102; accordingly, the light limiter 124 (in particular, the PIN diodes 126 and Zener diodes (128) of the light limiter) may be biased to a holdoff voltage slightly higher than the voltage threshold (V1) associated with the heavy limiter 102, and the Zener diodes 128 of the light limiter 124 may have a slightly higher rated voltage (V2). The light limiter 124 may dissipate power only while the heavy limiter 102 is turning on, reducing spike leakage associated with the heavy limiter 102 and protecting receiver components before the PIN diodes 110 of the heavy limiter 102 can begin dissipating power. The light limiter 124 may include a holdoff circuit (112a) for maintaining the holdoff voltage across the PIN diodes 126 via the Zener diode 128; similarly to the holdoff circuit 112 of the heavy limiter 102, the holdoff circuit 112a may include cut-in resistors (120b), high-impedance resistors (120c) and Schottky diodes (122a).
The heavy limiter 102 and light limiter 124, as well as input and output ports along the RF transmission line 104, may be separated by decoupling capacitors 104a-c. With the proper selection of diodes and capacitors, the high-power RF limiter 100 may easily handle RF input signals (106) throughout the RF spectrum, including the HF, VHF, and UHF bands (3 MHz-3 GHz). In embodiments, the high-power RF limiter 100 may incorporate further light limiting stages, which may be implemented and may function similarly to the light limiter 124, electrically connected to the light limiter for still further reduction of spike leakage beyond that achieved by the light limiter.
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For example, the heavy limiter 102 of the high-power RF limiter 100c may include a scalable holdoff circuit 136 comprising a bank (138) of Zener diodes (118b) connected to the RF transmission line 104 by a switch 140 and a voltage monitor (142) for determining the current bias voltage and reporting voltage determinations (or power levels corresponding to determined voltages) to a limiter controller 144. The limiter controller 144 may be any appropriate analog controller or a digital signal processor (DSP). Status determinations by the voltage monitor 144 may be used by the limiter controller 144 to optimize the performance of the high-power RF limiter 100c via switching front-end attenuation, switching between low-sensitivity and high third-order intercept point (IP3) receiver paths, switching between antennas, enabling or adjusting additional PIN diodes 110, 126 or clamping circuits (not shown), and/or changing bands of operation. For example, the limiter controller 144 may detect a periodicity of high-energy pulses of the RF input signal (106,
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At a step 204, a DC bias network or voltage source biases a heavy-limiter PIN diode of the limiter circuit to a holdoff voltage just below the voltage threshold, so that the PIN diode does not activate until the power level of the RF input signal warrants activation of the heavy limiter.
At a step 206, the limiter circuit receives the RF input signal via one or more antenna elements of the receiver within which the limiter circuit is embodied.
At a step 208, the limiter circuit generates an RF output signal based on the RF input signal and limited to the desired power threshold by activating PIN diodes via a Zener diode (or similar holdoff circuit) biased to the voltage threshold. For example, the PIN diodes of a heavy limiter of a two-stage limiting circuit may be activated by high-energy pulses of the RF input signal.
At a step 210, when the power level of the RF input signal corresponds to the holdoff voltage, and the PIN diodes have switched on, the holdoff circuit may maintain the holdoff voltage across the PIN diodes, allowing the PIN diodes to self-bias (e.g., while the PIN diodes of the heavy limiter dissipate power associated with the RF input signal). For example, the appropriate Zener diodes may be selected from a bank of Zener diodes in the holdoff circuit, each Zener diode rated to a voltage corresponding to a selectable voltage threshold.
At a step 212, the limiter circuit outputs the limited RF output signal via an RF output of the RF transmission line.
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At the step 216, a second holdoff circuit of the light limiter (biased to a second voltage threshold slightly higher than the first voltage threshold associated with the heavy limiter) maintains the second holdoff voltage across the PIN diodes of the light limiter, e.g., while the PIN diodes of the light limiter are reducing spike leakage of the RF input signal while the PIN diodes of the heavy limiter are switching on.
At the step 218, the limiter circuit outputs the second RF output signal via the RF output.
As will be appreciated from the above, circuits and related methods according to embodiments of the inventive concepts disclosed herein may provide a SWaP-C favorable and quick-reacting means of guarding sensitive receiver components against damage resulting from sudden high-power pulses in received RF signals.
It is to be understood that embodiments of the methods according to the inventive concepts disclosed herein may include one or more of the steps described herein. Further, such steps may be carried out in any desired order and two or more of the steps may be carried out simultaneously with one another. Two or more of the steps disclosed herein may be combined in a single step, and in some embodiments, one or more of the steps may be carried out as two or more sub-steps. Further, other steps or sub-steps may be carried in addition to, or as substitutes to one or more of the steps disclosed herein.
From the above description, it is clear that the inventive concepts disclosed herein are well adapted to carry out the objects and to attain the advantages mentioned herein as well as those inherent in the inventive concepts disclosed herein. While presently preferred embodiments of the inventive concepts disclosed herein have been described for purposes of this disclosure, it will be understood that numerous changes may be made which will readily suggest themselves to those skilled in the art and which are accomplished within the broad scope and coverage of the inventive concepts disclosed and claimed herein.
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