This is a continuation of prior Application Ser. No. 06/626,089 filed on June 29, 1984, now abandoned.
Number | Name | Date | Kind |
---|---|---|---|
4128882 | Dennis | Dec 1978 | |
4141067 | McLagan | Feb 1979 | |
4144566 | Timsit | Mar 1979 | |
4173781 | Cencier | Nov 1979 | |
4228503 | Waite et al. | Oct 1980 | |
4323968 | Capozzi | Apr 1982 | |
4354232 | Ryan | Oct 1982 | |
4442487 | Fletcher et al. | Apr 1984 | |
4458310 | Chang | Jul 1984 | |
4464717 | Keeley et al. | Aug 1984 | |
4489381 | Lavallee et al. | Dec 1984 | |
4616310 | Dill et al. | Oct 1986 |
Entry |
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Manyi, G. J. et al., "Two-Loop Design In a Two Level Storage Hierarchy", IBM Technical Disclosure Bulletin, vol. 18, No. 8, Jan. 1976, pp. 2609-2610. |
Hwang, K. et al., "Computer Architecture and Parallel Processing", McGraw-Hill Book Company, 1984, pp. 98-102. |
IBM Technical Disclosure Bulletin, vol. 21, No. 6, Nov. 1978, pp. 2468-2469, "Data Processing System with Second Level Cache", F. Sparacio. |
IBM Technical Disclosure Bulletin, vol. 23, No. 7A, Dec. 1980, pp. 2915-1917, "System Cache for High Performance Processors", S. M. Desar. |
Number | Date | Country | |
---|---|---|---|
Parent | 626089 | Jun 1984 |