"CMOS Subnanosecond True-ECL Output Buffer" by Hans-Jurgen Schumacher, Jan Dikken, and Evert Seevinck; IEEE Journal of Solid-State Circuits, vol. 25, No. 1 Feb. 1990, pp. 150-154. |
"Proceedings of the Third Annual IEEE ASIC Seminar and Exhibit" by Kenneth W. Hsu, Ph.D., P. E. and Mark E. Schrader. Presented at Rochester Riverside Convention Center, Rochester, New York on Sep. 17-21, 1990. IEEE Catalog #09TH0303-8. |
"ECL-CMOS and CMOS-ECL Interface in 1.2-um CMOS for 150-MHz Digital ECL Data Transmission Systems" by Michael S. J. Steyaert, Pieter Vorenkamp, and Jan Sevenhans. IEEE Journal of Solid-State Circuits, vol. 26, No. 1, Jan. 1991, pp. 18-23. |
"High-Speed CMOS I/O Buffer Circuits" by Manabu Ishibe, Shoji Otaka, Junichi Takeda, Shigeru Tanaka, Yoshiaki Toyoshima, Satoru Takatsuka, and Shoichi Shimizu. IEEE Journal of Solid-State Circuits, vol. 27, No. 4, Apr. 1992, pp. 671-673. |
"A 2-um CMOS Digital Adaptive Equalizer Chip for QAM Digital Radio Modems" by Stefan R. Meier, Erik De Man, Tobias G. Noll, Ulrich Loibl, and Heinrich Klar. IEEE Journal of Solid-State Circuits, vol. 23, No. 5, Oct. 1988, pp. 1212-1217. |