High speed modulation of arrayed lasers

Abstract

A photonic device and modulating drive circuits. In one aspect the device is an array of lasers with modulator circuits for modulating a single selectable laser of the array of lasers.

Description

BACKGROUND

[0002] The present invention relates generally to data communication lasers, and more specifically to modulation of arrayed lasers.

[0003] Lasers are often used for data communication. Commonly the lasers are distributed feedback (DFB) lasers, although distributed Bragg reflecting (DBR) lasers, vertical cavity surface emitting lasers (VCSELs), and others may be used. The light emitted from lasers is used to form data signals, with light approximate a first level indicating a logical high signal and light approximate a second level, generally a very low level, indicating a logical low signal. The light is generally passed through a fiber optic line as a transmission media to a receiver.

[0004] Often the lasers emit light at a constant level, generally a high level, and the light is thereafter modulated to form a data signal. In such instances the modulation is often performed by an external modulator, such as an electro-absorption modulator or a lithium niobate Mach-Zehnder modulator. The use of a separate modulator, however, adds to system cost. Moreover, the benefits to signal quality provided by the use of a separate modulator may be unnecessary in some applications, particularly where length of signal travel is not overly great. An example of such applications would be metro communication rings. In such applications it may be more economical to directly modulate laser operation.

[0005] In some applications it is useful to provide multiple lasers on a single substrate. For example, in some applications transmission system reliability is an important consideration, as is transmission system time between failures. Failure of a laser, for example, may result in failure of the transmission system, and lasers may exhibit greater failure rates than other components. Further, in some applications, replacement of failed components may be difficult and time consuming. Accordingly, the use of multiple lasers, with some of the lasers serving as spares in the event of failure of a primary laser, is sometimes beneficial.

[0006] At times, multiple lasers may be provided on a single substrate. Providing multiple lasers on a single substrate, forming an array of lasers, is beneficial as manufacture of the lasers may be accomplished in an economical manner, and packaging of the lasers does not require undue space. However, in applications where the laser is directly modulated, modulation of a single laser may be desired. Common methods of directly modulating single lasers may be more difficult when an array of lasers on a common substrate is provided.

BRIEF SUMMARY OF THE INVENTION

[0007] The present invention provides photonic devices and circuits for use with photonic devices. In one aspect of the invention a photonic device is provided. The photonic device comprises an array of lasers on a common substrate; a drive switch adapted to selectively provide a current to a laser of the array of lasers; and a data switch coupling the common substrate to a ground based on a high speed data signal received by the data switch.

[0008] In another aspect the invention comprises a drive circuit for a tunable laser, the tunable laser comprising an array of lasers configured to lase at different wavelengths, the lasers being provided on a common substrate, light from a single selectable laser being coupled to an optical output using a moveable mirror, the drive circuit operating to modulate the light from a selected laser so as to carry a high speed data signal, the drive circuit comprising a switch coupling the common substrate to a low voltage level when the switch is in a first state, the state of the switch depending on a data signal received by the switch; and a drive switch providing a drive signal to the selected laser, based on a laser selection signal received by the drive switch, the drive signal charging a capacitor coupled to the selected laser, with the capacitor causing the selected laser to lase when the switch couples the common substrate to a low voltage.

[0009] In another aspect the invention comprises a drive circuit for a tunable laser, the tunable laser comprising an array of lasers configured to lase at different wavelengths, the lasers being provided on a common substrate, light from a single selectable laser being coupled to an optical output using a moveable mirror, the drive circuit operating to modulate the light from a selected laser so as to carry a high speed data signal, the drive circuit comprising a data line coupling a data signal to the lasers; and a drive switch providing a bias signal to a selected laser, based on a laser selection signal received by the drive switch, the bias signal in combination with the data signal to lase in accordance with the data signal.

[0010] In another aspect the invention comprises a photonic device comprising an array of lasers, the lasers being semiconductor diode lasers; a switch to bias one of the lasers with a dc current such that the one of the lasers lases; and means to apply an ac data signal to all of the lasers, whereby current to the one of the lasers is modulated by the ac data signal.

[0011] These and other aspects of the invention will be more fully comprehended upon study of this disclosure including the associated figures.

BRIEF DESCRIPTION OF THE DRAWINGS

[0012] FIG. 1 illustrates a schematic of a system of an array of lasers provided a single high speed data signal;

[0013] FIG. 2 illustrates an example laser of an array of lasers;

[0014] FIG. 3 illustrates an array of layers on a common substrate;

[0015] FIG. 4 illustrates a semi-block diagram of an embodiment of a laser system including an array of lasers on a common submount with an optical switch coupling light from a selected laser to an optical output;

[0016] FIG. 5 is a semi-block diagram of an embodiment of a laser system including a high speed driver chip in accordance with aspects of the invention;

[0017] FIG. 6 is a semi-schematic of an open collector approach for driving a single laser of an array of lasers;

[0018] FIG. 7 illustrates an array of lasers including on-chip and external capacitance;

[0019] FIG. 8 is the semi-schematic of FIG. 6 redrawn to show parasitic capacitances;

[0020] FIG. 9 is a semi-schematic of a bias-T approach for driving a single laser of an array of lasers;

[0021] FIG. 10 is a graph showing voltage versus current for a laser;

[0022] FIG. 11 illustrates a further array of lasers and on-chip and external capacitance; and

[0023] FIG. 12 is the semi-schematic of FIG. 9 redrawn to show parasitic capacitance.

DETAILED DESCRIPTION

[0024] FIG. 1 is a schematic of a system including an array of lasers. The array of lasers is provided a single high speed data signal, which is applied to a one of the lasers in the array of lasers. As illustrated in FIG. 1, a current source ill provides a bias current. The bias current is passed through an inductor 113 to a first end of a switch 115. The switch has a second end coupled to a laser array 117. As illustrated, the laser array includes four lasers 117a-d, formed on a common substrate 119. The substrate is coupled to ground.

[0025] A high speed data signal is applied to the bias current prior to passing through the switch. As illustrated in FIG. 1, the high speed data signal is provided on a data signal line 121, which includes a capacitor 123. The high speed data signal modifies the signal formed by the bias current so as to form a data drive current which may be, for example, a low level current signal indicating a logical low and a higher level current signal indicating a logical high. In operation, the switch passes the data drive current to a one of the four lasers, laser 117a as illustrated, and the data drive current passes through the laser to the ground, causing the laser to operably lase in accordance with the data drive current. The other lasers are left open.

[0026] In the embodiment of FIG. 1 the switch may be a relatively low speed switch, but preferably passes the relatively high speed data drive current without undue distortion.

[0027] In an alternative embodiment a plurality of lasers are provided on a common substrate. The plurality of lasers are divided into groups, each group comprising a plurality of lasers. Each group includes elements as described above. Thus, for example, on a 12 laser array it is possible to have two 1×6 switches capable of directing high speed signals and 2 high speed drivers. In a further alternative embodiment, the data signal is switchably connected to electro-absorption modulators, with an electro-absorption modulator per laser.

[0028] FIG. 2 illustrates a semiconductor waveguide laser. The laser of FIG. 2 may be used as a laser in the array of lasers of FIG. 1. In other embodiments other types of lasers are used. For example, in one embodiment the lasers in the array of lasers are VCSELs, DBR lasers, or other lasers. The laser of FIG. 2 is a simple ridge waveguide laser, though in other embodiments buried hetero-structure, buried rib, or other types of lasers are used. The laser epitaxial layers are grown on an n-type InP substrate 211. A first layer of the laser is an n-type epitaxially grown InP lower cladding layer 213, then an undoped InGaAsP quaternary active layer 215 comprising a quantum well and barrier layers, and then a top p-type InP cladding layer 217. The top p-type InP cladding layer is etched in the shape of a ridge using conventional photolithography. For a DFB laser, the growth is interrupted midway and a grating is etched into the laser (not shown). After the ridge is etched, the wafer is coated with an insulating dielectric 219, such as silicon nitride, with the dielectric removed on top of the ridge.

[0029] Metallization is applied to the top of the ridge, as shown by element 223. A second metallization step provides a contact regions 225, shown at the end of the stripe. The backside 227 of the substrate is also metallized to form an electrical contact. In operation, current flowing vertically through the laser, from the cladding layer 217 to the substrate contact 227, causes the laser to lase.

[0030] FIG. 3 illustrates an array of three ridge waveguide lasers 311a-c. Each of the lasers is formed on a common substrate layer 313, with the substrate layer including backside metallization forming a common contact. Each of the lasers also has metallization on top of their ridge.

[0031] FIG. 4 illustrates a device using an array of lasers 411, the array of lasers for example such as previously described. In the device of FIG. 4 the array of lasers is an array of single frequency lasers, such as distributed feedback (DFB) devices, on a semiconductor substrate. Each laser of the array of lasers is designed to operate at a different lasing wavelength. A number of techniques can be used to assign different wavelengths to each laser. These techniques include directly writing gratings with electron beam lithography, stepping a window mask during multiple holographic exposures, UV exposure through an appropriately fabricated phase mask, or changing the effective index of the mode of the lasers. Generally, for stable single mode characteristics, either a controlled phase shift is also included in the laser or gain/loss coupling is used in the grating. The wavelength of such lasers can be accurately controlled through dimensional variables, such as stripe width or layer thickness, and varied across the array.

[0032] A contact pad 413 is provided for injecting current into each of the lasers of the array of lasers. Light emitted from a laser is directed to an optical switch 415. The optical switch directs light from a one of the lasers to an optical output, illustrated in FIG. 4 as an optical fiber 417.

[0033] A variety of devices may be used as the optical switch. For example, the optical switch may be a MicroElectrical-Mechanical System (MEMS) mirror, which is translatable or rotatable along one, two, or more axis to direct light to the optical fiber. A system including such a mirror may be such as described in U.S. patent application Ser. No. 10/000,142, filed Oct. 30, 2001, entitled Tunable Controlled Laser Array, the disclosure of which is incorporated by reference herein. Other switching devices, such as described in International Patent Publication No. WO 02/13343 A2, published Feb. 14, 2002, the disclosure of which is incorporated by reference, may be used in various embodiments.

[0034] In operation, when current is injected into a laser of the array of lasers using, for example, contact pad 413, the laser emits radiation with a specific wavelength and from a particular position on the substrate, as represented by an arrow 419. In one embodiment, one laser is operated at a time, depending on the desired wavelength. Thus, as is described with respect to other figures, a switch may selectively provide a signal to a selected laser. The radiation or light from the lasers is transmitted to the optical switch. The optical switch has a number of states. In each particular state of a set of states, one of the input optical beams, i.e., light from one of the lasers, is transferred to the optical fiber.

[0035] FIG. 5 is a block diagram of a further embodiment in accordance with aspects of the invention. An array of lasers on a common substrate includes, as illustrated, four laser 511a-d. The lasers are each provided high speed drive inputs 513a-d. The substrate is coupled to ground. The high speed drive inputs are provided by a high speed driver 515. In one embodiment the high speed driver is a semiconductor device flip-chipped to a submount for the array of lasers. This reduces the length of the high speed drive inputs to the array of lasers. The high speed driver and the array of lasers are mounted in a standard butterfly package 517.

[0036] The high speed driver is provided a high speed data signal 519, a bias level signal 521, and an address signal 523. The address signal as illustrated is provided by four input lines 523a-d, although in various embodiments the address signal may be provided by various numbers of lines, including a single line. The high speed driver provides a high speed output to a selected one of the lasers based on the address signal. Circuitry for performing this may accomplished in a variety of manners. For example, in some embodiments the high speed data signal may be provided to four lines in the high speed driver, with the output level of the four lines being dependent on a combination of the address signal and the bias level signal. In such an embodiment the bias level signal may be either a signal indicative of a desired bias level or the bias level. In another embodiment the bias level signal and the high speed data signal may be combined to form a signal corresponding to the high speed output, with a high speed demultiplexer resident in the high speed chip providing the high speed output to a selected laser, with the high speed output based on the signal corresponding to the high speed output. One of the advantages of the embodiment of FIG. 5 is that a low number of high speed signals, such as a single high speed signal, is provided to the generally hermetically sealed package. Such a consideration may be important, for example, when a line providing the high speed signal might be required to be specially routed or otherwise configured to reduce electromagnetic emissions or distortions in the high speed signal.

[0037] In some embodiments each of the lasers in the array of lasers is configured to lase at different wavelengths. Such an array of lasers may be used in a tunable laser structure, with the array of lasers at different wavelengths used to increase the tuning range of an output signal. For these structures, a laser close to the desired wavelength is turned on and then fine-tuned to the desired wavelength using, for example, traditional methods. In this way wide tuning can be achieved with the excellent performance of narrow tuning structures. The output from the multiple lasers is coupled to a single fiber using active techniques such as MEMS, thermo-optic, liquid crystal, or passive techniques such as couplers or combiners, which can be integrated with the laser chip.

[0038] FIG. 6 is a block diagram of a further system in accordance with aspects of the invention. In the system of FIG. 6 an array of lasers 611 is formed on a common substrate 613. As illustrated in FIG. 6 the array of lasers comprises four lasers 611a-d. Each of the lasers is provided a drive line 615a-d. A switch 617 couples a bias current source 619 to a selectable one of the drive lines. The common substrate is coupled to ground through a low current source 621. The low current source provides sufficient current to maintain s the lasers at a logical low level, in which a laser slightly lases to improve laser response time.

[0039] The common substrate is also coupled to ground through a high speed switch 623. As illustrated, the high speed switch is a simple BJT transistor, with the collector of the transistor coupled to the substrate and the drain of the transistor coupled to ground. The gate of the transistor receives a high speed data signal 625. Other configurations of switches are also possible. For example, in many practical cases the high speed data signal may be a differential signal, with appropriate circuitry to receive the signal and couple the substrate to ground, or some low voltage.

[0040] In the embodiment of FIG. 6a capacitor 627a-d is coupled to each of the drive lines, with another end of each capacitor coupled, for example, to ground. The capacitor provides a substantially constant bias voltage to the laser coupled to the bias current source at a given time. A possible advantage of the use of the capacitor is that the length of drive line adapted to appropriately transmit high speed signals may be reduced. For example, in the embodiment of FIG. 6, the portion of the line from the capacitor to the laser is adapted to appropriately transmit high speed signals, while the remainder of the drive line is not so adapted.

[0041] Thus, the switch 617 and associated wiring and circuitry in the embodiment of FIG. 6 is not designed for high speed operation and signals. Instead, the lengths of line between the capacitor and the laser, and the laser and the high speed switch 623 are designed for high speed. In addition, only one high speed switch is used for the array of lasers.

[0042] In one embodiment of the system of FIG. 6, the capacitance of the capacitor is such that the RC time constant of the capacitor and the series resistance of the associated laser is much longer than the expected maximum length of repeating 1 or 0 bits in the high speed data signal. In another embodiment, the capacitance of the capacitor is such that the RC time constant of the capacitor and the series resistance of the associated laser sets a corner frequency which is lower than the low frequency cutoff of the transmission system. For example, for a 2.5 Gb/s system with a laser series resistance of 6 ohm, the capacitor has a capacitance of 350 pF or greater.

[0043] Such a capacitor may be formed in an area of approximately 300 μm2 using a single dielectric layer. The area used by the capacitor may be reduced if additional dielectric layers are used. Accordingly, in one embodiment the capacitors are provided on the semiconductor device forming the laser array. In an alternative embodiment the capacitors are provided on a submount to which the semiconductor device forming the laser array is mounted.

[0044] FIG. 7 illustrates a further device in accordance with aspects of the invention. In the device of FIG. 7 capacitance is provided both on a semiconductor device forming a laser array and on a submount to which the semiconductor device from the laser array is mounted. The device of FIG. 7 includes an array of lasers 711a-d formed on a common substrate 713. The substrate is electrically coupled to an electrical contact 715. The electrical contact is adapted for coupling to low bias current source and a high speed switch, with the low bias current source providing a low current for a laser logical low state and the high speed switch receiving a high speed data signal. Both the low bias current source and the high speed switch couple the substrate to, for example, ground.

[0045] An on-chip capacitance 717, forming a capacitor for each laser, is placed on the semiconductor material forming the array of lasers. One side of capacitors forming the on-chip capacitance is coupled by metallizations 719a-d to anodes of the lasers of the laser array. The one side of the capacitors are also coupled by connections 721a-d to external capacitors 723a-d. The external capacitors are mounted on the submount, which is generally ceramic. The external capacitors include a connection 725a-d to, for example, a switch coupling one of the external capacitors to a bias current source. The connections 725a-d are coupled to the same side of the external capacitors as the connections 723a-d to the on chip capacitors. The other side of the on-chip and external capacitors are coupled to ground by ground connections (727 for the on-chip capacitors, not shown for the external capacitors, but the side of the external capacitors mounted to the submount in some embodiments).

[0046] In the embodiment of FIG. 7 the external capacitors hold a laser selected for operation at a voltage, generally substantially constant, sufficient to drive the laser. Accordingly, in the embodiment of FIG. 7, the connections 723a-d from the on-chip capacitors to the lasers are adapted for high speed operation. The connections 725a-d, however, are medium speed connections, with for example the connections being rated for speeds up to a frequency determined by the RC time constant of the laser and capacitance.

[0047] In some applications parasitic capacitances may adversely impact overall system performance. Generally, for a devices described above parasitic capacitance affecting the high speed data signal may arise from driving the common substrate with a high speed signal, from the lasers in the logical low or off state, and from parasitic capacitance from the on-chip capacitors to ground.

[0048] FIG. 8 is the schematic of FIG. 6 redrawn to indicate parasitic capacitances affecting the high speed data signal. Accordingly, the schematic of FIG. 8 includes an array of lasers 811a-d formed on a common substrate 813, drive lines 815a-d, and a switch 817 coupling a bias current source 819 to the drive lines. The common substrate is coupled to ground through a low current source 821 and a high speed switch 823, which receives a high speed data signal 825. Capacitors 827a-d are coupled to each of the drive lines.

[0049] Also shown in the schematic are parasitic capacitances associated with the common substrate, the off lasers and on-chip capacitors. A common substrate parasitic capacitance 829 couples the common substrate to ground. In one embodiment the submount on which the common substrate is located is designed to reduce the common substrate parasitic capacitance to a level appropriate for system use. For example, for a 2.5 GHz application, with an array of twelve lasers, the submount and common substrate have a contact area of approximately 500×500 μm2, with the common substrate separated from ground planes by 100 μm, resulting in a capacitance of approximately 0.1 pF.

[0050] Laser parasitic capacitances 831a-d are associated with each of the lasers, and couple the laser cathodes to a ground plane. In one embodiment the lasers have a capacitance of approximately 3 pF per laser, and the design of such lasers is know in the art.

[0051] On-chip parasitic capacitances 833a-d are associated with the on-chip capacitors, which may be viewed for this purpose as the common substrate. Accordingly, in various embodiments iron doping, thick dielectric layers, or polyimid layers are used to achieve a capacitance of approximately less than 1 pF per laser due to the on-chip parasitic capacitances.

[0052] In one embodiment an array of twelve lasers is provided. In accordance with the foregoing explanation, a total capacitance is less than 50 pF. For a laser resistance of six ohms, the RC time constant is up to appoximately 300 ps, which is suitable for 2.5 Gb/s systems.

[0053] FIG. 9 is a schematic of a device in accordance with aspects of the invention. The device of FIG. 9 includes an array of lasers 911a-d on a common substrate 913. The common substrate is coupled to ground. A high speed data signal is passed to the anodes of all of the lasers by a high speed transmission line 915 including a matching resistor 917 and a capacitor 919a-d for each laser.

[0054] A bias current is provided by a bias current source 921. The bias current is coupled to a one of the lasers by a switch 923, with inductors 925a-d placed between the switch and the lasers. Although illustrated as a single inductor, in various embodiments each illustrated inductor may be a plurality of inductors in series, for example, with preferably smaller inductors approximate the lasers.

[0055] In operation the laser selected by the switch is sufficiently forward biased to sufficiently change state to provide light levels corresponding to a logical high and low. For example, laser operation for the device of FIG. 9 may be understood with respect to graph of FIG. 10. The graph of FIG. 10 is a graph of voltage versus current for an example laser. For lasers biased below a first voltage level V1, generally the non-selected lasers, little current flows through the laser, and the laser accordingly does not exhibit significant changes in light output. For voltages above the first voltage level V1, however, small changes in voltage result in significant changes in current passing through the laser. Accordingly, a small voltage change applied to a laser biased above the first voltage level V1 results in a relatively large change in current flowing through the laser, with corresponding changes in light emission. Therefore, the high speed signal, although provided to all of the lasers, only induces a significant current flow in the laser selected by switch 923.

[0056] FIG. 11 illustrates a device largely in accordance with the schematic of FIG. 9. The device of FIG. 11 includes a laser array 1111 having a common substrate 1113. The common substrate, including a contact 1115 is mounted on a submount 1117.

[0057] A high speed input line is provided to an end of a matching resistor 1119. The matching resistor has another end coupled to, mounted to as shown in FIG. 11, a capacitive coupling. The capacitive coupling provides a high speed signal on the high speed input line to capacitors 1123a-d mounted on the semiconductor device forming the laser array.

[0058] External inductors 1121a-d are mounted on the submount, although in other embodiments the inductors are spiral inductors directly patterned on to ceramic material of the submount or on the semiconductor device forming the laser array. In one embodiment, for example, the device is used in 2.5 Gb/s applications and the inductors are greater than 20 nH. The inductors are adapted to pass a bias signal to the lasers of the laser array by way of metallizations 1123a-d.

[0059] FIG. 12 is FIG. 9 redrawn to illustrate parasitic capacitances which may be considered for the device, particularly parasitic capacitances which may adversely impact high speed operation of the device. As illustrated, FIG. 9 includes parasitic capacitances due to the unbiased lasers and parasitic capacitances to ground planes. The parasitic capacitances to ground planes may include capacitance from the on-chip capacitors to the ground plane formed by the common substrate. These parasitic capacitances may be viewed in sum as capacitors 1211 coupling each of the laser anodes to the common substrate.

[0060] In some embodiments the parasitic capacitances are reduced by use of lasers which have a capacitance of 3 pF and/or through the use of iron doping, thick dielectric layers, or poly-imid layers to reduce the capacitance from the on-chip capacitors to the common substrate.

[0061] Thus, the present disclosure describes a photonic device and aspects of such a device. Although the device, and aspects of the device, have been described in certain specific embodiments, it should be recognized that the inventions of this disclosure are the claims and their equivalents supported by this disclosure.

Claims

1. A photonic device comprising: an array of lasers on a common substrate; a drive switch adapted to selectively provide a current to a laser of the array of lasers; and a data switch coupling the common substrate to a ground based on a high speed data signal received by the data switch.

2. The photonic device of claim 1 wherein the lasers in the array of lasers are each designed to emit light at different wavelengths.

3. The photonic device of claim 2 further comprising an optical switch coupling light emitted from the laser provided the current to an optical output.

4. The photonic device of claim 3 wherein the array of lasers is mounted on a submount.

5. The photonic device of claim 4 wherein the drive switch is part of a drive circuit mounted on the submount.

6. The photonic device of claim 5 wherein the drive circuit receives the current, the high speed data signal, and a selection signal.

7. The photonic device of claim 6 where the selection signal is provided by a plurality of address lines.

8. The photonic device of claim 3 further comprising a low bias current source coupling the common substrate to ground.

9. The photonic device of claim 8 further comprising a capacitor for each laser, with one end of each capacitor coupled to the corresponding laser and the other end of each capacitor coupled to ground.

10. The photonic device of claim 9 wherein the one end of each capacitor is coupled to the corresponding laser by a line adapted for high speed signal transmission.

11. The photonic device of claim 10 wherein a drive line couples the current to each capacitor, the drive line not being adapted for high speed signal transmission.

12. The photonic device of claim 10 wherein each capacitor is mounted on a semiconductor device forming the array of lasers.

13. The photonic device of claim 10 wherein each capacitor comprises an on-chip capacitor and an external capacitor.

14. The photonic device of claim 13 wherein the on-chip capacitors are mounted on a semiconductor device forming the array of lasers.

15. The photonic device of claim 14 wherein the semiconductor device forming the array of lasers is mounted on a submount and the external capacitors are mounted on the submount.

16. The photonic device of claim 15 wherein the RC time constant of each capacitor and corresponding laser is much longer than the expected length of repeating logical low or logical high bits in the high speed data signal.

17. A drive circuit for a tunable laser, the tunable laser comprising an array of lasers configured to lase at different wavelengths, the lasers being provided on a common substrate, light from a single selectable laser being coupled to an optical output using a moveable mirror, the drive circuit operating to modulate the light from a selected laser so as to carry a high speed data signal, the drive circuit comprising: a switch coupling the common substrate to a low voltage level when the switch is in a first state, the state of the switch depending on a data signal received by the switch; and a drive switch providing a drive signal to the selected laser, based on a laser selection signal received by the drive switch, the drive signal charging a capacitor coupled to the selected laser, with the capacitor causing the selected laser to lase when the switch couples the common substrate to a low voltage.

18. The drive circuit of claim 17 further comprising a low bias current source coupling the common substrate to the low voltage.

19. A drive circuit for a tunable laser, the tunable laser comprising an array of lasers configured to lase at different wavelengths, the lasers being provided on a common substrate, light from a single selectable laser being coupled to an optical output using a moveable mirror, the drive circuit operating to modulate the light from a selected laser so as to carry a high speed data signal, the drive circuit comprising: a data line coupling a data signal to the lasers; and a drive switch providing a bias signal to a selected laser, based on a laser selection signal received by the drive switch, the bias signal in combination with the data signal to lase in accordance with the data signal.

20. The drive circuit of claim 19 wherein the data line includes a capacitance for each laser, and the data signal is provided to the anodes of the lasers.

21. A photonic device comprising: an array of lasers, the lasers being semiconductor diode lasers; a switch to bias one of the lasers with a dc current such that the one of the lasers lases; and means to apply an ac data signal to all of the lasers, whereby current to the one of the lasers is modulated by the ac data signal.

22. The photonic device of claim 21 where the lasers of the array of lasers lase at different wavelengths, whereby the wavelength of light from the photonic device may be tuned by selecting different lasers in the array of lasers.

23. The photonic device of claim 22 where the lasers are distributed feedback lasers.

24. The photonic device of claim 21 where the output of the array of semiconductor diode lasers is coupled to a single fiber using a passive combiner.

25. The photonic device of claim 21 where the output of the semiconductor diode lasers are coupled to a single fiber using a wavelength dispersive element.

26. The photonic device of claim 21 where the wavelength dispersive element is an arrayed waveguide device.

27. The photonic device of claim 21 where the output of the array of semiconductor diode lasers is coupled to single fiber using an optical switch.

28. The photonic device of claim 27 where the optical switch comprises a MEMS mirror.

29. The photonic device of claim 28 lasers are distributed feedback lasers.

30. The photonic device of claim 21 wherein the lasers each have a first contact coupled together and to a high speed switch.

31. The photonic device of claim 30 wherein high speed switch connects the contacts to a substantially fixed voltage based on the state of the ac data signal.

32. The photonic device of claim 31 wherein the lasers each have a second contact are selectively coupled to a biasing circuit by a switch, with at most a one of the second contacts coupled the biasing circuit for a given state of the switch.

33. The photonic device of claim 32 wherein capacitance are connected between each of the second contacts and a fixed voltage, whereby a voltage of said second contacts may be maintained at a substantially fixed level.

34. The photonic device of claim 33 wherein a high speed connection is provided between the capacitance and the second contacts.

35. The photonic device of claim 34 wherein at least some of the capacitance are capacitors are fabricated on a semiconductor device forming the array of lasers.

36. The photonic device of claim 35 wherein the capacitors fabricated on the semiconductor device forming the array of lasers chip is formed of conductive layers separated by a thin dielectric material.

37. The photonic device of claim 21 where a first contact of the lasers are connected to a fixed voltage source.

38. The photonic device of claim 37 where second contacts of the lasers are connected by capacitors to the ac data signal.

39. The photonic device of claim 38 where the second contacts are also each connected through an inductance associated with each second contact to a 1×N switch, which connects a selected laser to the dc current.

40. The photonic device of claim 39 where some of said inductors are spiral inductors fabricated by patterning material to which lasers are mounted.

41. The photonic device of claim 39 where some of the capacitors are fabricated on the semiconductor diode laser chip using conductive layers separated by a diaelectric.

42. The photonic circuit of claim 39 wherein the capacitors are fabricated on material to which the semiconductor is mounted using conductive layers separated by a dielectric.

43. The photonic circuit of claim 39 where a matching resistor is used to match the impedence of a data line carrying the ac data signal.