HIGH VOLTAGE GATE DRIVER IC (HVIC) WITH INTERNAL CHARGE PUMPING VOLTAGE SOURCE

Abstract

A circuit for using a high voltage gate driver IC (HVIC) for regulation of external floating voltage sources without use of regulation circuits. The circuit including high and low switches; at least one external voltage source coupled to the high and low switches; an HVIC having at least one internal charge pumping voltage source circuit, the HVIC being coupled to gate terminals of the high and low switches; and at least one charge pumping capacitor coupled to the at least one internal charge pumping voltage source circuit for regulating the external voltage of at least one external voltage source.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a diagram of a circuit using a conventional HVIC for driving a half bridge;

FIG. 2 is a diagram of a circuit using a conventional HVIC for special applications, for example PDP, the circuit including external voltage sources with regulation for each of the switches;

FIG. 3 is a diagram of a circuit using an HVIC having internal charge pumping voltage source in accordance with the present invention;

FIG. 4 is a diagram of a charge pumping circuit topology of the HVIC of FIG. 3; and

FIG. 5 is a diagram of circuit improving the charge pumping circuit topology of FIG. 4.

Claims

1. A circuit for using a high voltage gate driver IC (HVIC) for regulation of external floating voltage sources without use of regulation circuits, the circuit comprising: high and low switches;at least one external voltage source coupled to the high and low switches;an HVIC having at least one internal charge pumping voltage source circuit, the HVIC being coupled to gate terminals of the high and low switches; andat least one charge pumping capacitor coupled to the at least one internal charge pumping voltage source circuit for regulating the external voltage of at least one external voltage source.

2. The circuit of claim 1, further comprising: a voltage source for the HVIC; andat least one capacitor coupled between the HVIC and the at least one external voltage sources, wherein the HVIC receives high and low input signals and provides high and low control signals for controlling the high and low switches.

3. The circuit of claim 2, wherein the at least one internal charge pumping voltage source circuit comprises: at least two switches, first terminals of the at least two switches being coupled at a first node;first and second in series coupled diodes, a cathode of the first diode and an anode of the second diode being coupled at a second node,wherein the at least one charge pumping capacitor being coupled between the first and second nodes.

4. The circuit of claim 3, wherein the at least one internal charge pumping voltage source circuit further comprises: an inverter coupled to gate terminals of the at least two switches, anda Zener diode parallel coupled to the at least one capacitor.

5. The circuit of claim 3, wherein the at least two switches are high voltage switches and second terminals of the at least two switches are coupled to the ground, an anode of the first diode being coupled to the voltage source, and a cathode of the second diode being coupled to the at least one capacitor.

6. The circuit of claim 5, wherein the at least one internal charge pumping voltage source circuit is used to regulate varying voltage at a terminal of the at least one external voltage source.

7. The circuit of claim 3, wherein the at least two switches are low voltage switches and a second terminal one of the at least two switches is coupled to the voltage source, a second terminal the other the at least two switches is coupled to the ground, an anode of the first diode being coupled to the ground, and a cathode of the second diode being coupled to the at least one capacitor.

8. The circuit of claim 7, wherein the HVIC is a Level Shift Down HVIC and the at least one internal charge pumping voltage source circuit is a low-side output driver.

9. The circuit of claim 3, wherein the charge pumping capacitor isolates DC voltage.

10. The circuit of claim 3, wherein the at least two switches are integrated in the HVIC.

11. The circuit of claim 3, wherein the first and second in series coupled diodes are integrated in the HVIC.

12. The circuit of claim 3, wherein the at least two switches and the first and second in series coupled diodes are integrated in the HVIC.