Patent Application
20120027447
1. Field of the Invention
The present invention relates to a high-voltage generation apparatus, and more particularly, to a high-voltage generation apparatus capable of raising the high voltage to a target voltage at high speed, and an image forming apparatus including the high-voltage generation apparatus.
2. Description of the Related Art
In a conventional electrophotographic image forming apparatus, a charging device uniformly charges a surface of an electrophotographic photosensitive member (hereinafter referred to as a photosensitive drum), and an exposure device exposes the charged surface of the photosensitive drum, to form an electrostatic latent image. A development device develops the electrostatic latent image with a developer (hereinafter referred to as toner), to form a toner image, and a transfer device transfers the developed toner image onto a recording material. A fixing device fixes the toner image onto the recording material, and outputs the fixed toner image. The transfer device includes a transfer roller for forming a nip portion with the photosensitive drum and conveying the recording material. A high voltage that is opposite in polarity to the toner (hereinafter referred to as a transfer bias) is applied so that the toner image is transferred onto the recording material.
Control to apply the transfer bias will be described below. A resistance of the transfer roller to which the transfer bias is applied easily varies according to ambient temperature and humidity. When an applied current value is lower than a desired transfer current value, defective transfer may occur. When the applied current value is higher than the desired transfer current value, an excessive current flows in a margin portion of the recording material (an area where the toner image has not been formed), and the effect of the excessive current also remains after the recording material goes around the photosensitive drum so that a trace of the recording material appears on the photosensitive drum. When a recording material of a small size passes through the transfer roller, a large part of the excessive transfer current flows between the transfer roller, which is not covered with the recording material, and the photosensitive drum so that image defect called a ghost may occur. In order to optimize the transfer bias to be applied to the transfer roller so that the excessive transfer current is not applied, a resistance value of the transfer roller is measured, and the transfer bias is properly controlled according to a measurement result. This control is a well-known control method called active transfer voltage control (ATVC).
In the ATVC control, the transfer bias is applied to the transfer roller while the photosensitive drum is rotated for a predetermined period prior to an image forming process after a printing instruction, an applied current value at this time is measured, and the measured value is fed back to a controller. The controller adjusts the transfer bias so that the applied current value becomes a predetermined value. The adjusted transfer bias is applied to the transfer roller during transfer in the image forming process. According to this ATVC control, even if an impedance of the transfer roller varies with a change in environment, the transfer bias can be applied so that the applied current value becomes an appropriate value.
Recently, a method for performing the ATVC control by software in a controller instead of performing the control by hardware has been mainstream. This is an effective method for achieving simplification and stabilization of a circuit configuration and control. More specifically, processing for applying a transfer bias to a transfer roller as a predetermined voltage, monitoring an applied current value detected by hardware at this time using a controller, and finding a transfer bias (a voltage value) to be applied from the monitored current value and a target current value are executed by software. If an output range of the transfer bias and a range of a load variation are wide, however, the following issue arises when the above-mentioned control method by software is executed.
When a characteristic of an applied bias at the time of startup greatly differs depending on a load condition (e.g., a load variation), for example, a startup time elapsed until the bias converges at a target voltage may vary, and an overshoot or an undershoot may occur. This may cause a decrease in image quality or a deterioration of the photosensitive drum.
Japanese Patent Application Laid-Open No. 2004-88965 discusses an image forming apparatus in which a controller compares an output value obtained by analog-to-digital (A/D) conversion and a target voltage for each predetermined period (e.g., every 10 ms), and controls a pulse width modulation (PWM) signal for driving a boosting transformer according to a comparison result, to reduce a variation in a startup time and an overshoot or an undershoot.
Japanese Patent Application Laid-Open No. 2004-88965 discusses a method for calculating an average of impedances from an output value obtained by performing A/D conversion a plurality of numbers of times from a leading edge of a recording material and an output voltage that has been fed back, and calculating a value of a PWM signal (i.e., a time width of a high-level pulse out of high-level and low-level pulses of the PWM signal, which is hereafter referred to as an on-duty or an on-duty width) based on two conditions, i.e., a range of the calculated average (a first condition) and a range of a difference between the current output value and a target voltage (a second condition). According to Japanese Patent Application Laid-Open No. 2004-88965, control by software enables a time required for the output voltage to converge toward a desired transfer bias to be shortened, and enables an overshoot or an undershoot to be reduced.
As another example for raising a high voltage to a target voltage at high speed, Japanese Patent Application Laid-Open No. 9-93920 discusses a method for comparing a detected voltage of a voltage detection circuit and a second reference voltage slightly lower than a reference voltage, to perform control to slow a charging rate to a capacitor serving as a load when the detected voltage of the voltage detection circuit exceeds the second reference voltage. In Japanese Patent Application Laid-Open No. 9-93920, a fast charging area, a slow charging area, and a maintenance charging area are provided in this order from the time of startup. After the start of the startup, an output voltage is rapidly raised by setting an on-duty width of a PWM signal to the maximum on-duty width. When the output voltage becomes the second reference voltage (exemplified as approximately 90%), the fast charging area is switched to the slow charging area. An integration circuit is provided on the input side of a circuit for generating a pulse of the PWM signal. The capacitor is rapidly charged in an early stage of a startup time by the integration circuit, while being slightly charged and discharged in the slow charging area and the maintenance charging area so that an overshoot or an undershoot is suppressed.
As described above, there have been devices to increase the speed of control of a transfer bias and reduce an overshoot or an undershoot. Recently, as one of measures to improve the productivity of an image forming apparatus, a time elapsed since a computer such as a personal computer (PC) issued a printing instruction (sent a print command) until printing on a first recording material is completed (hereinafter referred to as a first print out time (FPOT)) is required to be further shortened. When the FPOT is further shortened, a user can enjoy an advantage that printing is completed in a short time after the printing instruction is issued. When the FPOT is further shortened, a time required to perform the above-mentioned ATVC control is required to be further shortened.
The control method for the control voltage to converge at the target voltage by software, which is discussed in Japanese Patent Application Laid-Open No. 2004-88965, also produces a time shortening effect to some extent. However, a setting update by the software is executed at predetermined intervals so that a control period is lengthened. Further, a convergence time corresponding to the cumulative number of updates is required. Therefore, the control by the software has a limitation for the output voltage to further converge at the target voltage in a short time.
In the control method discussed in Japanese Patent Application Laid-Open No. 2004-88965, the output voltage converges at the target voltage in open-loop control by changing the on-duty width of the PWM signal for switching the boosting transformer. An output value is not detected until hardware is started up (reaches a steady area), to update the succeeding set value. More specifically, if the on-duty width and the output voltage (the reach voltage in the steady area without feedback control) have a relationship of linearity, the speed of the control method can be increased. However, a circuit having linearity is not easily configured, and the linearity is not easily retained because it is affected by a time constant of a circuit and a variation in each element. If the linearity is not retained, a change amount of the output voltage varies even if it has the same time width, so that stability and accuracy of control of the output voltage are reduced. An attempt to improve the linearity may conversely raise the possibility that another adverse effect such as a decrease in response occurs.
In Japanese Patent Application Laid-Open No. 9-93920, in the maintenance charging area where control for maintaining a target voltage is performed, control to slightly increase or decrease an output voltage to maintain the output voltage at the target voltage is performed by slightly increasing or decreasing an input voltage for a circuit for outputting the pulses of the PWM signal. However, the input voltage is only slightly decreased at the time of transition from the slow charging area to the maintenance charging area. Therefore, an overshoot voltage is not easily reduced. In order to reduce the overshoot voltage, startup in the slow charging area may be made slower. However, if the startup is made too slow, a startup time is lengthened. The integration circuit is used on the input side of the circuit for outputting the pulse of the PWM signal. If the integration circuit is used, a start time (an integration time) to raise the on-duty width of the PWM signal from zero to the maximum on-duty width is required.
According to an aspect of the present invention, a high-voltage generation apparatus includes a transformer, a switching unit configured to drive the transformer, a generation unit configured to generate a driving signal for driving the switching unit, a rectification unit configured to rectify an output voltage from the transformer to output a direct-current voltage, a detection unit configured to detect the direct-current voltage, a setting unit configured to set a target voltage of the direct-current voltage, a feedback control unit configured to control the driving signal according to the detected direct-current voltage and the set target voltage, and an output control unit configured to raise the direct-current voltage by a change amount corresponding to the target voltage without performing a feedback control by the feedback control unit in a transient-state period elapsed since the output of the direct-current voltage is started until the direct-current voltage reaches the target voltage.
According to another aspect of the present invention, an image forming apparatus includes an image forming unit configured to form an image on a recording material, and a high-voltage power source configured to apply a high voltage to the image forming unit, in which the high-voltage power source includes a transformer, a switching unit configured to drive the transformer, a generation unit configured to generate a driving signal for driving the switching unit, a rectification unit configured to rectify an output voltage from the transformer to output a direct-current voltage, a detection unit configured to detect the direct-current voltage, a setting unit configured to set a target voltage of the direct-current voltage, a feedback control unit configured to control the driving signal according to the detected direct-current voltage and the set target voltage, and an output control unit configured to raise the direct-current voltage by a change amount corresponding to the target voltage without performing a feedback control by the feedback control unit in a transient-state period elapsed since the output of the direct-current voltage is started until the direct-current voltage reaches the target voltage.
According to yet another aspect of the present invention, a high-voltage generation apparatus includes an output unit configured to output a voltage, a detection unit configured to detect the output voltage, a setting unit configured to set a target value of the output voltage, a feedback control unit configured to control driving of the voltage output unit according to the detected voltage and the set target value, and an output control unit configured to control to raise the output voltage by a change amount corresponding to the target value without performing the control by the feedback control unit in a transient-state period elapsed since the output of the voltage from the voltage output unit is started until the voltage reaches the target value.
According to yet another aspect of the present invention, an image forming apparatus includes an image forming unit configured to form an image on a recording material, and a high-voltage power source configured to apply a high voltage to the image forming unit, in which the high-voltage power source includes an output unit configured to output a voltage, a detection unit configured to detect the output voltage, a setting unit configured to set a target value of the output voltage, a feedback control unit configured to control driving of the voltage output unit according to the detected voltage and the set target value, and an output control unit configured to control to raise the output voltage by a change amount corresponding to the target value without performing the control by the feedback control unit in a transient-state period elapsed since the output of the voltage from the voltage output unit is started until the voltage reaches the target value.
Further features and aspects of the present invention will become apparent from the following detailed description of exemplary embodiments with reference to the attached drawings.
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate exemplary embodiments, features, and aspects of the invention and, together with the description, serve to explain the principles of the invention.
Various exemplary embodiments, features, and aspects of the invention will be described in detail below with reference to the drawings.
A high-voltage generation apparatus according to an exemplary embodiment of the present invention shortens a startup time by hardware and further shortens a time for one updating cycle to shorten a convergence time at a target voltage. More specifically, in a stage before startup of the high-voltage generation apparatus, in a transient-state period of the startup or a period that is at least a part of the startup, a slew rate or a startup period width is variably set according to the magnitude of a target voltage. Further, a boosting transformer in the high-voltage generation apparatus starts to be driven under a driving condition in which an output voltage reaches a target voltage at a steep slew rate in a transient state. The output voltage can converge at the target voltage without any overshoot or undershoot and in a short time regardless of whether the target voltage is high or low.
A high-voltage generation apparatus according to a first exemplary embodiment of the present invention divides a transient-state period elapsed from the start of startup until an output voltage reaches a target voltage into a high-speed startup period immediately after the start of startup and a constant voltage control waiting period elapsed before the output voltage reaches the target voltage, and respectively sets on-duty widths (conduction time widths) of PWM signals serving as driving signals for switching between the high-speed startup period and the constant voltage control waiting period. In the constant voltage control waiting period elapsed before the output voltage reaches the target voltage, control is performed so that the on-duty width is decreased, and a startup capability of the high-voltage generation apparatus (hereinafter described as a capability representing the magnitude of a voltage for raising a potential at a load output unit per unit time) is reduced. The high-speed startup period in the transient-state period can be previously variably set according to the magnitude of the target voltage.
The outline of a configuration of the high-voltage generation apparatus will be first described with reference to
The microcomputer 1 sets data at predetermined timing for a register 36 provided in the ASIC 7 to set a target voltage in the high-voltage generation apparatus, set ON/OFF timing, an on-duty width of a PWM signal, and set a timer time, described below. The ASIC 7 outputs a high-voltage control signal HVCNT for setting a target voltage of the high-voltage generation circuit 8 and a PWM signal HVPWM for performing switching driving of the high-voltage generation circuit 8 to the exterior, and receives a target voltage reach signal/HVATN indicating that an output voltage of the high-voltage generation circuit 8 has reached the target voltage from the exterior.
The high-voltage control signal HVCNT is output to the exterior as an analog signal from a digital-to-analog (D/A) converter provided in the ASIC 7. The high-voltage control signal HVCNT may be output in the form of a PWM signal, or may be converted into a direct-current (DC) voltage by a high-order low-pass filter or the like having an improved response characteristic at a frequency of the PWM signal.
The output current detection circuit 9 virtually grounds one end of the output voltage detection circuit 4 to hold a ground (GND) potential, to prevent a reduction in detection accuracy of the output voltage depending on the magnitude of a load current while detecting the load current with high accuracy. The output current detection circuit 9 detects the load current for the above-mentioned ATVC control.
An outline of an operation of the high-voltage generation circuit 8 in the high-voltage generation apparatus illustrated in
A configuration of a hardware logic circuit loaded in the ASIC 7 will be described below. Setting units in the register 36 will be first described. The register 36 includes the following setting units:
Circuits other than the register 36 provided in the ASIC 7 will be described below. A calculation circuit 30 calculates a timer time uniquely determined according to a set register value in the HVtgt setting unit 140. A counter block 31 functions to gradually increase the on-duty width from zero to the maximum on-duty width set in the DUTY_max setting unit 133 by the time width set in the slow-on setting unit 132 and output the maximum on-duty width from a PWM generation unit 32. The microcomputer 1 can variably set the maximum on-duty width for the DUTY_max setting unit 133. A startup capability of the high-voltage generation apparatus is easily adjustable without changing hardware (specifications such as the number of windings of the boosting transformer T1).
The PWM generation unit 32 outputs a PWM signal having the on-duty width set in the DUTY_Tr1 setting unit 134 at the time interval set in the timer setting unit 136 and at switching timing corresponding to setting by the Enable setting unit 131. The output of the PWM signal is followed by output of a PWM signal having the on-duty width set in the DUTY_Tr2 setting unit 135. The on-duty width of the PWM signal is instantaneously reduced to zero when the signal /HVATN indicating that the output voltage reaches the target voltage enters a low level. Then, the PWM generation unit 32 is controlled to output a PWM signal having an on-duty width that gradually increases. An output permission unit 33 stops outputting the PWM signal when either one of the Enable setting unit 131 and the target voltage reach signal/HVATN enters a low level. A target signal generation unit 35 generates an analog signal based on the set register value in the HVtgt setting unit 140.
The following are six functions (a) to (f) of the hardware logic circuit in the ASIC 7 described above:
(a) A register for setting a plurality of on-duty widths set by the microcomputer 1, a register for enabling output of a PWM signal, a register for setting a target voltage, and a register for setting a time width for gradually increasing an on-duty width of a PWM signal. The register for setting a plurality of on-duty widths includes a register for setting an on-duty width of a PWM signal in the high-speed startup period T1, a register for setting an on-duty width of a PWM signal in the constant voltage control waiting period T2, and a register for setting the maximum time width of a PWM signal that can be generated in a constant voltage control area.
(b) An analog signal that has followed a value of the register for setting a target voltage (the HVtgt setting unit 140) is output to the outside of the ASIC 7 via the D/A converter.
(c) A timer time based on the value of the register for setting a target voltage (the HVtgt setting unit 140) is calculated and written into the register.
(d) The PWM signal having the on-duty width in a high-speed startup period T1 and the PWM signal having the on-duty width in a constant voltage control waiting period T2 are sequentially generated and output according to the timer time.
(e) The on-duty width of the PWM signal is instantaneously reduced to zero by a target voltage reach signal (/HVATN) input from the exterior.
(f) The on-duty width is gradually increased from zero to a predetermined on-duty width by the time width set in the register.
Details of the generation of the PWM signal and the setting of the timer time respectively described in the foregoing items (c) and (d) will be described with reference to
The calculation circuit 30 sets the timer time uniquely determined according to the set register value in the HVtgt setting unit 140 in the timer setting unit 136. The timer time to be set will be described below. The set register value in the HVtgt setting unit 140 and the timer time in the timer setting unit 136 are in a relative relationship of linearity. The microcomputer 1 sets the Enable register 131, to start to output a voltage. The PWM generation unit 32 outputs the PWM signal having the on-duty width that has followed the on-duty width in the high-speed startup period T1 set in the DUTY_Tr1 setting unit 134 in a time interval based on the timer time set in the timer setting unit 136. The PWM signal is output by the function of the ASIC 7. Therefore, a startup time for increasing the on-duty width from zero to the on-duty width of the PWM signal is not required. The PWM signal having the set on-duty width can be instantaneously output, starting at its first pulse. When the timer time set in the timer setting unit 136 has elapsed, a PWM signal having an on-duty width that has followed the DUTY_Tr2 setting unit 135 for setting the on-duty width in the constant voltage control waiting period T2 is then output.
More specifically, the PWM generation unit 32 outputs a PWM signal having a large on-duty width, starting at its first pulse, immediately after the startup of the high-voltage generation apparatus is started, to instantaneously raise an output voltage at a steep and high slew rate. The PWM generation unit 32 outputs a PWM signal having an on-duty width at a low slew rate so that an overshoot, an undershoot, or a voltage vibration does not occur after a previously set timer time has elapsed. The timer time is variably set to a value that is kept in a relationship of linearity with the target voltage. Therefore, the high-voltage generation apparatus can be started in a startup time width (at a slew rate) that has been varied depending on the target voltage. After a lapse of the timer time, the high-speed startup period T1 is switched to the constant voltage control waiting period T2. Therefore, even in a high-voltage generation apparatus a startup capability of which is set high, an on-duty width of a PWM signal first output is corrected according to the magnitude of a target voltage. Thus, when the target voltage is high, a switching time by a PWM signal having a large on-duty width is lengthened, to shorten a startup period. On the other hand, when the target voltage is low, the switching time is shortened, to reduce an overshoot or an undershoot. More specifically, the overshoot or the undershoot can be reduced regardless of whether the target voltage is high or low, and the output voltage can reach the target voltage in a short time.
Details of control of the on-duty width of the PWM signal in response to the target voltage reach signal/HVATN described in the above-mentioned items (e) and (f) will be described below. Peripheral circuits of the boosting transformer T1 provided in the high-voltage generation circuit 8 will be first described, and an operation of the comparator CMP10 that outputs the target voltage reach signal /HVATN will be then described.
The PWM signal HVPWM output from the ASIC 7 is input to a gate terminal of a field effect transistor (FET) Q4. The FET Q4, a power source voltage Vcc, and a resistor R8 drive a gate terminal of an FET Q5 (a power metal oxide semiconductor field effect transistor (power MOSFET) in this example) in response to the PWM signal HVPWM input to the gate terminal of the FET Q4. The FET Q5 switching-drives the boosting transformer T1. The boosting transformer T1, which has been switching-driven, outputs a high pulsating voltage. The high pulsating voltage output from the boosting transformer T1 is output to a load unit HVoutput after being rectified by a rectification circuit including a diode D2, a capacitor C5, and the output voltage detection circuit 4 and changed into a DC voltage. The output voltage detection circuit 4 divides the high output voltage to the load unit HVoutput, to detect a divided voltage Vdt. The comparator CMP10 monitors the detected divided voltage Vdt, and compares the divided voltage Vdt with a target voltage Vtgt set in response to the high-voltage control signal HVCNT. The comparator CMP10, which has compared the detected voltage Vdt and the target voltage Vtgt, generates a high-level output when the detected voltage Vdt is the target voltage Vtgt or less, and generates a low-level output when the detected voltage Vdt is the target voltage Vtgt or more.
The ASIC 7 instantaneously masks the PWM signal output by the output permission unit 33 when the target voltage reach signal /HVATN enters a low level, to instantaneously reduce the on-duty width of the PWM signal to zero. The on-duty width becomes a low-level logic in the PWM signal HVPWM output from the ASIC 7, and becomes a high-level logic at the gate terminal of the FET Q5. More specifically, a signal fixed at a high level is output. When the PWM signal instantaneously outputs the signal fixed at a high level, the FET Q4 is turned off, and the FET Q5 connected thereto is instantaneously turned off, to instantaneously turn off the high-voltage generation circuit 8.
On the other hand, when the target voltage reach signal /HVATN is changed from a low level to a high level, the counter block 31 outputs to the PWM generation unit 32 data for gradually increasing the on-duty width to the on-duty width based on data set in the DUTY_max setting unit 133. The time width for gradually increasing the on-duty width is determined by a register value in the slow-on setting unit 132. The PWM generation unit 32 outputs a slow-on PWM signal to the outside of the ASIC 7.
More specifically, the ASIC 7 instantaneously reduces the on-duty width of the PWM signal to zero when the detected voltage Vdt exceeds the target voltage Vtgt, to instantaneously turn off the high-voltage generation circuit 8. When the detected voltage Vdt falls below the target voltage Vtgt, a time constant is given to an increase in the on-duty width, to slowly turn on the high-voltage generation circuit 8. Thus, a voltage vibration (also referred to as a ripple or a hunting) generated by feedback control when the high-voltage generation circuit 8 is maintained at a constant voltage can be significantly reduced.
In the present exemplary embodiment, the present invention is applied to a high-voltage generation apparatus in which a driving frequency of the boosting transformer T1 is 50 kHz (a period of 20 μs) and an input/output response time (a delay time) of a boosting circuit including the boosting transformer T1 and the rectification circuit is 20 μs and which has a startup capability of several hundred volts by switching driving of one pulse as an example. In the present exemplary embodiment, a DC voltage is raised by respective change amounts of 125 V, 200 V, and 300 V for each predetermined period (for each 20 μs) corresponding to the driving frequency. The input/output response time of the boosting circuit becomes dominant. Therefore, it is assumed that there is no delay time other than the above-mentioned delay time.
The case where the target voltage is 5 kV will be described with reference to
On the other hand,
When the target voltage is 5 kV, therefore, the output voltage converges to the target voltage 5 kV without any great overshoot even if the high-voltage generation apparatus is boosted by 125 V per one-pulse driving or boosted by 300 V per one-pulse driving by being further speeded up.
If a target voltage is low, and a boosting capability per pulse is high (e.g., the high-voltage generation apparatus is boosted by 300 V per one-pulse driving to a target voltage of 1 kV), as illustrated in
On the other hand,
On the other hand,
A timer time in the first transient area serving as the high-speed startup period T1 is set to a predetermined value corresponding to the target voltage. In this example, the timer time in the first transient area is set to 0.3 ms and 0.04 ms, respectively, when the target voltage is +5 kV and when the target voltage is +1 kV, as illustrated in
An operation in the constant voltage control period T3 (the steady area) performed immediately after the output voltage reaches the target voltage will be described below with reference to
In a high-voltage generation apparatus discussed in Japanese Patent Application Laid-Open No. 9-93920, in a maintenance charging area controlled to maintain a target voltage, an output voltage is slightly increased and decreased by slightly increasing and decreasing an input voltage to a PWM circuit to reduce a voltage vibration of the target voltage. However, at the time of transition from a slow charging area to the maintenance charging area, the input voltage is only slightly decreased. Therefore, an overshoot at a time point where the output voltage reaches the target voltage is easily increased, as illustrated in
On the other hand, in an output waveform of the high-voltage generation apparatus according to the present exemplary embodiment illustrated in
In the present exemplary embodiment, a method for varying the timer time in the first transient area according to the magnitude of the target voltage has been described by an example in which the on-duty width of the PWM signal in the first transient area is constant. On the other hand, a method for variably controlling the on-duty width of the PWM signal may be used, as described below. The method for variably controlling the on-duty width of the PWM signal in the first transient area makes variable control of a timer time easily feasible, and can produce a substantially similar effect to that in the above-mentioned method. An example of an operation in the method for variably controlling the on-duty width of the PWM signal in the first transient area will be described below.
<Example of Operation for Variable Control of on-Duty Width of PWM Signal>
(1) An on-duty width of an initial PWM signal in a first transient area serving as a first period and an on-duty width of a PWM signal at the time of transition to a second transient area serving as a second period subsequent to the first period are respectively set, and the on-duty width is gradually changed in the first transient area. The initial on-duty width in the first transient area and the on-duty width at the time of transition to the second transient area are set to predetermined values independently of a target voltage. In order to vary a timer time in the first transient area according to the magnitude of the target voltage, control to change the on-duty width by a predetermined step amount in the first transient area is performed.
(2) An on-duty width of an initial PWM signal in a first transient area and an on-duty width of a PWM signal at the time of transition to a second transient area are respectively set, and the on-duty width is gradually changed in the first transient area. The on-duty width at the time of transition to the second transient area and a step amount (a change amount) in which the on-duty width is gradually changed are set to predetermined values independently of a target voltage. A timer time in the first transient area is varied according to the magnitude of the target voltage. More specifically, the initial on-duty width at the start of startup in the first transient area is variably set.
As described above, according to the present exemplary embodiment, the on-duty width of the PWM signal in the first transient area is variably set depending on the target voltage, and the PWM signal is instantaneously output in the high-speed startup period T1. More specifically, the high-voltage generation circuit 8 can be started with a time width at the time of startup, which is varied with a high resolution according to the target voltage, and instantaneously.
Further, when the detected voltage exceeds the target voltage, control is performed so that the detected voltage is maintained at the target voltage by instantaneously reducing the on-duty width of the PWM signal to zero. As a result, even in a high-voltage generation apparatus a startup capability of which is further increased and in which a target voltage is set to a value in a wide range, an output voltage can reach the target voltage without any overshoot and in a short time.
In a startup transient area, output of a voltage is started at a high slew rate in response to a PWM signal having the maximum on-duty width, and the voltage is output at a low slew rate in a steady area where a target voltage is maintained. Thus, even in a high-voltage generation apparatus a startup capability of which is further increased and in which an output voltage reaches a target voltage in a short time, a voltage vibration (a ripple or a hunting) in the steady area can be reduced.
A second exemplary embodiment of the present invention will be described below. A high-voltage generation apparatus according to the second exemplary embodiment previously variably sets a slew rate in a startup transient state according to the magnitude of a target voltage. In the second exemplary embodiment, a voltage variably set while maintaining a relationship of linearity with the target voltage is previously generated, and the generated voltage is applied to a boosting transformer, to wait for startup. Switching driving is started using the variably set voltage for the boosting transformer and a PWM signal having the maximum on-duty width, to perform control so that an output voltage reaches the target voltage at a steep and high slew rate in the transient state.
The microcomputer 1 can control a change in a target voltage of the high-voltage generation apparatus and ON/OFF timing by setting data at predetermined timing for a register (not illustrated) provided in the ASIC 2. The ASIC 2 outputs a high-voltage control signal HVCNT for setting a target voltage of the high-voltage generation circuit 8, an ON/OFF control signal /HVON for setting ON/OFF of the high-voltage generation circuit 8, and a clock signal CLK having a predetermined period used in the high-voltage generation circuit 8 to the exterior.
The high-voltage control signal HVCNT is output to the exterior as an analog signal from a D/A converter provided in the ASIC 2. The high-voltage control signal HVCNT may be output in the form of a PW signal, or may be converted into a DC voltage by a high-order low-pass filter or the like having an improved response characteristic at a frequency of the PWM signal, in which case a similar function can be implemented.
The outline of an operation of the high-voltage generation circuit 8 in the high-voltage generation apparatus illustrated in
A capacitor C4 before the start of startup waits for the startup while power corresponding to a voltage generated by the transformer voltage generation circuit 11 is previously charged therein in response to the high-voltage control signal HVCNT. A slew rate at the time of startup is variably set by the previously charged power and the voltage. A voltage output to a load unit HVoutput is raised at a slew rate corresponding to the voltage supplied to the boosting transformer T1.
Details of the operation of the high-voltage generation circuit 8 in the high-voltage generation apparatus illustrated in
The comparator CMP10 performs comparison calculation between the detected divided voltage Vdt and the target voltage Vtgt, to generate a low-level output and turn off the FET Q3 if the detected voltage Vdt is the target voltage Vtgt or less, and generates a high-level output and turn on the FET Q3 if the detected voltage Vdt is the target voltage Vtgt or more. When the FET Q3 is turned on, the inverting input unit in the comparator CMP 15 instantaneously falls to a potential of 0 V. Therefore, an output of the comparator CMP 15 instantaneously enters a high level so that the high-voltage generation circuit 8 is rapidly turned off.
On the other hand, when the FET Q3 is turned off, an electric charge is charged in the capacitor C2 via the resistors R2 to R4 from a power source voltage Vreg. A time constant for the charging is determined by the power source voltage Vreg and values of the resistors R2 to R4 and the capacitor C2. The on-duty width is moderately increased from zero by this time constant. The maximum voltage of the capacitor C2 is obtained by dividing the power supply voltage Vreg via the resistors R2 and R3, and the maximum on-duty width of the PWM signal output by the comparator CMP 15 is set by the maximum voltage of the capacitor C2.
More specifically, the PWM control circuit 15 instantaneously reduces the on-duty width to zero, to rapidly turn off the high-voltage generation circuit 8 when the detected voltage Vdt exceeds the target voltage Vtgt. When the detected voltage Vdt falls below the target voltage Vtgt, a time constant is given to startup, to slowly turn on the high-voltage generation circuit 8. As a result, a voltage vibration (a ripple or a hunting) generated in feedback control for maintaining a constant voltage can be significantly reduced. An output waveform in a steady area in the high-voltage generation apparatus according to the present exemplary embodiment is similar to that illustrated in
Peripheral circuits of the boosting transformer T1 in the high-voltage generation circuit 8 will be described below. The PWM signal output from the PWM control circuit 15 is input to a gate terminal of an FET Q4. The FET Q4, a power source voltage Vcc, and a resistor R8 drive a gate terminal of a power MOSFET Q5 in response to the PWM signal input to the gate terminal of the FET Q4. The power MOSFET Q5 switching-drives the boosting transformer T1. The boosting transformer T1, which has been switching-driven, outputs a high pulsating voltage. The high pulsating voltage output by the boosting transformer T1 is rectified by a rectifier including a high-voltage diode D2 and a high-voltage capacitor C5 and is changed into a direct voltage, and is output to the load unit HVoutput. The output voltage detection circuit 4 divides the high voltage output to the load unit HVoutput, to detect a divided voltage Vdt. The comparator CMP10 monitors the detected divided voltage Vdt, and compares the divided voltage Vdt with the target voltage Vtgt set in response to the high-voltage control signal HVCNT, to perform feedback control for maintaining the target voltage.
An FET Q2 directly controls the gate terminal of the power MOSFET Q5 in response to the ON/OFF control signal /HVON so that a response delay time can be reduced when the high-voltage generation circuit 8 is turned on and off. If the response delay time may be slightly delayed, the high-voltage generation circuit 8 may be turned on and off by fixing the clock signal CLK output from the ASIC 2 to a high-level output in place of the ON/OFF control signal /HVON and the FET Q2.
The transformer voltage generation circuit 11 for generating a power source voltage connected to the boosting transformer T1 will be described below. The transformer voltage generation circuit 11 includes an operation amplifier OP1, resistors R1, and R10 to R13, a diode D1, and a transistor Q1. The operation amplifier OP1 current-drives the transistor Q1 to perform feedback control so that an output corresponding to the high-voltage control signal HVCNT input from the ASIC 2 is maintained in response to the high-voltage control signal HVCNT and a voltage varied by non-inversion amplifying a divided voltage of a power source voltage Vcc. An electric charge is charged in the capacitor C4 connected to the boosting transformer T1 by a current amplified by the transistor Q1. The diode D1 constitutes a current path when the operation amplifier OP1 discharges a current from the capacitor C4. The transformer voltage generation circuit 11 generates a voltage for transformer driving having a relationship of linearity in proportion to a voltage corresponding to the high-voltage control signal HVCNT. The high-voltage generation circuit 8 has a property of outputting an output voltage (a reach voltage in a steady area without feedback control) proportional to the power source voltage connected to the boosting transformer T1 when the on-duty width of the PWM signal to be switching-driven is fixed.
While the PWM control circuit 15 outputs the PWM signal having the maximum on-duty width, and a voltage variably generated in response to the high-voltage control signal HVCNT is applied to the boosting transformer T1 during waiting for startup, it is forcedly turned off by the FET Q2 arranged downstream. If the FET Q2 is turned off, therefore, switching can be instantaneously started in response to the PWM signal having the maximum on-duty width.
An example of an operation for variably setting a slew rate in a startup transient state variably set in the present exemplary embodiment will be described below. An amount of power (a voltage value) charged in the capacitor C4 by the transformer voltage generation circuit 11 is applied when the high-voltage generation circuit 8 is started, and becomes one element for determining a slew rate at the time of rise in an output voltage (one of input driving conditions). Another element for determining the slew rate at the time of rise in an output voltage (one of input driving conditions) is the maximum on-duty width at the start of switching. In the present exemplary embodiment, the maximum on-duty width at the time of startup is a fixed value independently of the target voltage. Therefore, the high-voltage generation circuit 8 has the property that the slew rate at the time of startup is varied according to only an output value of the transformer voltage generation circuit 11.
The high-voltage generation apparatus according to the present exemplary embodiment uses this direct relationship, to variably set the slew rate in the transient state of the output voltage at the power source voltage connected to the boosting transformer T1. The power source voltage connected to the boosting transformer T1 is variably set according to the magnitude of the target voltage. When the high-voltage generation circuit 8 is started, therefore, the slew rate at the time of startup can be variably set with high accuracy and with a high resolution. For example, when the target voltage is low, the slew rate is variably set to decrease so that an overshoot is reduced. On the other hand, when the target voltage is high, the slew rate is variably set to increase so that a startup period is shortened. Further, the high-voltage generation circuit 8 is linearly started up with such an on-duty width that the output voltage reaches the target voltage in an output state where hardware is steeply started up (a state occurring before its time constant reaches a gently inclined curve). When the hardware detects that the output voltage has reached the target voltage, the on-duty width is instantaneously reduced to zero, to turn off a boosting circuit. Thus, an overshoot at the time of the startup can be further reduced.
A specific example of an output waveform in the high-voltage generation apparatus according to the present exemplary embodiment will be described below with reference to
On the other hand,
As described above, according to the present exemplary embodiment, the voltage variably set depending on the output voltage is previously generated, and the startup is waited for with the generated voltage applied. Thus, the high-voltage generation circuit 8 can be started at a slew rate at the time of startup, which is varied with a high resolution according to the output voltage, and instantaneously. Further, when the detected voltage exceeds the target voltage, control to instantaneously reduce the on-duty width to zero to maintain the detected voltage at the target voltage is performed. Even if the startup capability of the high-voltage generation apparatus is increased and the target voltage is set to a value in a wide range, the overshoot is reduced, and the output voltage can reach the target voltage in a short time.
In the startup transient area, the output of the voltage is started at a high slew rate in response to the PWM signal having the maximum on-duty width, and the voltage is then output at a low slew rate in the steady area where the output voltage is maintained at the target voltage. Thus, even a high-voltage generation apparatus a startup capability of which is further increased and in which an output voltage reaches a target voltage in a short time can reduce a voltage vibration (a ripple or a hunting) in a steady area.
A third exemplary embodiment of the present invention will be described below. A high-voltage generation apparatus according to the third exemplary embodiment previously variably sets a slew rate in a startup transient state according to the magnitude of a target voltage. In the third exemplary embodiment, a PWM signal having an on-duty width variably set while maintaining a relationship of linearity with the target voltage is generated. Switching is started using the PWM signal having the on-duty width variably set with the start of startup so that an output voltage reaches the target voltage at a steep slew rate in a transient state.
The outline of an operation of a high-voltage generation circuit 8 in the high-voltage generation apparatus illustrated in
Details of the operation of the high-voltage generation circuit 8 in the high-voltage generation apparatus illustrated in
The maximum DUTY setting circuit 41 includes an operation amplifier OP1 and resistors R10 to R13, and non-inversion amplifies the high-voltage control signal HVCNT and a divided voltage of the power source voltage Vcc and outputs the non-inversion amplified signal and voltage to the PWM control circuit 45. The maximum DUTY setting circuit 41 generates the reference voltage Vduty for setting the maximum on-duty width while maintaining a relationship of linearity in proportion to an output voltage corresponding to the high-voltage control signal HVCNT, and outputs the reference voltage Vduty to the PWM control circuit 45.
The DC voltage Vduty generated by the maximum DUTY setting circuit 41 is connected in place of the power source voltage Vreg in the PWM control circuit 15 described in the second exemplary embodiment to the PWM control circuit 45. When an FET Q3 is turned off, an electric charge is charged in a capacitor C2 via resistors R2 to R4 from the DC voltage Vduty generated by the maximum DUTY setting circuit 41. A time constant for the charging is determined by the direct-current voltage Vduty and values of the resistors R2 to R4 and the capacitor C2. The on-duty width is moderately increased from zero by this time constant.
More specifically, the PWM control circuit 45 generates the PWM signal having the maximum on-duty width that is varied according to the magnitude of the input voltage Vduty while instantaneously reducing the on-duty width to zero, to instantaneously turn off the high-voltage generation circuit 8 when the detected voltage Vdt exceeds the target voltage Vtgt, like in the first and second exemplary embodiments. When the detected voltage Vdt falls below the target voltage Vtgt, a time constant is given to startup, to slowly turn on the high-voltage generation circuit 8. As a result, a voltage vibration (a ripple or a hunting) can be significantly suppressed. An output waveform in a steady area in the high-voltage generation apparatus according to the present exemplary embodiment is similar to that illustrated in
A voltage of the capacitor C2 is kept at a voltage obtained by dividing the DC voltage Vduty via the resistors R2 and R3 at a steady time. The maximum on-duty width of a PWM signal output by a comparator CMP 15 is set by the voltage at the steady time. The DC voltage Vduty generated by the maximum DUTY setting circuit 41 is variably set at a voltage proportional to the high-voltage control signal HVCNT. More specifically, the maximum on-duty width of the PWM signal is variably set in proportion to the high-voltage control signal HVCNT.
While the PWM control circuit 45 outputs the PWM signal having the maximum on-duty width during waiting for startup, it is forcedly turned off by the FET Q2 arranged downstream. If the FET Q2 is turned off, therefore, switching can be instantaneously started in response to the PWM signal having the maximum on-duty width.
A relationship between a slew rate in a startup transient state variably set in the present exemplary embodiment and a duty-width will be described below with reference to
In the characteristic curve obtained when the input voltage is 12 V, both output voltages (reach voltages in a steady area without feedback control) at a point Da having an on-duty width in the vicinity of 27% and a point Db having an on-duty width in the vicinity of 43% are approximately 2500 V even if duty widths at the points of the PWM signal for performing switching driving differ from each other. However, the slew rates at the time of startup at the points greatly differ from each other, as illustrated in
The high-voltage generation apparatus according to the present exemplary embodiment uses the property that an on-duty width and an output voltage in a transient state are proportional to each other, to variably set the slew rate in the transient state of the output voltage. The maximum on-duty width at the start of startup is previously set to a value corresponding to a target voltage, to start the high-voltage generation circuit 8. More specifically, a load voltage is raised while the slew rate is variably set according to the target voltage. For example, when the target voltage is low, the slew rate is variably set to decrease so that an overshoot is reduced. On the other hand, when the target voltage is high, the slew rate is variably set to increase so that a startup period is shortened. In that case, the high-voltage generation unit 8 is linearly started up with such a time width that the output voltage reaches the target voltage at a slew rate at which hardware is steeply started up (a state occurring before its time constant reaches a gently inclined curve). When the hardware then detects that the output voltage has reached the target voltage, the on-duty width is instantaneously reduced to zero, to rapidly turn off the high-voltage generation circuit 8.
As a result, even a high-voltage generation circuit 8 in which a slew rate is high when an output voltage rises, and an output voltage (a reach voltage in a steady area without feedback control) does not have a proportional relationship with a duty width does not perform control dependent on a relationship between the on-duty width and the output voltage (the reach voltage in the steady area without feedback control) in the high-voltage generation apparatus according to the present exemplary embodiment. Therefore, reductions in accuracy and stability of control occurring in the conventional high-voltage generation circuit can be avoided. The output waveform in the high-voltage generation apparatus according to the present exemplary embodiment is similar to that illustrated in
As described above, according to the present exemplary embodiment, the PWM signal having the on-duty width variably set depending on the output voltage is generated, and the high-voltage generation apparatus is instantaneously started up in response to the PWM signal having the on-duty width variably set. Thus, the high-voltage generation circuit 8 can be started at a slew rate at the time of startup, which is varied with a high resolution depending on the output voltage, and instantaneously. Further, when the detected voltage exceeds the target voltage, the on-duty width of the PWM signal is instantaneously reduced to zero, to control maintenance of the target voltage. Even when the startup capability of the high-voltage generation apparatus is increased and the target voltage is set to a value in a wide range, an overshoot can be reduced, and the output voltage can reach the target voltage in a short time. A boosting circuit in which an on-duty width of a PWM signal and an output voltage (a reach voltage in a steady state) do not have a proportional relationship enables highly accurate and stable voltage control.
Output of a voltage is started in response to a PWM signal having the maximum on-duty width in a startup transient area while the voltage is output by giving a gentle time constant to startup to increase the on-duty width in a steady area where the subsequent target voltage is maintained. Even a high-voltage generation apparatus a startup capability of which is increased and in which an output voltage reaches a target voltage in a short time can reduce a voltage vibration (a ripple or a hunting) in a steady area throughout the area.
The high-voltage generation apparatuses according to the first to third exemplary embodiments, described above, can be applied to an electrophotographic image forming apparatus. An example of an application of the high-voltage generation apparatus will be described by taking a laser beam printer as an example of the electrophotographic image forming apparatus.
The high-voltage generation apparatus described in the above-mentioned exemplary embodiment is applicable as a high-voltage power source for applying a high voltage to an image forming unit in an electrophotographic printer.
As described above, if the high-voltage power sources described in the first to third exemplary embodiments are applied as high-voltage power sources for an electrophotographic printer, the speed of the image forming apparatus can be increased, and the FPOT can be shortened.
While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all modifications, equivalent structures, and functions.
This application claims priority from Japanese Patent Application No. 2010-172292 filed Jul. 30, 2010, which is hereby incorporated by reference herein in its entirety.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2010-172292 | Jul 2010 | JP | national |
