Highly Simplified Switching Regulator Which Allows Very High Switching Frequencies

Abstract

A method combining linear LDO and switching regulators to eliminate complex duty cycle control methods therefore allowing increased switching frequencies for higher performance and less cost, discrete or fully integrated high efficiency regulators. Apparatus making PWM system an open loop digital circuit, while maintaining analog close loop with traditional linear regulator by combining both techniques in a simplified form.

Description

REFERENCES CITED

US Patents

• U.S. Pat. Nos. 5,705,919, 70,084,612, 7,132,820, 20050242792, 20090261790, 5,677,558, 5,592,072, 6,150,798, 6,459,246. 6,809,504, 6,960,907, 7,230,408.

Articles

• Isik T., James R., Power Reduction Techniques in Mixed Signal Integrated Circuits: Practical approaches, TechOnLine, Mar. 16, 2009.
• Hanh-Phuc Le atAl, Single Inductor Switching DC-DC Converter With Five Outputs and Ordered Power-Distributive Control. IEEE JSSC, Vol. 42, NO 12, December 2007.

FIELD OF INVENTION

High efficiency power and voltage regulators.

Background of the Invention

Linear low drop-out voltage regulators (LDOs) are widely used in supplying electronic systems. Their design method are highly mature. Stability issues are resolved, fully integrated on-chip versions are helping on building complex circuits on a chip without external components (U.S. Pat. No. 6,960,907). Major drawback for such regulators is their efficiency being low. This is the case when the difference between input voltage and regulated output voltage is large.

In order to overcome efficiency problem, switching regulators are developed. Switching regulators are based on storing and releasing electrical energy with controlled duty cycle. Since the switches are completely on or off, these kind of regulators do not suffer from wasted energy on the regulating pass transistors of LDOs which are working in linear mode.

However, energy storage elements used in switching regulators bring a few drawbacks. They have undesired parasitics which causes reduction in efficiency. They are expensive. Most of all, there is no feasible technique to integrate these components into same chip where the rest of the electronic system resides yet.

One possible solution to integrate the energy storing elements into chip is to increase the switching frequency. High switching frequencies make these elements to be small in size. Problem is that complex pulse width modulation (PWM) servo mechanisms that are usually based on a sawtooth signal, causing extreme phase shift along the feedback. As frequency increases, stabilizing such a complex system becomes cumbersome.

It is possible to simplify the servo system by using bang-bang type of designs. This would detoriate the performance of the regulator.

Another solution is to make a digital servo mechanism by which stability issues can be partly resolved using elegant digital algorithms. Since an analog to digital converter (ADC) is required to measure the output voltage, the speed of ADC will be the limiting factor of the switching frequency. Besides, such system gets even more complex and expensive.

Idea of combining LDOs and switching regulators are not new. A discussion was done in part of Isik and James's article. However all the prior art known to the inventor suggest to use the switching regulator with all disadvantages mentioned above, in front of the linear regulators. Some embodiments are consisting switching regulator and a following LDO (U.S. Pat. No. 7,084,612, US20050242792, US20090261790, U.S. Pat. No. 5,592,072), or with another LDO parallel to the switching regulator (U.S. Pat. No. 7,230,408, U.S. Pat. No. 6,984,969) or another LDO (U.S. Pat. No. 6,809,504). Although these prior arts were expected to be fully integrated, since the switching frequency cannot be as high enough, full integration is not trivial. For example, in U.S. Pat. No. 7,084,612, feedback from current flow information is used to generate PWM signal however, no integration operation which may be essential to stability, is mentioned.

Instead, bang-bang type operation that is not always desirable for various reasons, is suggested.

More importantly, when linear regulator is following the switching one, it is not possible to combine linear regulator's pass transistor and the high side switch transistor in one. Latter is very important to increase the efficiency further.

One of the prior art described in U.S. Pat. No. 6,150,798, makes double use of high side switch for both linear and switching supply circuits. The usage of high side switch in this prior art is not continuous. Instead, the mode of operation is selected by external control signals based on input voltage or sleep condition.

Some recent embodiments are taking the advantage of the fact that many output voltages are needed at the same time. With an elegant design described in Le etAl's paper, only one inductor may serve producing many voltages without sacrificing efficiency.

The goals of these prior arts were to increase the performance and the efficiency. Although some suggest simplification to a certain extend, they do not bring any significant cost reduction.

BRIEF DESCRIPTION OF THE INVENTION

Storing and releasing electrical energy with controlled duty cycle is very well accepted technique for making high efficiency voltage regulators. The traditional duty cycle adjustment is done by a complex, closed loop pulse width modulation (PWM) circuits. This invention makes the PWM system a pseudo open loop digital circuit, while maintaining analog close loop with traditional linear regulator by combining both techniques in a simplified form.

This is achieved by placing the LDO in front of switching regulator that is referred as “voltage shifter” due to its' unusual form. While the LDO is regulating the output voltage as usual, voltage shifter makes sure that voltage drop across the pass transistor of LDO is minimal.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1. Simplified schematic of a PWM based step-down (Buck) converter

FIG. 2. Simplified schematic of a linear regulator

FIG. 3. Conceptual schematic of a switched capacitor step-down converter

FIG. 4. Linear regulator with series high efficiency voltage shifter.

FIG. 5. Linear regulator with a buck converter as a voltage shifter.

FIG. 6. One possible embodiment of efficiency monitor

FIG. 7. Digital duty cycle or frequency control driven by efficiency monitor.

FIG. 8. One possible embodiment of digital duty cycle control circuitry.

FIG. 9. Linear regulator with pseudo-digital buck converter as voltage shifter.

FIG. 10. Linear regulator pass transistor and high side switch of buck converter combined.

FIG. 11. Simplification using common sample-and-hold (S/H) for compensation and efficiency monitor.

FIG. 12. One possible embodiment for switched capacitor converter and linear regulator combination.

FIG. 13. Switched capacitor style implementation with common S/H.

DETAILED DESCRIPTION OF THE INVENTION

The description given here is to allow someone ordinary skilled in the art to build and use of the present invention in related applications. Variety of modifications on the embodiments described, may be apparent to one skilled in the art and general principles of the invention described here may be applicable to other embodiments. These other embodiments may be constructed using re-channel transistors instead of p-channel ones, or vice versa; bipolar ones instead of mos; different amplifier types instead of what is illustrated here; different digital circuits with similar functionality instead of what is suggested here; different construction topologies which functions similar to what is given here. Therefore, the scope of present invention should not be taken as limited to the particular embodiments illustrated and described herein, but widest scope consistent with the principal and novel features disclosed here.

In regards to FIG. 1, a typical switched capacitor step-down voltage regulator that is also known as “buck regulator, operates based on storing and releasing electrical energy on an inductor (108). The input voltage VIN is applied to node (106). During when the high side switch (103) is on but low side switch (104) is off, a certain amount of energy is stored on the inductor. This “stored” energy and also the energy dissipated by the resistive load (110), are coming from source supply.

When this switch (103) is turned off and switch (104) is on, although no energy is transferred from input source, inductor continues to keep the amount of the current it was flowing through. By omitting the parasitics of the switches (103, 104), inductor (108) and the capacitor (109); the voltage across the load (110) would be equivalent to

V _LOAD =DV _IN  (1)

where duty cycle D is defined as

$\begin{array}{cc}D=\frac{T_{\mathrm{ON}}}{T_{\mathrm{ON}}+T_{\mathrm{OFF}}}& \left(2\right)\end{array}$

In order to make load voltage kept accurately constant, it is compared with a precise voltage reference connected to node (101) and duty cycle (105) adjusted by a pulse width modulating (PWM) system (102). The details of such operation is explained in many textbooks, articles and other education materials. The important fact from this invention's point of view is that, even if the duty cycle is not controlled by such a feedback loop system but stays constant, the voltage across inductor and the switch (107) must remain approximately constant. In other words,

V _L=(D−1)V_IN  (3)

Looking at the equation 1, one can adjust the output voltage by varying D. If D is dynamically adjusted, any disturbance on input voltage can be compensated. This is traditional way of how a switching regulator is made. However, if D is kept constant and input voltage dynamically adjusted, one can get similar control over output voltage. Since controlling the duty cycle without loosing stability of the loop is complicated and involved with special signals such as a sawtooth waveform, therefore analysis and design and the number of components to be used becomes undesired, regulation from the input voltage would have advantages.

Adjusting input voltage can be done by using a linear regulator illustrated in FIG. 2. Although variants of this type of regulator exists, basic principle is more or less the same. An high gain operational amplifier (204) drives a pass transistor (203). In simple terms pass transistor's resistance is adjusted in such a way that with the voltage division, a desired voltage across the load (205) can be achieved from input (202). To do this, operational amplifier compares the output voltage and a precision reference voltage (201) and tries to make them the same. For simplification purpose, neither stability compensation nor other circuit techniques that make this circuit to work properly illustrated in this figure.

When the ratio of the voltage at the output and input gets smaller, the efficiency of a linear regulator becomes poor. This is simply because of the dissipated power on pass transistor is not useful. Other than efficiency, linear regulators are far better than their switching counterparts, in terms of electrical properties and design ease. It would be obvious to the one skilled in art that if the voltage across pass transistor is kept small, downside of this type of regulator may be eliminated.

Referring to FIG. 4, concept of such a system is illustrated. By using a high efficiency voltage shifter (407) voltage across pass transistor is minimized This system is exactly same as a linear regulator drawn in FIG. 2 with the addition of voltage shifter. In this embodiment, the voltage across voltage shifter is set to a proper value. This value can also be dynamically adjusted by looking at efficiency behavior of the entire system. The input to voltage shifter is indicated in the FIG. 406). In essence, since the voltage across pass transistor is a good measure of the efficiency, some embodiments can simply check this voltage and set the voltage across voltage shifter. The linear loop still compares the output voltage with a reference voltage (401) using operational amplifier (405) and controls the resistance of pass transistor (403). This is done in such a way that difference between input voltage (402) and (404). Making the assumption that voltage difference between node (404) and voltage across load (408) remains constant, output voltage can be regulated without sacrificing efficiency.

In FIG. 5, a buck regulator shown in FIG. 1 used as high efficiency voltage shifter. The difference here is that the switching regulator is not in a dynamic loop. The duty cycle (508) is set and not changed unless some efficiency drop or mode of operation (continuous-discontinuous) change occurs.

What is illustrated on FIG. 6, is one of many possible implementations of an efficiency monitor. Linear regulator's pass transistor (603) and its' driving amplifier (605) are added for clarity. As mentioned earlier, the voltage across transistor (603) must be kept minimum. The amplifier (615) measures this differential voltage and converts it to a signal referenced to the ground. Gain of this amplifier is set to a known and invariant value. Output is fed to two comparators (610) and (611), compared with respect to two known values V_upper (608) and V_lower (609). The output of these comparators generates logic signals (612) and (613), named Inc and Dec, attributing either Increment and Decrement, or Increase and Decrease, depending on the embodiment that follows. For example, if this monitor drives the PWM (507) system shown on FIG. 5, these signals will increase or decrease the duty cycle. In other words, if the voltage across pass transistor is larger than upper reference, duty cycle will be increased to compensate, or vice versa. This embodiment can be used for current limiting feature of the entire regulator with an additional comparator.

In FIG. 7, an electronic circuit block shown to generate signals (704) for controlling switches in the high efficiency voltage shifter. Since various embodiments can be used for voltage shifter, this block (703) can convert Inc (701) and Dec (702) signals into either a duty cycle based or frequency based signals. An example duty cycle control logic which may be replaced with the block shown in FIG. 7, is illustrated in FIG. 8. When a clock (803) (806) is provided, two counters starts counting. If count value (813) in the period counter (805) reaches to the value (812) in the Pulse counter (804), a digital comparator (807) sends a signal (811) to a set-reset latch (808) to toggle. When entire period is reached, period counter output (809) toggles the latch back. The period counter can be made programmable to set a desired period, however, maximum count of both counters should be the same to ensure 100% duty cycle. Since period counter holds the previous value if there is no change on the Inc and Dec signals, such a system acts as an integrator and helps the stability and also helps soft start operation naturally.

FIG. 9 illustrates the embodiment combining a linear regulator, a switching (buck type) step-down regulator, efficiency monitor and duty cycle generator. Due to the fact that signals and power are switched a sample and hold (S/H) block built out of a switch (909) and a capacitor (910) are added into efficiency monitor. The S/H ensures that the efficiency is measured only when high side switch (921) is on. In this embodiment, a feedback filter (914) is placed to eliminate instability issues.

The embodiment shown in FIG. 10 brings further improvement over what is in FIG. 9. The pass transistor and the high side switch are incorporated in same transistor (1017). The gate of (1017) is driven by transistors (1015) and (1016). Should the (1017) is off, then (1015) is on and (1016) is off. Should the (1017) is on, (1015) is off, (1016) is on passing analog signal that linear regulator amplifier generates to the gate of (1017). In this embodiment the feedback stability filter is replaced with a compensation network with a S/H across the output transistor.

In FIG. 11, the topology is modified slightly to reduce the need of two S/H circuit (1107) to one.

One of the advantages of this invention is to be able to switch the switching regulator switches faster. This is because they are not part of the main loop so that there is no unwanted latency. The higher switching frequency leads to smaller inductors. Even then, this may not help to building fully integrated regulators unless switching frequency is gigaHz levels. An alternative might be a switched capacitor (or charge redistribution) type of step-down converters.

A simplified switched capacitor step-down converter is illustrated in FIG. 3. In such embodiments, switches (303, 304, 305, 306) are driven by non-overlapping but alternating signals to transfer charge from input voltage supply (315) to the load (313). Every charge transfer causes a charge distribution between shorted capacitors which may be (309, 310, 311, 312). This process reduces the voltage to a desired levels. As voltage reduction amount can be adjusted by using predetermined capacitance values, it can also be determined by using variable switching frequency (please refer to Isik and James' article for a better explanation). This is true if only if there is always a load current. Therefore, a feedback from the output is compared with a precision voltage reference (301) and a frequency modulator circuitry (302) generates a signal (314) to control the switches. Advantages of such an embodiment over a buck converter is that it is inductor free and frequency can be increased to much higher levels. These two advantages can lead to fully integrated implementation.

FIG. 12 reveals an embodiment which is very similar to the one shown in FIG. 10. The difference is that the high efficiency voltage shifter part is replaced with switched capacitor regulator. It should also be obvious to the skilled in art that duty cycle control block leaves to be replaced by frequency control block (1206).

In FIG. 13, similar enhancements done in FIG. 11, are seen.

Claims

1. Method of building an highly efficient power regulator that eliminates circuits for handling transitions between continuous and discontinuous mode of operations, utilizing simplified switching regulators as voltage shifters, comprising: 1. combination of traditional linear regulator with an highly efficient switched voltage shifter which has an automatically adjusted switched on and off times to keep voltage drop across pass transistor very low2. pseudo-open loop switching regulator that receives switched pulse trains with occasionally adjusted pulse/space ratio which is controlled by eliminating non-trivial traditional analog PWM techniques3. a circuit technique allowing very high frequency operation due to not-continuous but intermittent pulse width adjustment that is done as needed basis.

2. Method of combining linear regulator pass transistor and the high side switch transistor to make easy use and integration by using 1. embodiment that eliminates two series transistors to reduce parasitic resistance by adjusting transistor's pulsed gate voltage's peak value in analog fashion2. a drive circuit for the combined transistor that works in both linear and digital mode3. analog frequency compensation scheme for stability with sample and hold mechanism.

3. Method of maximizing the efficiency of the switching regulators built using linear pass transistor by utilizing: 1. measuring source drain voltage of the linear transistor and,2. intermittently generating a digital pulse width which has inherent integration and soft start characteristics only as needed basis.