Patent Application
20170366203
This application claims priority under 35 U.S.C. §119(a) to a Korean patent application filed on Jun. 16, 2016 in the Korean Intellectual Property Office and assigned Serial No. 10-2016-0075264, the entire disclosure of which is incorporated herein by reference.
The present disclosure relates to holographic data storage system and method using a modulation code technique to enhance a performance of the holographic data storage system.
A holographic data storage system HDS stores data in a volume of a medium unlike an optical recording storage device such as CD, DVD or BD for storing information in its surface or a hard disk drive HDD, thereby increasing sharply storage capacity. Accordingly, the holographic data storage system has been studied as the next generation optical recording storage device with a near field recording NFR or a super-resolution near-field structure SUPER_RENS.
A recording and a playing in the holographic data storage system are performed in a unit of a page, and thus a total storage capacity of the medium is determined to equal to a multiplication of a total number of bits in one page and a number of a multiplexed hologram. Since input data are written and read in a unit of a two dimensional page in a volume of the hologram, the storage capacity can be considerably increased. Moreover, a signal can be processed in the unit of the two dimensional page, and thus a transmission velocity can sharply increase.
However, the holographic data storage system has many error factors such as inter-symbol interference ISI, inter-page interference IPI and a blur between adjoining pixels, etc. Specially, two dimensional 2D ISI is a main factor for deteriorating quality of searched data. Many studies have been progressed to solve these problems. Particularly, a channel coding of original user data is one for excellent methods of reducing a two dimensional interference.
Accordingly, the invention is provided to substantially obviate one or more problems due to limitations and disadvantages of the related art. One embodiment of the invention provides holographic data storage system and method using a modulation code technique to enhance performance of the holographic data storage system.
Other features of the invention may be thought by a person in an art through following embodiments.
In one aspect, the invention provides a holographic data storage system comprising: an encoder configured to convert input data into a codeword; a storage unit configured to store the converted codeword; and a decoder configured to convert the stored codeword into output data. Here, the encoder converts the input data having 8 bits into the codeword in (5×2) matrix.
Each of a first column and a second column of the (5×2) matrix has 32 patterns, and wherein the encoder does not use a pattern [X, 1, 0, 1, X]T and a pattern [X, 0, 1, 0, X]T in the conversion of the codeword.
The encoder does not use a pattern [X, 0, 0, 1, 0]T and a pattern [X, 1, 1, 0, 1]T in the conversion of the codeword.
The encoder does not use a pattern [1, 0, 1, 1, X]T and a pattern [0, 1, 0, 0, X]T in the conversion of the codeword.
Each of a first column and a second column of the (5×2) matrix has 32 patterns and the encoder uses 16 patterns of the 32 patterns. Here, the 16 patterns include a pattern [0, 0, 0, 0, 0]T, a pattern [0, 0, 0, 0, 1]T, a pattern [0, 0, 0, 1, 1]T, a pattern [0, 0, 1, 1, 0]T, a pattern [0, 0, 1, 1, 1]T, a pattern [0, 0, 1, 1, 0, 0]T, a pattern [0, 1, 1, 1, 0]T, a pattern [0, 1, 1, 1, 1]T, a pattern [1, 0, 0, 0, 0]T, a pattern [1, 0, 0, 0, 1]T, a pattern [1, 0, 0, 1, 1]T, a pattern [1, 1, 0, 0, 0]T, a pattern [1, 1, 0, 0, 1]T, a pattern [1, 1, 1, 0, 0]T, a pattern [1, 1, 1, 1, 0]T and a pattern [1, 1, 1, 1, 1]T.
In another aspect, the invention provides a holographic data storage method performed by a processor, the method comprising: an encoding step of converting input data into a codeword; a storage step of storing the converted codeword; and a decoding step of converting the stored codeword into output data. Here, the encoding step includes converting the input data having 8 bits into the codeword in (5×2) matrix.
Holographic data storage system and method of the invention may enhance a performance of the holographic data storage system.
Example embodiments of the present invention will become more apparent by describing in detail example embodiments of the present invention with reference to the accompanying drawings, in which:
In the present specification, an expression used in the singular encompasses the expression of the plural, unless it has a clearly different meaning in the context. In the present specification, terms such as “comprising” or “including,” etc., should not be interpreted as meaning that all of the elements or operations are necessarily included. That is, some of the elements or operations may not be included, while other additional elements or operations may be further included. Also, terms such as “unit,” “module,” etc., as used in the present specification may refer to a part for processing at least one function or action and may be implemented as hardware, software, or a combination of hardware and software.
The invention relates to holographic data storage system and method using a modulation code technique to enhance a performance of the holographic data storage system. The modulation code technique of the invention indicates a 8/10 2D modulation code technique which modulates every input data (information sequence) having 8 bits to a (5×2) 2D output array, i.e. a codeword having 10 pixels. Serious interference may be removed by using the modulation code technique.
Hereinafter, various embodiments of the invention will be described in detail with reference to accompanying drawings.
In
Hereinafter, functions of elements and an operation of the invention will be described in detail.
In a step of 210, the encoder 110 converts input data into a codeword.
In a step of 220, the storage unit 120 stores the converted codeword. The storage unit 120 includes a holographic channel 121, an adder 122, a horizontal equalizer 123, a vertical equalizer 124, two soft output viterbi algorithms SOVAs 125 and 126 and an average calculation unit 127.
In a step of 230, the decoder 130 converts the stored codeword into output data.
Hereinafter, the encoder 110 of the present embodiment will be described in detail.
In
Here, a first column of the codeword (2D array) in the (5×2) matrix may be expressed as following vector c5.
c
5
≡[c[p−2,q]c[p−1,q]c[p,q]c[p+1,q]c[p+2,q]]T [Equation 1]
Here, c5 includes 5 bits, and thus total 32 patterns exist.
On the other hand, in the event that one bit placed at a center is surrounded by adjacent bits having logic opposed to logic of the one bit, detection error may occur to the one bit placed at the center in high probability. Accordingly, the encoder 110 determines three bits c[p−1, q], c[p, q] and c[p+1, q] placed at a center of the first column of the codeword in the (5×2) matrix.
In one embodiment, the encoder 110 does not arrange “1, 0, 1” to “0, 1, 0” at three bits (c[p−1, q]T, c[p, q] and c[p+1, q]) of a center of the vector c5 corresponding to the first column of the codeword. That is, the vector c5 is determined not to have a pattern [X, 0, 1, 0, X]T or a pattern [X, 1, 0, 1, X]T. Here, X equals to 0 or 1.
Briefly, the vector c5 having 5 bits includes total 32 patterns. However, since the pattern [X, 0, 1, 0, X]T or the pattern [X, 1, 0, 1, X]T is not used, the encoder 110 may use 24 patterns.
Next, the 24 patterns may be divided into three groups as shown in table 1.
Referring to Table 1, a first group includes a pattern [X, 0, 0, 1, 0]T and a pattern [X, 1, 10, 1]T, and brings out ISI at a lower part. A second group includes a pattern [1, 0, 1, 1, X]T and a pattern [0, 1, 0, 0, X]T, and occurs ISI at an upper part. Accordingly, the encoder 110 may not use 8 patterns in the first group and the second group.
A third group includes a pattern [X, 0, 0, 0, X]T and a pattern [X, 1, 1, 1, X]T, and little occurs ISI. Accordingly, the encoder 110 may use 8 patterns included in the third group. The encoder 110 may use a pattern [X, 0, 0, 1, 1]T and a pattern [X, 1, 10, 0]T, and a pattern [1, 1, 0, 0, X]T and a pattern [1, 1, 0, 0, X]T, wherein the patterns do not included in the first group and the second group. Thus, the encoder 110 may use total 16 patterns.
On the other hand, the same operation as of the encoder 110 may be applied to a second column of the codeword in the (5×2) matrix, and so the encoder 110 may use 16 patterns. Accordingly, the encoder 110 may use 256 patterns about the codeword in the (5×2) matrix.
Shortly, each of the first column and the second column of the (5×2) matrix has 32 patterns. The encoder 110 may not use the pattern [X, 1, 0, 1, X]T and the pattern [X, 0, 1, 0, X]T in the conversion of the codeword, wherein X equals to 0 or 1. The encoder 110 may not use the pattern [X, 0, 0, 1, 0]T and the pattern [X, 1, 1, 0, 1]T in the conversion of the codeword. Additionally, the encoder 110 may not use the pattern [1, 0, 1, 1, X]T and the pattern [0, 1, 0, 0, X]T in the conversion of the codeword.
That is, the encoder 110 may use 16 patterns of 32 patterns. The 16 patterns may include a pattern [0, 0, 0, 0, 0]T, a pattern [0, 0, 0, 0, 1]T, a pattern [0, 0, 0, 1, 1]T, a pattern [0, 0, 1, 1, 0]T, a pattern [0, 0, 1, 1, 1]T, a pattern [0, 1, 1, 0, 0]T, a pattern [0, 1, 1, 1, 0]T, a pattern [0, 1, 1, 1, 1]T, a pattern [1, 0, 0, 0, 0]T, a pattern [1, 0, 0, 0, 1]T, a pattern [1, 0, 0, 1, 1]T, a pattern [1, 1, 0, 0, 0]T, a pattern [1, 1, 0, 0, 1]T, a pattern [1, 1, 1, 0, 0]T, a pattern [1, 1, 1, 1, 0]T and a pattern [1, 1, 1, 1, 1]T.
Hereinafter, a simulation result of the holographic data storage system and method of the invention will be described in detail with reference to accompanying drawings
Firstly, a HDS channel is simulated by using a discrete point spread function which is expressed with following equation 2.
Here, σb means a grade of a blur of a resultant diffracted signal, and mx and my indicate misalignments of an x axis and a y axis, respectively. A linear fill factor of a charge coupled device may be 1. A decoded signal is delivered with additional white Gaussian noise AWGN through a hologram channel. A readback signal r[p,q] of a channel output terminal is equalized so that response is identical to response type of desired part. An output of an equalizer passes through a viterbi algorithm channel detector of 2D soft output to estimate a symbol transmitted with highest possibility. Finally, original information is searched by using a provided decoding method.
A performance of the holographic data storage system according to the modulation code technique of the invention is considered through a histogram of a received intensity. (a) in
On the other hand, a 6/8 modulation code technique has been provided in recent (in 2-D non-isolated pixel 6/8 modulation code, IEEE Trans). The modulation code technique includes a codeword where two adjacent bits are expressed with the same symbol. This assures removal of an isolated pattern while data is written in the HDS system. To synthetically evaluate the performance, the modulation code technique of the invention and the 6/8 modulation code technique are compared in view of BER. This is shown in
Also, the technical features described above can be implemented in the form of program instructions that may be performed using various computer means and can be recorded in a computer-readable medium. Such a computer-readable medium can include program instructions, data files, data structures, etc., alone or in combination. The program instructions recorded on the medium can be designed and configured specifically for the present invention or can be a type of medium known to and used by the skilled person in the field of computer software. Examples of a computer-readable medium may include magnetic media such as hard disks, floppy disks, magnetic tapes, etc., optical media such as CD-ROM's, DVD's, etc., magneto-optical media such as floptical disks, etc., and hardware devices such as ROM, RAM, flash memory, etc. Examples of the program of instructions may include not only machine language codes produced by a compiler but also high-level language codes that can be executed by a computer through the use of an interpreter, etc. The hardware mentioned above can be made to operate as one or more software modules that perform the actions of the embodiments of the invention, and vice versa.
The embodiments of the invention described above are disclosed only for illustrative purposes. A person having ordinary skill in the art would be able to make various modifications, alterations, and additions without departing from the spirit and scope of the invention, but it is to be appreciated that such modifications, alterations, and additions are encompassed by the scope of claims set forth below.
| Number | Date | Country | Kind |
|---|---|---|---|
| 10-2016-0075264 | Jun 2016 | KR | national |
