Patent Application
20080111622
This invention relates to electronic circuits, and more specifically to a hybrid Doherty amplifier system and method.
Power amplifiers used for wireless communication transmitters, with spectrally efficient modulation formats, require high linearity to preserve modulation accuracy and to limit spectral regrowth. Typically, a linear amplifier such as a Class-A type, a Class-AB type, or a Class-B type is employed to faithfully reproduce input signals and to limit the amplifier output within a strict emissions mask. Linear amplifiers are capable of electrical (DC power into RF output power or DC-RF) efficiencies greater than 50% when operated at saturation. However, they are generally not operated at high efficiency due to the need to provide high linearity. For non-constant envelope waveforms, linear amplifiers are often operated below saturation to provide for operation in the linear region. The back-off level from amplifier saturation, also referred to as output power back-off (OPBO), determines the electrical efficiency of a linear amplifier.
A Doherty amplifier is an amplifier configuration that can provide significantly improved efficiency. A typical Doherty amplifier configuration includes both a main amplifier and a peak amplifier. The main amplifier receives the entirety of the input signal all of the time but is operative to output signals up to a certain saturation amplitude level. The peak amplifier shares the signal load with the main amplifier during peak level signals above the saturation amplitude level. Therefore, the peak amplifier operates only part of the time, while the main amplifier operates all of the time. Accordingly, a Doherty amplifier can provide a significantly improved efficiency at higher power levels.
While the Doherty amplifier does provide significantly improved efficiency at higher power levels, the Doherty amplifier can be inefficient at low power levels. Specifically, at times when the transmitted signal need not be amplified so much, and is thus backed-off from saturation, the Doherty amplifier can operate at a poor efficiency (e.g., as little as 8%). In addition, a typical Doherty amplifier often provides poor linearity characteristics. Specifically, the Doherty amplifier can include an asymmetrical signal splitter to split the input signal between the main amplifier and the peak amplifier, as well as input impedance matching and phase-matching circuits to ensure phase accuracy of the split signals before and after amplification. Designing the Doherty amplifier to properly set the impedances for the impedance matching circuits and the asymmetrical signal splitter to ensure phase accuracy can be difficult, particularly over a range of frequency, time, and temperature. Phase inaccuracies resulting from impedance mismatch over the range of frequency, time, and temperature can thus result in non-linear signal characteristics.
To compensate for the poor linearity of the Doherty amplifier, a typical communication system can include a digital predistortion (DPD) system. The DPD system is configured to compensate for impedance errors that can occur in the Doherty amplifier and/or other sources by applying correction factors to the signal to be amplified. However, in providing correction factors regarding one of the amplifiers (i.e., main and peak amplifiers), it is possible that linearity of the other of the amplifiers is degraded. Accordingly, compensation for the poor linearity of the Doherty amplifier with DPD can also be challenging.
One embodiment of the invention includes an amplifier system. The system comprises a digital predistortion (DPD) system configured to receive an input signal and to provide the input signal as a first digital signal component along a first amplifier path and a second digital signal component along a second amplifier path. The system also comprises a first digital-to-analog converter (DAC) configured to convert the first digital signal component to a first analog signal component and a second DAC configured to convert the second digital signal component to a second analog signal component. The system further comprises a Doherty amplifier comprising a main amplifier in the first amplifier path that is configured to amplify the first analog signal component and a peak amplifier in the second amplifier path that is configured to amplify the second analog signal component.
Another embodiment of the invention includes a method for amplifying an input signal. The method comprises providing a first digital signal component and a second digital signal component from the input signal. The method also includes providing non-linearity compensation to each of the first and second digital signal components in response to a digital feedback signal. The method also includes converting each of the first digital signal component and the second digital signal component into a first analog signal component and a second analog signal component, respectively. The method also includes providing the first analog signal component to a main amplifier of a Doherty amplifier along a first amplifier path and providing the second analog signal component to a peak amplifier of the Doherty amplifier along a second amplifier path. The method further includes amplifying and combining the first and second analog signal components to provide an analog output signal.
Another embodiment of the invention includes a amplifier system. The system comprises means for providing in programmable proportions a first digital signal component along a first programmable path and a second digital signal component along a second programmable path from a digital input signal. The system also comprises means for converting the first and second digital signal components into a first analog signal component and a second analog signal component, respectively. The system further comprises main amplifier means for amplifying the first analog signal component along the first amplifier path, peak amplifier means for amplifying the second analog signal component along the second amplifier path, and means for combining the first and second analog signal components to generate an output signal.
The invention relates to electronic circuits, and more specifically to a hybrid Doherty amplifier system and method. A digital predistortion (DPD) system is configured to provide a main signal component along a main amplifier path and a peak signal component along a peak amplifier path from a digital input signal. Providing the digital input signal as the main and peak signal components can be based on a programmable proportion, such as could be provided from a processor. The DPD system also performs phase and/or gain adjustments to each of the signal components. The signal components are converted to analog signals and are each provided to a Doherty amplifier. The main signal component is provided to the main amplifier of the Doherty amplifier and the peak signal component is provided to the peak amplifier of the Doherty amplifier. Thus, the main and peak amplifiers of the Doherty amplifier can amplify the signal components according to the proportions of the split input signal, and not based on a saturation condition of the main amplifier. Therefore, the Doherty amplifier can operate significantly more efficiently. Furthermore, because the signals are isolated prior to being input to the Doherty amplifier, the Doherty amplifier need not include an asymmetrical splitter, impedance matching input circuitry, and phase-matching circuitry. Accordingly, the Doherty amplifier can operate in a much more linear manner, and the design of the Doherty amplifier can be greatly simplified.
The amplifier system 10 receives a digital input signal IN that is provided to a digital predistortion (DPD) system 12. The DPD system 12 includes a signal divider 14 that is configured to provide the digital input signal IN as a main digital signal component on a main amplifier path 16 and as a peak digital signal component on a peak amplifier path 18. The division of the digital input signal IN can be in response to a signal PROP that defines a programmable proportion of the division of the digital input signal IN between the main amplifier path 16 and the peak amplifier path 18. As an example, the programmable proportion can be adjusted by a processor in an adaptive manner, could be a value stored in a memory register, or could be a hard-coded firmware setting.
The DPD system 12 also includes a main predistortion element 20 and a peak predistortion element 22. The main and peak predistortion elements 20 and 22 are configured to provide individual non-linearity compensation to the main digital signal component and the peak digital signal component, respectively. As an example, the main predistortion element 20 and the peak predistortion element 22 can be configured to provide adjustments to amplitude-modulation (AM) and phase-modulation (PM) non-linearity terms, such as AM-AM and AM-PM terms, of each of the main and peak digital signal components individually. As another example, the main predistortion element 20 and the peak predistortion element 22 can provide adjustments to memory predistortion terms (i.e., time-dependent predistortion terms) as well as memory-less predistortion terms. In the example of
The main digital signal component and the peak digital signal component are each output from the DPD system 12 to respective digital-to-analog converters (DACs) 24 and 26. The DACs 24 and 26 are each configured to convert the digital signal components to an analog form. Therefore, the DAC 24 is configured to convert the main digital signal component into a main analog signal component, and the DAC 26 is configured to convert the peak digital signal component into a peak analog signal component. The respective main and peak analog signal components are each provided to a hybrid Doherty amplifier 28.
The hybrid Doherty amplifier 28 includes a main amplifier 30 in the main amplifier path 16 and a peak amplifier 32 in the peak amplifier path 18. Thus, the main analog signal component is provided to the main amplifier 30 and the peak analog signal component is provided to the peak amplifier 32. As an example, the main amplifier 30 can be configured as a Class-AB amplifier and the peak amplifier 32 can be configured as a Class-C amplifier. However, it is to be understood that the main amplifier 30 and the peak amplifier 32 can instead be configured as any of a variety of other amplifier types to provide a desired combination of efficiency and linearity.
The main amplifier 30 and the peak amplifier 32 are thus respectively configured to amplify the respective main analog signal component and peak analog signal component. The amplified main and peak analog signal components are each provided to impedance matching output elements Z1 and Z2, respectively, before being combined as the output signal OUT. Therefore, the output signal OUT is an amplified analog version of the digital input signal IN having been predistorted to compensate for non-linearity that may have been introduced by the hybrid Doherty amplifier 28 and/or other sources.
Because the hybrid Doherty amplifier 28 receives the isolated main and peak analog signal components, it is to be understood that the hybrid Doherty amplifier 28 includes neither an asymmetrical signal splitter nor impedance matching input circuitry, as included in a typical Doherty amplifier. Thus, the hybrid Doherty amplifier 28 can be designed in a less complicated manner and at a reduced cost. In addition, as described above, the DPD system 12 provides non-linearity compensation to the isolated main and peak digital signal components individually via the main and peak predistortion elements 20 and 22, respectively. As a result, the hybrid Doherty amplifier 28 can also be designed without phase-matching circuitry, as the relative phase of the main and peak digital signal components can be controlled by the DPD system 12 via the main and peak predistortion elements 20 and 22. For these reasons, the hybrid Doherty amplifier 28 can exhibit significantly improved linear performance over a typical Doherty amplifier.
Furthermore, because the division of the digital input signal IN is based on a programmable proportion, the hybrid Doherty amplifier 28 can be controlled with regard to the amount of relative amplification provided at each of the main amplifier path 16 and peak amplifier path 18. Specifically, the signal divider 14 can control the relative proportion of the digital input signal IN that is amplified by each of the main amplifier 30 and the peak amplifier 32. As a result, the hybrid Doherty amplifier 28 can exhibit a significant improvement in efficiency over a typical Doherty amplifier, as peak amplifier 32 does not amplify only the portion of the signal that exceeds saturation of the main amplifier 30 while remaining idle during times of saturation back-off. Accordingly, the hybrid Doherty amplifier 28 can maximize the amplification efficiency of the main amplifier 30 and the peak amplifier 32 based on the division of the digital input signal IN in response to the programmable proportion defined by the signal PROP.
It is to be understood that the amplifier system 10 is not intended to be limited to the example of
The transmit signal TX_I and TX_Q is provided to a DPD system 54. The DPD system 54 is configured substantially similar to the DPD system 12 in the example of
The main digital signal components M_I and M_Q are provided to a DAC 60, and the peak digital signal components P_I and P_Q are provided to a DAC 62. The DAC 60 is configured to convert the main digital signal components M_I and M_Q into main analog signal components AM_I and AM_Q. Likewise, the DAC 62 is configured to convert the peak digital signal components P_I and P_Q into a peak analog signal components AP_I and AP_Q. The main analog signal components AM_I and AM_Q are provided to a mixer 64, and the peak analog signal components AP_I and AP_Q are provided to a mixer 66. The mixers 64 and 66 are each configured to modulate the respective main and peak analog signal components AM_I and AM_Q and AP_I and AP_Q based on a local oscillator (LO) signal that is generated by a LO 68.
The resultant modulated main and peak signals are provided to an amplifier chain 70. The amplifier chain 70 includes a plurality N power amplifier stages 72, demonstrated in the example of
The last of the power amplifier stages in the sequential amplifier chain 70, PA_N, can be configured as a hybrid Doherty amplifier, similar to the hybrid Doherty amplifier 28 in the example of
It is to be understood that the amplifier chain 70 is not intended to be limited to the single hybrid Doherty amplifier PA_N.
The second hybrid Doherty amplifier 104 includes a main amplifier 110 and a peak amplifier 112. Similar to the first hybrid Doherty amplifier 102, the main amplifier 110 can be configured as a Class-AB amplifier and the peak amplifier 112 can be configured as a Class-C amplifier. However, the main amplifier 110 is configured in the peak amplifier path PEAK, and the peak amplifier 112 is configured in the main amplifier path MAIN. As a result, the main analog signal component is amplified first by the main amplifier 106 in the first hybrid Doherty amplifier 102, followed by the peak amplifier 112 in the second hybrid Doherty amplifier 104. Similarly, the peak analog signal component is amplified first by the peak amplifier 108 in the first hybrid Doherty amplifier 102, followed by the main amplifier 110 in the second hybrid Doherty amplifier 104. As a result, the efficiency and the linearity of the amplifier chain 100, and thus the entire amplifier system in which the amplifier chain 100 is included, can be even further improved by sequentially providing both main and peak amplification to each of the main and peak analog signal components. The main and peak analog signal components are combined in the second hybrid Doherty amplifier 104, such as via impedance matching output circuitry (not shown), and provided as the output signal OUT.
It is to be understood that the amplifier chain 100 is not limited to the example of
Referring back to the example of
The signal RETURN is provided to a mixer 80 that is configured to demodulate the signal RETURN based on the LO signal that is generated by the LO 68. The resultant demodulated signal can be separated into respective I- and Q-components, which are provided to an analog-to-digital converter (ADC) 82. The ADC 82 is configured to convert the demodulated signal into a digital form to generate a feedback signal FB_I and FB_Q.
The feedback signal FB_I and FB_Q is provided to the DPD system 54 to provide feedback information associated with the linearity of the output signal OUT and/or one or more of the power amplifier stages 72. Thus, the signal RETURN can include information regarding the amplification, and thus possible non-linearity, of the main and peak amplifier paths for any or all of the power amplifier stages 72, including the hybrid Doherty amplifier of the final stage 72. The DPD system 54 can thus be configured to control the main predistortion element 56 and the peak predistortion element 58 in response to the feedback signal FB_I and FB_Q.
As an example, the inphase feedback component FB_I can be implemented by the DPD system 54 to perform amplitude and/or phase adjustments to one or both of the main digital signal component and the peak digital signal component. As another example, the quadrature-phase feedback component FB_Q can be implemented by the DPD system 54 to perform amplitude and/or phase adjustments to the peak digital signal component. As a result, the DPD system 54 can compensate for non-linearity of the output signal OUT based on the feedback signal FB_I and FB_Q. The compensation can be adaptive, such that the DPD system 54 continuously monitors the feedback signal FB_I and FB_Q to perform non-linearity compensation. As another example, the compensation can be periodically performed, such as in response to a training sequence in which a series of training signals are periodically transmitted from the communication system 50 for the purpose of compensating for non-linearity of the output signal OUT.
Based on the above described configuration, the communication system 50 can effectively amplify and transmit the transmit signal TX in an efficient and linear manner. Specifically, the division of the transmit signal TX in the DPD system 54 in the programmable proportion, as well as the non-linear compensation of the main and peak analog signal components in response to the feedback signal FB_I and FB_Q, provides for a more efficient and linear operation of the at least one hybrid Doherty amplifier 72 in the amplifier chain 70. Furthermore, the division of the transmit signal TX in the DPD system 54 in the programmable proportion provides for a less complex and less cost-intensive design of the hybrid Doherty amplifier 72. As a result, the communication system 50 can likewise be employed at a reduced cost.
In view of the foregoing structural and functional features described above, certain methods will be better appreciated with reference to
At 156, each of the first digital signal component and the second digital signal component are converted into a first analog signal component and a second analog signal component, respectively. The conversion can be based on the operation of a separate DAC in each of the main amplifier path and peak amplifier path. At 158, the first analog signal component is provided to a main amplifier of a Doherty amplifier along the main amplifier path. The main amplifier can be a Class-AB amplifier. At 160, the second analog signal component is provided to a peak amplifier of the Doherty amplifier along the peak amplifier path. The peak amplifier can be a Class-C amplifier.
At 162, each of the first and second analog signal components are amplified. Each of the first and second analog signal components can also be amplified by additional power amplifiers upstream of the Doherty amplifier. One or more of the additional power amplifiers can include additional Doherty amplifiers. At 164, the amplified first and second analog signal components are combined as an output signal. The combination of the first and second signal components can be based on an impedance matching output circuit in the Doherty amplifier. The output signal can have been modulated, such that it can be transmitted.
What have been described above are examples of the invention. It is, of course, not possible to describe every conceivable combination of components or methodologies for purposes of describing the invention, but one of ordinary skill in the art will recognize that many further combinations and permutations of the invention are possible. Accordingly, the invention is intended to embrace all such alterations, modifications, and variations that fall within the scope of this application, including the appended claims.
The present invention claims priority from U.S. Provisional Patent Application No. 60/865,783, filed Nov. 14, 2006.
| Number | Date | Country | |
|---|---|---|---|
| 60865783 | Nov 2006 | US |
