CROSS-REFERENCE TO RELATED APPLICATIONS
The present application claims priority from provisional U.S. Patent Application Ser. No. 61/381,921, filed on Sep. 10, 2010, the specification of which is incorporated herein by reference.
BACKGROUND
Hybrid drives are conventional disk drives augmented with a non-volatile semiconductor memory (NVSM) such as a flash which helps improve certain aspects of the disk drive. For example, the non-volatile semiconductor memory may store boot data in order to expedite the boot operation of a host computer. Another use of a NVSM may be to store frequently accessed data and/or non-sequential data for which the access time is typically much shorter than the disk (which suffers from mechanical latency including seek and rotational latency). Other policies may reduce write amplification of the NVSM in order to maximize its longevity, such as storing frequently written data to the disk (or data having a write/read ratio that exceeds a predetermined threshold).
BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1A is a hybrid drive according to an embodiment of the present invention comprising a head actuated over a disk, and a non-volatile semiconductor memory (NVSM).
FIG. 1B is a flow diagram according to an embodiment of the present invention wherein when a write command is received from a host, data is written to a disk cache, and under certain conditions (e.g., when entering a power save mode) the disk cache is copied to the NVSM.
FIG. 2A shows a hybrid drive according to an embodiment of the present invention wherein the NVSM comprises an NVSM cache including a normal cache area and an extended cache area for storing the disk cache.
FIG. 2B is a flow diagram according to an embodiment of the present invention wherein when a write command is received from a host, data is written to one of the disk cache and the NVSM cache.
FIG. 3 is a flow diagram according to an embodiment of the present invention wherein the disk cache is copied to the NVSM prior to entering a power save mode.
FIG. 4A is a flow diagram according to an embodiment of the present invention wherein prior to entering a power save mode the disk cache is copied to the NVSM and then the head is either unloaded in order to spin down the disk, or servoing from the servo sectors is disabled based on a number of load/unload operations.
FIG. 4B is a flow diagram according to an embodiment of the present invention wherein when the disk drive is subject to vibrations, and the number of load/unload operations exceeds a threshold, the disk cache is copied to the NVSM, the head is unloaded, and the disk is spun down.
FIG. 5A is a flow diagram according to an embodiment of the present invention wherein when a number of consecutive read commands serviced from either the NVSM or the disk cache exceeds a threshold, the disk cache is copied the NVSM, the head is unloaded, and the disk is spun down.
FIG. 5B is a flow diagram according to an embodiment of the present invention wherein the disk is spun up when a read command is received to read data from the non-cache area of the disk.
FIG. 6A shows an embodiment of the present invention wherein prior to spinning down the disk, the data stored in the disk cache is copied to the extended NVSM cache.
FIG. 6B shows an embodiment of the present invention wherein after spinning down the disk, disk write commands are serviced by the NVSM cache (normal or extended).
FIG. 6C shows an embodiment of the present invention wherein after spinning up the disk the data written to the disk cache is tracked so that only the newly written data is copied to the NVSM prior to spinning down the disk.
FIG. 6D shows an embodiment of the present invention wherein after spinning up the disk the data of previous write commands serviced by the NVSM is copied to the disk cache.
FIG. 6E shows an embodiment of the present invention wherein after spinning up the disk the old data cached in the NVSM is written to the disk cache in order to garbage collect the disk cache.
FIG. 6F shows an embodiment of the present invention wherein after copying old data cached in the NVSM to the disk cache, the corresponding blocks of the NVSM are erased (garbage collected).
DETAILED DESCRIPTION OF EMBODIMENTS OF THE INVENTION
FIG. 1A shows a hybrid drive comprising a head 2 actuated over a disk 4 comprising a plurality of data tracks 6, wherein each data track comprises a plurality of data sectors. They hybrid drive further comprises a non-volatile semiconductor memory 8 (NVSM) comprising a plurality of memory segments. Control circuitry 10 defines a disk cache comprising a first plurality of the data sectors, and defines a non-cache area of the disk comprising a second plurality of the data sectors. The control circuitry 10 executes the flow diagram of FIG. 1B, wherein when a write command is received from a host (step 12), data is written to the disk cache (step 14), and under certain conditions (step 16), the data is copied from the disk cache to the NVSM (step 18).
In the embodiment of FIG. 1A, any suitable NVSM 8 may be employed, such as any suitable electrically erasable/programmable memory (e.g., a flash memory). In one embodiment, the NVSM 8 comprises a plurality of blocks, where each block comprises a plurality of memory segments referred to as pages and each page may store one or more data sectors. The blocks are programmed a page at a time, and an entire block is erased in a unitary operation. In embodiments described in more detail below, a garbage collection operation may be executed on previously written blocks in order to copy valid pages to new blocks (or to the disk) so that the previously written blocks may be erased and re-used.
The disk 4 shown in the embodiment of FIG. 1A comprises a plurality of servo sectors 200-20N that define the data tracks 6. The control circuitry 10 processes a read signal 22 emanating from the head 2 to demodulate the servo sectors 200-20N into a position error signal (PES) representing a position error of the head relative to a target data track. The control circuitry 10 comprises a servo compensator for filtering the PES to generate a control signal 24 applied to a voice coil motor (VCM) 26 that rotates an actuator arm 28 about a pivot in order to actuate the head 2 radially over the disk 4 in a direction that reduces the PES.
In the embodiment of FIG. 1A, the disk cache comprises two data tracks; however, the disk cache may comprise any suitable number of data tracks. In an embodiment shown in FIG. 2A, the NVSM 8 may comprise a NVSM cache, including a normal cache area and an extended cache area. The NVSM cache may improve performance of the hybrid drive by caching the data of disk write commands, wherein the data may be flushed to the disk when the hybrid drive is idle. The disk cache may improve performance by enabling the data of write commands to be simultaneously written to both the NVSM and the disk, as well as to simultaneously read data from both the NVSM and the disk when servicing read commands. In one embodiment, the disk cache may be used to reduce write amplification of the NVSM by spreading write commands over the NVSM cache and the disk cache using any suitable ratio. Storing data of write commands to the disk cache may reduce performance compared to the NVSM cache, but reducing write amplification of the NVSM increases its life, thereby providing some degree of NVSM performance over a longer period.
FIG. 2B is a flow diagram according to an embodiment of the present invention wherein when a write command is received from the host (step 12), a determination is made (step 30) as to where to cache the data. The data may be written to the disk cache (step 32) or to the NVSM cache (step 34) based on a usage ratio described above, or based on the bandwidth of each channel. For example, if a previous write command is being serviced by the NVSM cache, a current write command may be serviced by the disk cache so that both channels are simultaneously utilized. In another embodiment, the determination as to where to store data of a write command may be based on a suitable migration policy. For example, data of frequently written logical block addresses (LBAs) may be routed to the disk cache in order to avoid write amplification of the NVSM. While the disk is spun up and data is being written to the disk cache, a decision may be made (step 39) as to whether the data in the disk cache should be flushed to the non-cache area of the disk (step 41). For example, when the disk cache nears capacity the least frequently accessed data stored in the disk cache may be flushed to the non-cache area of the disk to free up space in the disk cache.
Under certain conditions (step 36), the data stored in the disk cache is copied to the extended NVSM cache (step 38). In one embodiment, there is no significant distinction between the normal NVSM cache and the extended NVSM cache (i.e., the extended NVSM cache is just an extension of the normal NVSM cache). In another embodiment, the extended NVSM cache and normal NVSM cache are maintained separately to facilitate garbage collecting the extended NVSM cache when the disk is spun back up.
The control circuitry may decide to copy the disk cache to the NVSM for any suitable reason. FIG. 3 is a flow diagram according to an embodiment of the present invention wherein the hybrid drive may modify its operation to save power, such floating the VCM (disable servoing from the servo sectors), or unloading the head onto a ramp and spinning down the disk. Prior to entering the power save mode (step 40), the data in the disk cache is copied to the extended NVSM cache (step 38). After copying the disk cache to the NVSM, operation of the disk channel can be modified to save power (step 42), such as by unloading the head and spinning down the disk.
FIG. 4A is a flow diagram according to an embodiment of the present invention wherein a number of load/unload operations is evaluated to determine the power save mode to enter. In this embodiment, the head is unloaded onto a ramp and loaded off the ramp over the disk. The friction of the head as it slides along the ramp during unload/load operations can generate unwanted debris that may eventually contaminate the disk surface. In addition, friction between the head and ramp may increase with the number of load/unload operations, thereby making it difficult to reliably control the unload/load velocity of the head. Accordingly, in one embodiment the number of load/unload operations is constrained relative to a threshold that increases over time until reaching a maximum. When entering the power save mode (step 40) and the load/unload operations does not exceed a threshold (step 44), the disk cache is copied to the NVSM (step 38), the head is unloaded onto the ramp (step 45), and the disk is spun down (step 47). When the number of load/unload operations exceeds the threshold (step 44), instead of unloading the head the servoing of the head from the servo sectors is disabled (step 49). For example, the head may be positioned over a middle diameter of the disk, and then a bias current applied to the VCM to maintain the head near the middle diameter of the disk without servoing from the servo sectors.
FIG. 4B is a flow diagram according to an embodiment of the present invention wherein the disk cache may be copied to the NVSM (step 38) when the disk drive is subjected to periodic vibrations (step 51) and the number of load/unload operations exceeds a threshold (step 53). In this manner, the head can be unloaded (step 45) and the disk spun down (step 47) so that access commands are serviced by the NVSM rather than continuously unload/load the head each time a vibration is detected. If the number of load/unload operations does not exceed the threshold (step 53), the head is unloaded onto the ramp (step 55) without copying the disk cache to the NVSM and without spinning down the disk. The head may then be loaded onto the disk when the current vibration subsides, or to service the next disk access command.
FIG. 5A is a flow diagram according to an embodiment of the present invention wherein while the disk is spun up an access command is received from the host (step 46). If the access command is a write command (step 48), a determination is made (step 50) as to whether to store the data of the write command to the disk cache (step 52) or to the normal NVSM cache (step 54). If the access command is a read command (step 48), and the data of the read command is not cached in the NVSM or disk cache (step 56), the data is read from the non-cache area of the disk (step 58) and returned to the host as well as stored in the disk cache (step 60). If the data of the read command is cached in the NVSM or disk cache (step 56), the data is read from the cache and returned to the host (step 62). If the number of consecutive read commands serviced by the cache exceeds a threshold (step 64) meaning that the non-cache area of the disk has not been accessed for an extended period, it is assumed that future read commands will be serviced by the cache. Accordingly, the disk cache is copied to the extended NVSM cache (step 66), and the head is unloaded and the disk is spun down (step 68).
FIG. 5B is a flow diagram according to an embodiment of the present invention wherein while the disk is spun down an access command is received from the host (step 70). If the access command is a write command (step 72), a determination is made (step 74) as to whether the data of the write command is targeted to the disk cache or to the NVSM cache. If targeted to the disk cache, the data of the write command is written to the extended NVSM cache (step 76), and if targeted to the NVSM cache, the data of the write command is written to the normal NVSM cache (step 78). If the access command is a read command (step 72), and the data of the read command is stored in the NVSM (step 80), the data is read from the NVSM and returned to the host (step 82). If the data of the read command is not stored in the NVSM (step 80), then the disk is spun up (step 84) and the data is read from the non-cache area of the disk and returned to the host (step 86). A determination is made as to whether to spin down the disk (step 88), for example, based on whether additional access commands are being received from the host. If it is determined to spin down the disk, the data of the read command is written to the extended NVSM cache (step 90) and the disk is spun down (step 92). If it is determined to keep the disk spinning, the data of the read command is written to the disk cache (step 94) or alternatively migrated to the flash based on the migration policy. While the disk is spinning and accessible, the data stored in the extended NVSM cache may be flushed to the disk (cache or non-cache area) in order to garbage collect blocks in the extended NVSM cache (step 96).
FIG. 6A shows an embodiment of the present invention wherein after writing data to the disk cache, in preparation to spin down the disk the data stored in the disk cache is copied to the extended NVSM cache. In the embodiment of FIG. 6A, only the valid data in the disk cache is copied to the extended NVSM cache. As new write commands are serviced by the extended NVSM cache as shown in FIG. 6B, the data of overwritten LBAs are invalidated in both the extended NVSM cache and the disk cache. FIG. 6C shows an embodiment wherein after spinning up the disk, the current buffer location of is saved. Prior to spinning down the disk again, only the new data written to the disk cache (relative to the saved buffer location) is copied to the extended NVSM cache.
FIG. 6D shows an embodiment of the present invention wherein when the disk is spun up, the data of write commands serviced by the extended NVSM cache is copied to the disk cache. In this embodiment, storing a copy of the data in both the disk cache and the extended NVSM cache may improve performance by servicing read commands from both channels simultaneously. In addition, waiting until the disk is spun down to copy the data of new write commands to the extended NVSM cache extends the life of the NVSM by reducing write amplification.
FIG. 6E shows an embodiment of the present invention wherein the extended NVSM cache is used to garbage collect the buffer of the disk cache. The valid data at the tail of the circular buffer is read from the extended NVSM cache (rather than from the disk cache) and written to the head of the circular buffer. The corresponding segment at the tail of the circular buffer is then marked as invalid (available for overwriting). The data may still be read from either or both the extended NVSM cache and the disk cache since a copy of the data remains in both.
FIG. 6F shows an embodiment of the present invention wherein the disk cache is used to garbage collect blocks in the extended NVSM cache. After copying valid data from blocks in the extended NVSM cache to the disk cache, the blocks in the extended NVSM cache are erased and made available for re-use. In this embodiment, there is one copy of the data (in the disk cache) until the disk is spun down again (wherein the data is copied back to the extended NVSM cache).
In one embodiment, the data stored in either or both of the disk cache and the NVSM cache may be flushed to the non-cache area of the disk based on any suitable eviction policy (e.g., flushing the least frequently accessed data) in order to free space in either or both caches. If data is flushed from the extended NVSM cache and a copy is stored in the disk cache, the copy in the disk cache is marked as invalid so that it may be overwritten.
Any suitable control circuitry may be employed to implement the flow diagrams in the embodiments of the present invention, such as any suitable integrated circuit or circuits. For example, the control circuitry may be implemented within a read channel integrated circuit, or in a component separate from the read channel, such as a disk controller and/or NVSM controller, or certain steps described above may be performed by a read channel and others by a disk controller and/or NVSM controller. In one embodiment, the read channel and controllers are implemented as separate integrated circuits, and in an alternative embodiment they are fabricated into a single integrated circuit or system on a chip (SOC). In addition, the control circuitry may include a suitable preamp circuit implemented as a separate integrated circuit, integrated into the read channel or disk controller circuit, or integrated into an SOC.
In one embodiment, the control circuitry comprises a microprocessor executing instructions, the instructions being operable to cause the microprocessor to perform the steps of the flow diagrams described herein. The instructions may be stored in any computer-readable medium. In one embodiment, they may be stored on a non-volatile semiconductor memory external to the microprocessor, or integrated with the microprocessor in a SOC. In another embodiment, the instructions are stored on the disk and read into a volatile semiconductor memory when the hybrid drive is powered on. In yet another embodiment, the control circuitry comprises suitable logic circuitry, such as state machine circuitry.
Patent Grant
8782334
