The present invention relates to a hybrid integrated circuit (IC) for an ultrasound beamformer probe providing both the high-voltage requirements of the transducer element interface and the high density functionality requirements of the control and beamforming functions.
Medical ultrasound imaging systems are used for non-invasively viewing internal structures of the human body in real time. The ultrasound imaging systems include an array of transducers for transmitting and receiving ultrasonic pulses. Each transducer is a piezo-electric element. A transmit beamformer circuit applies electric pulses to each transducer in the array of transducers in a specific timing sequence to product a transmit beam. The transmit beam is reflected by tissue structures having disparate acoustic characteristics. The reflected beam is converted by the receive transducers into electric pulses which are translated into image signals which may be represented by a display. Each transducer may operate as both transmit and receive transducer.
To achieve high resolution, the transducer array is made to include several hundred to several thousand transducer elements. The transducers are connected to microbeamformer electronics which transform the large number of signals from the transducers into a number of signals which can be managed by a further beamformer in the ultrasound processor station. The microbeamformer electronics are required to be arranged in the probe with the transducers because it is difficult to transmit all of the signals from the transducers to the ultrasound processing station by cable.
Circuits in the probe are required to provide enough voltage and power for operating the driver for the transmit beam and must at the same limit heat production at the probe. Probes typically require 60-200Vp-p, with newer probes being at the lower end of the range. The driver for pulsing the elements and switches to connect and disconnect the receiver from the transmit pulses are required to produce these voltages. However, the control and beamforming functions require a high density of integration for handling the large number of signals from the transducers. IC devices that offer high voltage are physically large, consume more energy and thereby produce more heat. However, IC devices that offer high density limit the working voltage.
It is an object of the present invention to provide a hybrid IC which meets both the high voltage and high density requirements for a micro-beamformer ultrasound probe.
The object of the present invention is met by a hybrid integrated circuit package for a microbeamformer in an ultrasound probe, the ultrasound probe having an array of transducer elements for transmitting and receiving pulses. The circuit package includes a substrate, a high voltage integrated circuit device including a driver for generating a transmit pulse to be transmitted to the transducer elements for producing a transmit beam, and a low voltage integrated circuit device including time delay circuits for receiving reflected pulses from the transducer elements and delaying the reflected pulses and a summation circuit summing groups of the delayed reflected pulses for producing beamformed signals. The high voltage integrated circuit device may also include a switch for isolating the transmit pulses from the reflected pulses and an amplifier for implementing a receiver gain.
The high voltage integrated circuit may be CMOS or BiCMOS and the low voltage integrated circuit comprises complementary metal oxide semiconductors (CMOSs).
In some cases, the array of transducer elements may be connected directly to said substrate.
The substrate may be rigid or flexible. Furthermore, the substrate may comprise a rigid component connected to a flex material.
The high voltage integrated circuit device and the low voltage integrated circuit device may be connected to the substrate using a ball grid array.
Furthermore, the high voltage integrated circuit device, the low voltage integrated circuit device, and the substrate may be connected in a stacked arrangement.
Other objects and features of the present invention will become apparent from the following detailed description considered in conjunction with the accompanying drawings. It is to be understood, however, that the drawings are designed solely for purposes of illustration and not as a definition of the limits of the invention, for which reference should be made to the appended claims. It should be further understood that the drawings are not necessarily drawn to scale and that, unless otherwise indicated, they are merely intended to conceptually illustrate the structures and procedures described herein.
In the drawings, wherein like reference characters denote similar elements throughout the several views:
a and 9b are cross sectional views of MPMs according to the present invention.
In the preferred embodiment, the circuit shown in
In one embodiment, the LVIC 310 is made using CMOS technology and the HVIC 320 is manufactured using bipolar or field effect transistor technology. While CMOS technology is currently preferred, the LVIC 310 may alternatively be manufactured using Field Programmable Gate Arrays (FPGAs).
In the transmit mode, the delay line 311 is reversed via switches 315 and the capacitors of the delay line 311 are pre-charged. The HV amplifier 322 is connected to the RAM by switch 326 and the HV transmit receive switch 324 is open, blocking the high voltage from being applied to the LVIC 310. In this mode, a pulse from the HV amplifier 322 is applied to the load, i.e., the transducer element EL.
In the receive mode, the delay line 311 is arranged to receive an input. Switch 326 is open to disconnect the HV amplifier 322 from the RAM 311. The HV transmit/receive switch 324 is closed and the signal generated at the transducer element in response to the pulse from the HV amplifier 322 is allowed to pass to the delay line 311 of the LVIC 310. The delayed signal is then sent to a summer for further processing.
The LVIC 310 and the HVIC 320 may be arranged in any hybrid IC configurations that are now known or will be subsequently known in the art. By non-limiting example,
a and 9b show that a stacked die concept may also be used to assemble the hybrid IC. In the embodiments shown, the LVIC 310 and HVIC 320 are arranged in a micro ball grid array substrate 810. The stacking of the LVIC 310 and HVIC 320 may be accomplished using neo-stacking technologies by Irving Sensors, Inc., Costa Mesa, Calif., in which the interconnection is made by side plating. Alternatively, the interconnection may occur at the package level using bond wires as by ChipPAK, Inc., Korea.
Thus, while there have shown and described and pointed out fundamental novel features of the invention as applied to a preferred embodiment thereof, it will be understood that various omissions and substitutions and changes in the form and details of the devices illustrated, and in their operation, may be made by those skilled in the art without departing from the spirit of the invention. For example, it is expressly intended that all combinations of those elements which perform substantially the same function in substantially the same way to achieve the same results are within the scope of the invention. Moreover, it should be recognized that structures and/or elements shown and/or described in connection with any disclosed form or embodiment of the invention may be incorporated in any other disclosed or described or suggested form or embodiment as a general matter of design choice. It is the intention, therefore, to be limited only as indicated by the scope of the claims appended hereto.
Filing Document | Filing Date | Country | Kind | 371c Date |
---|---|---|---|---|
PCT/IB2005/053803 | 11/17/2005 | WO | 00 | 5/21/2007 |
Number | Date | Country | |
---|---|---|---|
60630090 | Nov 2004 | US |