The present disclosure relates to an organic light emitting diode (OLED) display panel and a method of manufacturing the same, and more particularly, to a hybrid OLED display panel in which a solar cell is directly embedded inside a display panel in units of pixels, and a method of manufacturing the same.
An organic light emitting diode (OLED) display is a display device implemented using an OLED made of an organic compound that emits a light in response to an electric current. Further, the OLED display is spotlighted because the display does not require a backlight device, has a light expression range that is wider than that of a liquid crystal display (LCD), has excellent color reproduction, and is freely deformed due to a small thickness thereof. In an OLED display according to the related art, power should be separately supplied from an external unit or power should be supplied using a separate embedded battery to drive a display panel, and power efficiency of the OLED display is reaching a limit thereof.
An aspect of the present disclosure provides a hybrid organic light emitting diode (OLED) display panel which itself has solar cells embedded in units of pixels in a display panel, thus enabling both viewing the display panel and charging power from solar energy, and a method of manufacturing the same.
Further, another aspect of the present disclosure provides a transparent OLED display panel that may include a pixel-transparent window in a pixel layout to implement a window-type transparent display panel having high transmittance, and a method of manufacturing the same.
Further, still another aspect of the present disclosure provides an OLED display panel that may include a pixel mirror window in the pixel layout to implement a mirror display panel, and a method of manufacturing the same.
According to an embodiment of the present disclosure, a hybrid organic light emitting diode (OLED) display panel comprises an OLED panel including a plurality of pixels arranged in a predetermined first array structure on a substrate, wherein each of the plurality of pixels includes a pixel light emitting part, and wherein the pixel light emitting part includes an OLED, a driving thin film transistor configured to drive the OLED, and a switching thin film transistor configured to switch the driving thin film transistor; and a solar cell including a plurality of pixel solar cells arranged in the first array structure to correspond to the plurality of pixels on the substrate, wherein each of the plurality of pixel solar cells is disposed to correspond to the pixel light emitting part within a pixel area set as a pixel unit.
According to an embodiment, the plurality of pixel light emitting parts and the plurality of pixel solar cells provided in the plurality of pixels may be arranged to have the same array period.
According to an embodiment, the pixel light emitting part may be disposed in a first area within the pixel area, and the pixel solar cell may be disposed in a second area corresponding to a corner area within the pixel area. The second area may be an area that does not overlap with the first area on a plane of the hybrid OLED display panel.
According to an embodiment, the driving thin film transistor may include a first channel layer on the substrate, a first gate layer formed to be insulated on the first channel layer, and a first drain electrode and a first source electrode electrically connected to the first channel layer.
According to an embodiment, the pixel solar cell may include a first electrode layer on the substrate, a first semiconductor layer laminated on the first electrode layer, a second semiconductor layer laminated on the first semiconductor layer in a heterojunction structure, and a second electrode layer laminated on the second semiconductor layer.
According to an embodiment, the switching thin film transistor may include a second channel layer on the substrate, a second gate layer formed to be insulated on the second channel layer, and a second drain electrode and a second source electrode electrically connected to the second channel layer.
According to an embodiment, the first channel layer and the first semiconductor layer may be made of the same first semiconductor material corresponding to a first type that is one of an N-type and a P-type. The second channel layer and the second semiconductor layer may be made of the same second semiconductor material corresponding to a second type that is the other one of the N-type and the P-type.
According to an embodiment, the hybrid OLED display panel may further comprise a transparent window including a plurality of pixel-transparent windows arranged in the first array structure to correspond to the plurality of pixels on the substrate, wherein each of the plurality of pixel-transparent windows is disposed in a one-to-one correspondence with the pixel light emitting part within the pixel area.
According to an embodiment, the plurality of pixel light emitting parts and the plurality of pixel-transparent windows may be arranged to have the same array period, and the pixel-transparent window may be disposed in a third area within the pixel area. The third area may be an area that does not overlap with the first area and the second area on a plane of the hybrid OLED display panel.
According to an embodiment, the driving thin film transistor further may include a first insulating layer laminated on the first channel layer, a first interlayer insulating layer covering the first gate layer, a second insulating layer laminated on the first interlayer insulating layer, and a second interlayer insulating layer formed on the second insulating layer.
According to an embodiment, the second channel layer may be laminated on the first interlayer insulating layer, the second gate layer may be formed on the second insulating layer, and the second interlayer insulating layer may cover the second gate layer.
According to an embodiment, the pixel-transparent window may include a first transparent insulating layer laminated on the substrate, a first transparent interlayer insulating layer laminated on the first transparent insulating layer, a second transparent insulating layer laminated on the first transparent interlayer insulating layer, and a second transparent interlayer insulating layer laminated on the second transparent insulating layer.
According to an embodiment, the first insulating layer and the first transparent insulating layer may be made of the same first insulating material, the second insulating layer and the second transparent insulating layer may be made of the same second insulating material, the first interlayer insulating layer and the first transparent interlayer insulating layer may be made of the same third insulating material, and the second interlayer insulating layer and the second transparent interlayer insulating layer may be made of the same fourth insulating material.
According to an embodiment, the hybrid OLED display panel may further comprise a mirror window including a plurality of pixel mirror windows made of a reflective material and arranged in the first array structure to correspond to the plurality of pixels on the substrate, wherein each of the plurality of pixel mirror windows is disposed in a one-to-one correspondence with the pixel light emitting part within the pixel area.
According to an embodiment, the plurality of pixel light emitting parts and the plurality of pixel mirror windows may be arranged to have the same array period, and the pixel mirror window may be disposed in a fourth area within the pixel area. The fourth area may be an area that does not overlap with the first area and the second area on a plane of the hybrid OLED display panel.
According to an embodiment of the present disclosure, a method of manufacturing a hybrid OLED display panel comprises forming an OLED panel including a plurality of pixels arranged in a first array structure on a substrate; and forming a solar cell including a plurality of pixel solar cells arranged in the first array structure to correspond to the plurality of pixels on the substrate.
According to an embodiment, the forming of the OLED panel may include forming the OLED panel to include a pixel light emitting part for each of the plurality of pixels, wherein the pixel light emitting part includes an OLED, a driving thin film transistor configured to drive the OLED, and a switching thin film transistor configured to switch the driving thin film transistor.
According to an embodiment, the forming of the solar cell may include forming the solar cell to dispose each of the plurality of pixel solar cells in a one-to-one correspondence with the pixel light emitting part within a pixel area set as a pixel unit.
According to an embodiment, the forming of the OLED panel may include forming the driving thin film transistor on the substrate.
According to an embodiment, the forming of the driving thin film transistor may include laminating a first channel layer on the substrate; forming a first gate layer to be insulated on the first channel layer; and forming a first drain electrode and a first source electrode to be electrically connected to the first channel layer.
According to an embodiment, the forming of the solar cell may include laminating a first electrode layer on the substrate; laminating a first semiconductor layer on the first electrode layer; laminating a second semiconductor layer on the first semiconductor layer in a heterojunction structure; and laminating a second electrode layer on the second semiconductor layer.
According to an embodiment, the forming of the OLED panel further may include forming the switching thin film transistor on the substrate. The forming of the switching thin film transistor may include laminating a second channel layer on the substrate; forming a second gate layer to be insulated on the second channel layer; and forming a second drain electrode and a second source electrode to be electrically connected to the second channel layer.
According to an embodiment, the laminating of the first channel layer and the laminating of the first semiconductor layer may be simultaneously performed, and the laminating of the second channel layer and the laminating of the second semiconductor layer may be simultaneously performed.
According to an embodiment, the method may further include forming a transparent window to dispose each of a plurality of pixel-transparent windows in a one-to-one correspondence with the pixel light emitting part within the pixel area, and wherein the plurality of pixel-transparent windows are arranged in the first array structure to correspond to the plurality of pixels on the substrate.
According to an embodiment, the forming of the driving thin film transistor further may include laminating a first insulating layer on the first channel layer; laminating a first interlayer insulating layer covering the first gate layer; laminating a second insulating layer on the first interlayer insulating layer; and laminating a second interlayer insulating layer on the second insulating layer.
According to an embodiment, the forming of the transparent window may include laminating a first transparent insulating layer on the substrate; laminating a first transparent interlayer insulating layer on the first transparent insulating layer; laminating a second transparent insulating layer on the first transparent interlayer insulating layer; and laminating a second transparent interlayer insulating layer on the second transparent insulating layer.
According to an embodiment, the laminating of the first insulating layer and the laminating of the first transparent insulating layer may be simultaneously performed, the laminating of the second insulating layer and the laminating of the second transparent insulating layer may be simultaneously performed, the laminating of the first interlayer insulating layer and the laminating of the first transparent interlayer insulating layer may be simultaneously performed, and the laminating of the second interlayer insulating layer and the laminating of the second transparent interlayer insulating layer may be simultaneously performed.
According to an embodiment, the method may further include forming a mirror window made of a reflective material to dispose each of a plurality of pixel mirror windows in a one-to-one correspondence with the pixel light emitting part within the pixel area, wherein the plurality of pixel mirror windows are arranged in the first array structure to correspond to the plurality of pixels on the substrate.
According to an embodiment of the present disclosure, a solar cell itself is embedded in units of pixels in a display panel, thus enabling both viewing the display panel and charging power from solar energy, and accordingly, energy efficiency of an OLED display panel may be maximized.
Further, according to an embodiment of the present disclosure, there is provided a transparent OLED display panel that may include a pixel-transparent window in a pixel layout to implement a window-type transparent display panel having high transmittance, and a method of manufacturing the same.
Further, according to an embodiment of the present disclosure, there is provided a mirror-type OLED display panel that may include a pixel mirror window in the pixel layout to implement a mirror display panel, and a method of manufacturing the same.
Hereinafter, embodiments of the present disclosure will be described in more detail with reference to the accompanying drawings. The embodiments of the present disclosure may be modified into various forms, and the scope of the present disclosure should not be construed to be limited to the following embodiments. The embodiments of the present disclosure are provided to more completely describe the present disclosure for those skilled in the art. Thus, the shapes of the components of the drawings are exaggerated to emphasize a clearer description thereof.
It should be noted in advance that a configuration of the present disclosure for clarifying the solution of the problem to be solved by the present disclosure will be described in detail with reference to the accompanying drawings based on an embodiment of the present disclosure, the same reference numerals are assigned to the same components even though the components are in different drawings in assigning reference numerals to components of the drawings, and components in other drawings may be cited when necessary in the description of the drawings.
Meanwhile, directional terms such as an upper side, a lower side, an one side, and the other side are used in relation to orientation of the accompanying drawings. Since the components of the embodiment of the present disclosure may be positioned in various orientations, the directional terms are used for illustrative purposes and do not limit the positions thereof.
Further, terms such as first and second may be used to describe various elements, but the elements should not be limited by the terms. The terms may be used for the purpose of distinguishing one element from another element. For example, while not deviating from the scope of the present disclosure, a first element may be named a second element, and similarly, the second element may be named the first element.
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In the OLED panel 20, a pixel light emitting part 200 may be provided at each of the pixels 100. In the embodiment, the pixel light emitting part 200 may include a red light emitting pixel 202, a green light emitting pixel 204, and a blue light emitting pixel 206. Detailed descriptions of configurations well known in the art related to the pixel light emitting part 200 will be omitted.
The pixel light emitting part 200 may include an OLED 230, a driving thin film transistor 210 that drives the OLED 230, and a switching thin film transistor 220 that switches the driving thin film transistor 210.
The plurality of pixel solar cells 300 may be arranged in the same first array structure as that of the plurality of pixel light emitting parts 200 to correspond to the plurality of pixels 100 on the substrate 110. The first array structure may be a matrix structure in which components are arranged in a plurality of row units and a plurality of column units.
Each of the pixel solar cells 300 may be disposed in a one-to-one correspondence with the pixel light emitting part 200 within a pixel area that is set as a pixel unit. The plurality of pixel light emitting parts 200 and the plurality of pixel solar cells 300 that are provided in the plurality of pixels 100 may be arranged to have the same array period.
The pixel light emitting part 200 may be disposed in a first area within the pixel area corresponding to a single pixel. The pixel solar cell 300 may be disposed in a second area corresponding to a corner area within the pixel area that is set as the pixel unit. The second area in which the pixel solar cell 300 is disposed may be an area that does not overlap the first area in which the pixel light emitting part 200 is formed on a plane of the hybrid OLED display panel 10, and may be, for example, a lower end of or an area adjacent to R/G/B pixels.
The driving thin film transistor 210 may include a first channel layer 211 and a first insulating layer 212 that are formed on the substrate 110 and a buffer layer 120 on the substrate 110, a first gate layer 213 that is formed to be insulated on the first channel layer 211, a first interlayer insulating layer 214 that covers the first gate layer 213, an insulating layer 215 that is formed on the first interlayer insulating layer 214, and first drain/source electrodes 216 and 217 that are electrically connected to the first channel layer 211.
The substrate 110 may be, for example, a glass substrate or a polyimide substrate, but the present disclosure is not limited thereto. The buffer layer 120 may be made of a material such as SiNx, SiOx, and SiONx, but the present disclosure is not limited thereto. The buffer layer 120 may be variously implemented as a single buffer layer, a double buffer layer, or a triple or more buffer layer.
The switching thin film transistor 220 may include a second channel layer 221 that is formed on the substrate 110 and the buffer layer 120 on the substrate 110, an insulating layer 225 that is formed on the second channel layer 221, a second gate layer 222 that is formed on the insulating layer 225 to be insulated from the second channel layer 221, and second drain/source electrodes 223 and 224 that are electrically connected to the second channel layer 221.
The pixel solar cell 300 may include a first electrode layer 310 that is laminated on the substrate 110, a first semiconductor layer 320 laminated on the first electrode layer 310, a second semiconductor layer 330 laminated on the first semiconductor layer 320 in a heterojunction structure, and a second electrode layer 340 laminated on the second semiconductor layer 330. A metal electrode, such as Ti and Mo, which is stable even when the metal electrode is annealed at a temperature of about 450° C. after subjected to excimer laser annealing (ELA) crystallization may be used as the first electrode layer 310.
The first channel layer 211 of the driving thin film transistor 210 and the first semiconductor layer 320 of the pixel solar cell 300 that constitute the pixel light emitting part 200 may be made of the same first semiconductor material corresponding to a first type that is one of N-type and P-type. In the illustrated example, the first channel layer 211 and the first semiconductor layer 320 are made of a P-type polycrystalline silicon semiconductor material doped with B, Al, Ga, or the like.
The second channel layer 221 of the driving thin film transistor 210 and the second semiconductor layer 330 of the pixel solar cell 300 that constitute the pixel light emitting part 200 may be made of the same second semiconductor material corresponding to a second type that is the other one of N-type and P-type. In the illustrated example, the second channel layer 221 and the second semiconductor layer 330 may be made of an N-type IGZO oxide semiconductor material.
For example, an N-type semiconductor layer may be formed by sputtering a-IGZO material having In:Ga:Zn=1:1:1. For example, the P-type semiconductor layer may be made of a boron-doped a-Si material and may be formed by a method of forming a film using a chemical vapor deposition (CVD) manner and then implanting a doping material or a method of treating the a-Si material using an ELA manner and then doping the a-Si material with a boron.
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In this case, the same material used for the two channel layers that are semiconductor layers of the driving thin film transistor 210 and the switching thin film transistor 220 of the pixel light emitting part 200 may be applied as an N-type semiconductor material and a P-type semiconductor material of the pixel solar cell 300 so as to form a hybrid P-N junction. Meanwhile, the second electrode layer 340 corresponding to an upper electrode of the pixel solar cell 300 may be patterned simultaneously while the drain/source electrodes of the driving thin film transistor 210 and the switching thin film transistor 220 are formed, thereby achieving process simplification.
In this way, by patterning the pixel solar cell 300 simultaneously with the patterning process of the driving thin film transistor 210 and the switching thin film transistor 220 in the pixel light emitting part 200, the first channel layer 211 of the pixel light emitting part 200 and the first semiconductor layer 320 of the pixel solar cell 300 may be formed simultaneously, and the second channel layer 221 of the pixel light emitting part 200 and the second semiconductor layer 330 of the pixel solar cell 300 may be formed simultaneously, consequently, the process for forming the pixel solar cell 300 may be simplified, and process costs and time may be reduced.
The embodiment in which the switching thin film transistor 220 is formed after the driving thin film transistor 210 is formed has been described above. However, the driving thin film transistor 210 may be formed after the switching thin film transistor 220 is first formed or the driving thin film transistor 210 and the switching thin film transistor 220 may be formed simultaneously.
The OLED 230 constituting the pixel light emitting part 200 may include a flattening layer 231 that is formed on the driving thin film transistor 210 and the switching thin film transistor 220, pixel electrodes 232 and 233 that are connected to a first drain electrode or a first source electrode of the driving thin film transistor 210, and a pixel defining layer 234 that is formed on the flattening layer 231.
In the above-described embodiments, one of the channel layer of the driving thin film transistor 210 and the channel layer of the switching thin film transistor 220 may be made of a P-type semiconductor material, and the other one thereof may be made of an N-type semiconductor material. Further, in the pixel solar cell 300, one of the plurality of semiconductor layers that are vertically laminated may be made of a P-type semiconductor material, and the other one thereof may be made of an N-type semiconductor material.
An OLED light emitting layer 235 may be formed on the flattening layer 231 An upper electrode for applying power or ground, for example, a cathode electrode or an anode electrode, may be formed on the light emitting layer 235. For example, the flattening layer 231 may be made of an OC organic film such as polyimide (PI) or polyamide (PA) or an inorganic film.
The plurality of pixel-transparent windows 400 may be arranged in the same first array structure as that of the pixel light emitting parts 200 to correspond to the plurality of pixels 100 on the substrate 110. Each of the pixel-transparent windows 400 may be arranged in a one-to-one correspondence with the pixel light emitting part 200 within the pixel area defined as the pixel unit. The plurality of pixel light emitting parts 200 and the plurality of pixel-transparent windows 400 may be arranged to have the same array period.
The pixel-transparent window 400 may be disposed in a third area within the pixel area defined as the pixel unit. The third area in which the pixel-transparent window 400 is disposed may be an area that does not overlap the first area in which the pixel light emitting part 200 is disposed and the second area in which the pixel solar cell 300 is disposed, on a plane of the hybrid OLED display panel. A transmittance of the pixel-transparent window 400 may be improved by etching and removing all remaining metal films except for the inorganic film.
The driving thin film transistor 210 may further include a first interlayer insulating layer 218 that covers the first gate layer 213, a second insulating layer 214 that is laminated on the first interlayer insulating layer 218, and a second interlayer insulating layer 219 that is formed on the second insulating layer 214. The second channel layer 221 may be laminated on the first interlayer insulating layer 218, the second gate layer 222 may be formed on the second insulating layer 214, and the second interlayer insulating layer 219 may cover the second gate layer 222.
The pixel-transparent window 400 may include a first transparent insulating layer 410 that is laminated on the substrate 110 and the buffer layer 120, a first transparent interlayer insulating layer 420 that is laminated on the first transparent insulating layer 410, a second transparent insulating layer 430 laminated on the first transparent interlayer insulating layer 420, and a second transparent interlayer insulating layer 440 that is laminated on the second transparent insulating layer 430.
The first transparent insulating layer 410, the first transparent interlayer insulating layer 420, the second transparent insulating layer 430, and the second transparent interlayer insulating layer 440 may be independently formed as a single film of SiOx, SiNx, or SiONx, a double layer obtained by combining SiOx, SiNx, and/or SiONx (e.g., SiOx/SiNx, SiNx/SiOx, SiONx/SiNx or the like), or a triple layer (e.g., SiNx/SiOx/SiNx, SiOx/SiNx/SiOx, SiONx/SiOx/SiNx or other combinations).
The first insulating layer 212 of the driving thin film transistor 210 and the first transparent insulating layer 410 of the pixel-transparent window 400 may be made of the same first insulating material. The second insulating layer 214 of the pixel light emitting part 200 and the second transparent insulating layer 430 may be made of the same second insulating material.
The first interlayer insulating layer 218 of the pixel light emitting part 200 and the first transparent interlayer insulating layer 420 of the pixel-transparent window 400 may be made of the same third insulating material. Further, the second interlayer insulating layer 219 of the pixel light emitting part 200 and the second transparent interlayer insulating layer 440 of the pixel-transparent window 400 may be made of the same fourth insulating material.
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The plurality of pixel mirror windows 500 may be arranged in the same first array structure as that of the pixel light emitting parts 200 to correspond to the plurality of pixels 100 on the substrate 110. Each of the pixel mirror windows 500 may be arranged in a one-to-one correspondence with the pixel light emitting part 200 within the pixel area defined as the pixel unit. The plurality of pixel light emitting parts 200 and the plurality of pixel mirror windows 500 may be arranged to have the same array period.
The pixel mirror window 500 may be disposed in a fourth area within the pixel area defined as the pixel unit. The fourth area in which the pixel mirror window 500 is disposed may be an area that does not overlap the first area in which the pixel light emitting part 200 is disposed and the second area in which the pixel solar cell 300 is disposed, on a plane of the hybrid OLED display panel.
The pixel mirror window 500 may include a first transparent insulating layer 510 that is laminated on the substrate 110 and the buffer layer 120, a first transparent interlayer insulating layer 520 that is laminated on the first transparent insulating layer 510, a second transparent insulating layer 530 that is laminated on the first transparent interlayer insulating layer 520, a second transparent interlayer insulating layer 540 that is laminated on the second transparent insulating layer 530, and a reflective layer 550 that is laminated on the second transparent interlayer insulating layer 540 and made of a reflective material.
The first insulating layer 212 of the driving thin film transistor 210 and the first transparent insulating layer 510 of the pixel mirror window 500 may be made of the same first insulating material. The second insulating layer 214 of the pixel light emitting part 200 and the second transparent insulating layer 530 of the pixel mirror window 500 may be made of the same second insulating material.
The first interlayer insulating layer 218 of the pixel light emitting part 200 and the first transparent interlayer insulating layer 520 of the pixel mirror window 500 may be made of the same third insulating material. Further, the second interlayer insulating layer 219 of the pixel light emitting part 200 and the second transparent interlayer insulating layer 540 of the pixel mirror window 500 may be made of the same fourth insulating material. The reflective layer 550 may finally be laminated on the inorganic layer using an Ag-based material having high reflectivity, thereby implementing a mirror effect.
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The hybrid OLED display panel according to an embodiment of the present disclosure may be applied to various display panels such as an OLED display, a flexible OLED display, a rollable OLED display, and a TFT-LED.
The above detailed description exemplifies the present disclosure. Furthermore, the above-mentioned contents describe the embodiments of the present disclosure, and the present disclosure may be used in various other combinations, changes, and environments. That is, the present disclosure may be modified and corrected without departing from the scope of the present disclosure that is disclosed in the specification, the equivalent scope to the written disclosures, and/or the technical or knowledge range of those skilled in the art.
The written embodiment describes the best state for implementing the technical spirit of the present disclosure, and various changes required in the detailed application fields and purposes of the present disclosure may be made. Thus, the above detailed description of the present disclosure is not intended to restrict the present disclosure in an embodiment. Furthermore, it should be construed that the appended claims include an embodiment.
Number | Date | Country | Kind |
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10-2021-0137322 | Oct 2021 | KR | national |
10-2021-0137323 | Oct 2021 | KR | national |
10-2021-0137324 | Oct 2021 | KR | national |
Filing Document | Filing Date | Country | Kind |
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PCT/KR2022/004573 | 3/31/2022 | WO |