Hypervisor-based interception of memory and register accesses

Abstract

A security agent configured to initiate a security agent component as a hypervisor for a computing device is described herein. The security agent component may then determine pages of the memory which include identified memory locations and set privilege attributes of those pages to prevent specific types of access to the memory locations, such as executing code stored at a memory location. Also, the security agent component may refrain from setting intercepts for pages including a whitelisted memory location. Further, the security agent component may set intercepts for debug registers, note read operations from the operating system for those registers, and respond with operating-system-permitted values. Additionally, the security agent component may set intercepts for instructions for performing write operations on control registers.

Description

BACKGROUND

With Internet use forming an ever greater part of day to day life, security exploits that steal or destroy system resources, data, and private information are an increasing problem. Governments and businesses devote significant resources to preventing intrusions and thefts related to these security exploits. Security exploits come in many forms, such as computer viruses, worms, trojan horses, spyware, keystroke loggers, adware, and rootkits. These exploits are delivered in or through a number of mechanisms, such as spearfish emails, clickable links, documents, executables, or archives. Some of the threats posed by security exploits are of such significance that they are described as cyber terrorism or industrial espionage.

While many activities of security exploits can be introspected using hooks or other interception techniques, certain operations cannot be hooked or intercepted in kernel-mode or user-mode. Such operations include memory accesses and individual instruction execution by the processor. Current techniques involve running guest operating systems (OSes) and applications of those guest OSes in virtual machines or running each application in a separate virtual machine. Each of these techniques involves significant overhead, and neither technique is capable of intercepting memory accesses or instructions executing on the host OS itself.

BRIEF DESCRIPTION OF THE DRAWINGS

The detailed description is set forth with reference to the accompanying figures. In the figures, the left-most digit(s) of a reference number identifies the figure in which the reference number first appears. The use of the same reference numbers in different figures indicates similar or identical items or features.

FIGS. 1a-1d illustrates an overview of a security agent configured to initiate execution of a security agent component as a hypervisor of computing device, the security agent component setting intercepts on memory locations and processor registers of the computing device.

FIGS. 2a-2b illustrate overviews of techniques for protecting memory locations through privilege attributes of pages while enabling operations on other memory locations associated with those pages.

FIG. 3 illustrates a component level view of a computing device configured with a security agent and security agent component configured to execute as a hypervisor.

FIG. 4 illustrates an example process for initiating execution of a security agent component as a hypervisor for a computing device, determining memory locations of the computing device to be intercepted, and setting intercepts for the determined memory locations.

FIG. 5 illustrates an example process for protecting memory locations through privilege attributes of pages while enabling operations on other memory locations associated with those pages.

FIG. 6 illustrates an example process for determining memory locations to be intercepted and setting privilege attributes for memory pages including those memory locations, including setting a memory page to non-executable.

FIG. 7 illustrates an example process for determining that a memory location is whitelisted and excluding memory page(s) that include the whitelisted memory location from a set of pages to have their privilege attributes changed.

FIG. 8 illustrates an example process for intercepting accesses of debug registers and, when such accesses are from the operating system, responding with operating-system-permitted values.

FIG. 9 illustrates an example process for intercepting instructions for accessing control registers.

DETAILED DESCRIPTION

This disclosure describes, in part, security agent configured to initiate a security agent component as a hypervisor for a computing device. Such initiation may involve, in some implementations, storing processor state information into a data structure and instructing the processor to initiate the security agent component as the hypervisor based on the data structure. The security agent may then determine a subset of memory locations in memory of the computing device to be intercepted or one or more processor registers to be intercepted. Such a determination may be based, for example, on a security agent configuration received from a security service. The security agent component may then set intercepts for the determined memory locations or registers. Setting such intercepts may include setting privilege attributes for pages which include the determined memory locations so as to prevent specific operations in association with those memory locations or setting intercepts for instructions affecting the registers.

In some implementations, after setting privilege attributes for pages, operations affecting memory locations in those pages may be noted. In response to one of the specific operations affecting the determined memory location associated with a page, the security agent component may return a false indication of success or allow the operation to enable monitoring of the actor associated with the operation. When an operation affects another memory location associated with that page, the security agent component may temporarily reset the privilege attribute for that page to allow the operation.

In one example, a memory location may store privileged information, and the specific operation protected against may involve writing to that memory location to modify the privileged information. Such an action is known as privilege escalation. To protect against privilege escalation, the privilege attribute of the page including the memory location storing the privileged information may be set to a read only value.

In another example, a memory location may store user credentials, and the specific operation protected against may involve reading the user credentials from the memory location. To protect against such credential reads, the privilege attribute of the page including the memory location storing the user credentials may be set to an inaccessible value. In some implementations, the physical memory location of the page may be modified by the security agent, resulting in the credential read to return data located in a different memory location. The returned user credentials would therefore be invalid as to purposefully mislead an attacker.

In a further example, a memory location may store executable code, and the specific operation protected against may involve executing the code stored at the memory location. To protect against this, the privilege attribute of the page including the memory location storing the executable code may be set to non-executable. The security agent component may then take a further action, such as returning a false indication of successful execution of the code, or redirecting to other code at another location to mislead the attacker.

In various implementations, the security agent component consults a whitelist or component, such as a virtual address space manager, to determine whether any memory locations identified by the security agent are whitelisted. The security agent component may then exclude memory pages that include the whitelisted memory locations from a set of memory pages and set intercepts of memory locations included in the remaining memory pages of the set of memory pages. In some implementations, rather than whitelisting in advance, the security agent component may consult a whitelist when intercepting a memory location to determine whether to allow an operation. Use of whitelisting memory locations may prevent the security agent and security agent component from blocking operations of permitted components known to be associated with those whitelisted memory locations.

In further implementations, the security agent may store memory addresses in debug registers of the processor of the computing device, and the security agent component may set intercepts for the debug registers. Setting the intercepts may include, for example, setting intercepts for instructions seeking to access the debug registers (e.g., reading the debug registers). In some implementations, one of the debug registers may store a memory address not permitted by the operating system of the computing device to be stored in the debug register. For instance, the operating system may prevent memory addresses associated with kernel-level components from being stored in the debug registers. In order to enable storing such a non-permitted memory address in a debug register, the security agent component may respond to a read operation from the operating system seeking to read that debug register with a false, operating-system-permitted value. In addition to setting intercepts for debug registers storing memory addresses, the security agent component may also set intercepts for the memory addresses themselves, e.g., by setting privilege attributes for memory pages that include the memory addresses.

In some implementations, the security agent component may set intercepts for control registers of the processor of the computing device. Setting the intercepts may include setting intercepts for instructions seeking to access the control registers (e.g., seeking to write to the control registers). In various implementations, one of the control registers may store an on setting for a security feature of the computing device. The security agent component may set intercepts on instructions seeking to write to that register to, for instance, turn off the security feature. In response to intercepting such an instruction, the security agent component may respond with a false indication of success, may block the operation, and/or may remember the operation for further analysis.

Overview

FIG. 1 a illustrates an overview of a security agent configured to initiate execution of a security agent component as a hypervisor of computing device, the security agent component setting intercepts on a subset of memory locations of the computing device. As illustrated, a computing device includes components implemented at the kernel-level 102 and at the user-level 104. Kernel-level 102 components include a host OS kernel 106 and a security agent 108. The security agent 108 further includes or is associated with a security agent component 110 implemented at a hypervisor-level 112 of the computing device. The security agent 108 may further include a configuration 114 and a data structure 116 for storing copies of processor state settings. Further, user-level 104 components may include a process 118. Additionally, the computing device may have a memory 120 having multiple memory locations 122 and a processor 124 having processor state settings 126. FIG. 1 a further shows, at 128, the security agent 108 storing processor state settings 126 in the data structure 116 and, at 130, initiating the security agent component 110 as a hypervisor based on the data structure 130. The security agent 108 then, at 132, determines memory locations 122 to be intercepted and the security agent component 110 sets, at 134, intercepts for the determined memory locations 122.

In various embodiments, a computing device may include the host OS kernel 106, security agent 108, security agent component 110, process 118, memory 120, and processor 124. Such a computing device may be a server or server farm, multiple, distributed server farms, a mainframe, a work station, a personal computer (PC), a laptop computer, a tablet computer, a personal digital assistant (PDA), a cellular phone, a media center, an embedded system, or any other sort of device or devices. When implemented on multiple computing devices, the host OS kernel 106, security agent 108, security agent component 110, process 118, memory 120, and processor 124 may be distributed among the multiple computing devices. An example of a computing device including the host OS kernel 106, security agent 108, security agent component 110, process 118, memory 120, and processor 124 is illustrated in FIG. 3 and described below with reference to that figure.

The computing device may implement multiple protection rings or privilege levels which provide different levels of access to system resources. For example, user-level 104 may be at an “outer” ring or level, with the least access (e.g., “ring 3”), kernel-level 102 may be at an “inner” ring or level, with greater access (e.g., “ring 0” or “ring 1”), and hypervisor-level 112 may be an “inner-most” ring or level (e.g., “ring −1” or “ring 0”), with greater access than kernel-level 102. Any component at the hypervisor-level 112 may be a hypervisor which sits “below” (and has greater access than) a host OS kernel 106.

The host OS kernel 106 may be a kernel of any sort of OS, such as a Windows® OS, a Unix OS, or any other sort of OS. Other OSes, referred to as “guest” OSes, may be implemented in virtual machines supported by the host OS. The host OS kernel 106 may provide access to hardware resources of the computing device, such as memory 120 and processor 124 for other processes of the computing device, such as process 118.

The security agent 108 may be a kernel-level security agent, which may monitor and record activity on the computing device, may analyze the activity, and may generate alerts and events and provide those alerts and events to a remote security service. The security agent 108 may be installed by and configurable by the remote security service, receiving, and applying while live, configurations of the security agent 108 and its component(s), such as security agent component 110. The configuration 114 may be an example of such a configuration. An example security agent 108 is described in greater detail in U.S. patent application Ser. No. 13/492,672, entitled “Kernel-Level Security Agent” and filed on Jun. 8, 2012, which issued as U.S. Pat. No. 9,043,903 on May 26, 2015.

The security agent component 110 may be a component of the security agent 108 that is executed at a hypervisor for the computing device at hypervisor-level 112. The security agent component 110 may perform hypervisor functions, such as adjusting privilege attributes (e.g., “read-write,” “read only,” “inaccessible,” etc.) of memory pages and managing system resources, such as memory 120. The security agent component 110 may perform at least some of its functions based on the configuration 114 of the security agent 108, which may include configuration settings for the security agent component 110. The security agent component 110 may also perform hypervisor functions to adjust the physical location of memory pages associated with memory 120.

The configuration 114 may comprise any of settings or system images for the security agent 108 and security agent component 110. As noted above, the configuration 114 may be received from a remote security service and may be applied by the security agent 108 and security agent component 110 without rebooting the computing device.

The data structure 116 may be a structure for storing processor state information. Such as data structure may be, for instance, a virtual machine control structure (VMCS). In some implementations, a subset of the settings in the data structure 116 may be set by the security agent 108 based on the OS. In such implementations, the security agent 108 may have different routines for different OSes, configuring the data structure 116 with different settings based on the OS. Such settings may typically be processor state settings which are invariant for a given OS. Other settings are then obtained from processor state settings 126. In other implementations, the security agent 108 may not have different routines for different OSes and may obtain all settings for the data structure 116 from the processor state settings 126.

In various implementations, the process 118 may be any sort of user-level 104 process of a computing device, such as an application or user-level 104 OS component. The process 118 may perform various operations, including issuing instructions for execution and making read, write, and execute requests of different memory locations. Such read, write, and execute requests may be addressed to virtual addresses, which may be mapped to physical addresses of memory pages by page tables of the OS kernel 106 or to further virtual addresses of extended or nested page tables, which are then mapped to physical addresses. Such processes 118 may include security exploits or be controlled by such exploits though vulnerabilities and may attempt malicious activity, such as privilege escalation or credential theft, through direct accesses of memory locations or indirect accesses utilizing, for example, vulnerabilities of the host OS kernel 106.

Memory 120 may be memory of any sort of memory device. As shown in FIG. 1, memory 120 may include multiple memory locations 122, the number of memory locations 122 varying based on the size of memory 120. The memory locations 122 may be addressed through addresses of memory pages and offsets, with each memory page including one or more memory locations. Privileges associated with memory locations 122, such as reading, writing, and executing may be set on a per-page granularity, with each memory page having a privilege attribute. Thus, memory locations 122 of a same page may have the same privileges associated with them. Examples of memory 120 are illustrated in FIG. 3 and described below in detail with reference to that figure.

The processor 124 may be any sort of processor, such as a central processing unit (CPU), a graphics processing unit (GPU), or both CPU and GPU, or other processing unit or component known in the art. The processor 124 may be associated with a data structure describing its state, the contents of which are referred to herein as the processor state settings 126. As described above, in some implementations, a subset of the processor state settings 126 may be invariant for a type of OS. Additionally, the processor 124 supports hardware-based virtualization (such as Intel™ VT-x) with second level address translation (SLAT).

In various implementations, the security agent 108 is configured to initiate execution of the security agent component 110 as a hypervisor. Such initiating may be performed without any rebooting of the computing device. As shown in FIG. 1, this initiating may involve, at 128, storing the processor state settings 126 in the data structure 116. If any of the processor state settings 126 are invariant, they may have already been included in the data structure 116 by the security agent 108 and thus do not need to be stored again. The initiating may then include, at 130, initiating the security agent component 110 based on the data structure 116. This may involve providing a reference to the security agent component 110 and the data structure 116 along with a “run” instruction.

Next, the security agent 108 determines, at 132, any memory locations 122 or instructions to be intercepted. The security agent 108 may utilize the configuration 114 provided by the security service to determine the memory locations 122 and instructions. Such memory locations 122 may include locations storing executable code or privilege information (e.g., indications of admin privileges) for a process or user credentials (e.g., passwords). As mentioned above, updates to the configuration 114 may be received and applied without rebooting. Upon receiving an update to the configuration 114, the security agent may repeat the determining at 132.

To free memory space, computing devices often clear memory mappings for memory pages which have not been recently accessed and write out their contents to disk, referred to as a page-out operation. When memory is accessed again, the contents are brought back from disk, referred to as a page-in operation. To ensure, then, that knowledge of memory locations 122 stays up-to-date, the security agent 108 may request that the OS kernel 106 lock page tables of mappings in page tables to memory pages which include the memory locations 122 that are to be intercepted. Alternatively, the security agent component 110 may intercept page out requests and prevent paging out of memory pages which include the memory locations 122 that are to be intercepted, or it may intercept page in requests in order to update its knowledge of memory locations 122 and repeat determining at 132.

In various implementations, the security agent component 110 then, at 134, sets intercepts for the instructions and memory locations 122 determined by the security agent 108. In some implementations, setting intercepts may involve determining the memory pages which include the determined memory locations 122 and setting privilege attributes for those pages. The privilege attribute chosen—e.g., “non-executable” or “read only” or “inaccessible”—may be a function of the memory accesses that the security agent 108 and security agent component 110 are configured to intercept. When a process 118 seeks to perform such a memory access—e.g., to execute code stored at a memory page marked “non-executable”—the security agent component 110 will receive notification.

In other implementations, setting intercepts may involve changing the physical memory location of the determined memory locations 122 to reference misleading, incorrect, or otherwise unusable data or code. When a process 118 seeks to perform such memory access—e.g., to read a memory page containing data at memory location 122, the data will instead by read from an alternate memory location.

In some implementations, upon termination of a process 118, the security agent component 110 may remove intercepts for memory locations 122 associated with the process 118. This may involve resetting privilege attributes for the memory pages including the memory locations 122 to their previous settings, or it may include resetting the physical memory location for the memory pages.

FIG. 1b illustrates an overview of a security agent and security agent component configured to determine whitelisted memory locations and to exclude memory pages that include those whitelisted memory locations from a set of memory pages including other, intercepted memory locations. As illustrated, the security agent component 110 may utilize whitelist component(s) and data 136, at 138, to determine whitelisted memory locations. The security agent component 110 then excludes memory pages having the whitelisted memory locations and, at 140, sets intercepts for the remaining memory locations that are not associated with the excluded memory pages. In other implementations, whitelisting may occur entirely or partly after the setting of intercepts, at the time of interception. In such implementations, the security agent component 110 may consult the whitelist for all or some part of the intercepted memory locations to determine whether the operation should be allowed. Whitelisting at the time of interception, rather than in advance (or in addition to advance whitelisting) allows the security service associated with the security agent component 110 to apply a more up-to-date whitelist.

In various implementations, the whitelist component(s) and data 136 may include a data structure, such as a list, received from a remote security service (e.g., as part of the security agent 108 configuration), an executable component, or both. For example, the whitelist component(s) and data 136 may comprise an executable component, such as a virtual address space manager, which categorizes address spaces of memory 120 into different regions, such as page tables, hyperspace, session-space, loader mappings, system-cache, PFN database, non-paged pool, paged pool, system PTEs, HAL heap, etc. These regions may be received in a specification from a remote security service or may be identified by the virtual address space manager based on their size and alignment specifications. Look-up tables, shadow page tables, or both, may be used to lookup the regions and identify which region a memory location 122 corresponds to, if any. Also, one of these regions, or a portion of a region, may be associated with a parameter whitelisting that region or portion of a region. In one implementation, the security agent component 110 may build or extend the whitelist component(s) and data 136 or memory regions based on memory access pattern(s) of known safe component(s).

In some implementations, one or more components of the computing device may be identified as known safe components. Such known safe components may, for instance, behave in a manner similar to a malicious process or thread, making it difficult to distinguish between the known safe component and malicious process strictly by behavior. If the known safe component is identified in advance, e.g., by the configuration 114 of the security agent 108, along with memory locations or memory regions associated with that known safe component, those memory locations or memory regions may be whitelisted, either by a component such as a virtual address space manager or in a list received from a remote security service.

As described above with respect to FIG. 1a, the security agent 108 may initiate the security agent component 110 as hypervisor and, at 132, identify memory locations 122 to be intercepted. In various implementations, once the memory locations 122 have been identified, the security agent component 110 may determine a set of memory pages that include the identified memory locations 122 and determine, at 138, any whitelisted memory locations. The determining of a set of memory pages is described above. To determine, at 138, the whitelisted memory locations, the security agent component 110 consults the whitelist component(s) and data 136. The security agent component 110 may, in some implementations, determine the set of memory pages for the identified memory locations 122 first and then determine whether any of those memory pages are associated with a whitelisted memory location or whitelisted memory region. Those whitelisted memory pages are then excluded by the security agent 110 from the set of memory pages. Alternatively, the security agent component 110 may compare the identified memory locations 122 to the whitelisted memory locations or whitelisted memory regions and then determine memory pages for any of the identified memory locations 122 that are not whitelisted. This set of memory pages with whitelisted memory locations not included is referred to herein as the set of remaining memory pages.

At 140, the security agent component 110 sets intercepts for the set of remaining memory pages. As described above, this may include setting privilege attributes for the memory pages included in the set of remaining memory pages.

Alternatively, or additionally, the security agent component 110 may, at the time of interception, determine whether a memory location is whitelisted. This comparison may be performed in addition to the whitelist comparison and exclusion described above, or in place of it, with all memory pages effectively included in the set of remaining memory pages.

FIG. 1c illustrates an overview of a security agent and security agent component configured to intercept debug registers and provide an operating-system-permitted result responsive to access by the operating system of the debug registers. As illustrated, at 142, the security agent component 110 may set intercepts for debug registers 144 and, at 146, note an access operation, such as a read operation, from the operating system (e.g., from the host OS kernel 106). At 148, the security agent component 110 then responds to the operating system's access operation with an operating-system-permitted value.

Debug register(s) 144 may be registers used by processor 124 for program debugging, among other possible uses. Processor 124 may be an x86 series processor and include, for example, six debug registers, two of which may be used for control and status. Each debug register 144 may store a memory address and may be associated with a condition that triggers a notification—e.g., reading to the memory address, writing from the memory address, executing code stored at the memory address.

In some implementations, the operating system of the computing device may prohibit the storing of memory addresses associated with kernel-mode code or data from being stored in a debug register 144. The operating system may query the debug register(s) 144 on some basis (e.g., periodic) to determine whether the debug register(s) 144 store non-permitted memory addresses.

In various implementations, the security agent 108 may store memory addresses in some or all of the available debug register(s) 144. The memory addresses stored in the debug register(s) 144 may be specified by the configuration 114 of the security agent 108.

In further implementations, at 142, the security agent component 110 (initiated by the security agent 108, as described above) then sets intercepts for the debug register(s) 144. Setting intercepts for the debug register(s) 144 may include setting intercepts for instructions for accessing the debug register(s) 144.

At 146, the security agent component 110 then notes an access operation, such as a read operation, from the operating system seeking to determine whether a debug register 144 stores an operating-system-permitted value. At 148, the security agent component 110 then responds to the operating system with an operating-system-permitted value. If the debug register 144 being read is storing a memory address not permitted by the operating system, the security agent component 110 may respond with a false, operating-system-permitted value.

In some implementations, when a process 118 attempts some access with respect to a memory address stored in a debug register 144 (e.g., reading, writing, executing, etc.), the security agent 108 is informed of the access and may respond in a manner specified by its configuration 114 (e.g., take some security action such as monitoring or killing the process 118, respond with a false indication of success, etc.).

In various implementations, the security agent 108 may also identify one or more of the memory addresses stored by the debug register(s) 144 as memory locations to be intercepted. The security agent component 110 then sets intercepts for those memory addresses by, e.g., determining the memory pages that include the memory addresses and setting privilege attributes for those memory pages. In this way, two methods may be used by the security agent 108 and security agent component 110 to detect operations associated with a memory address.

In further implementations, in addition to use of debug registers and page privilege attributes for certain memory addresses, the security agent 108 may identify other memory locations, and the security agent component 110 may set intercepts (e.g., page privilege attributes) for those other memory locations, as described above with respect to FIG. 1a.

FIG. 1d illustrates an overview of a security agent and security agent component configured to intercept control register(s) and respond to a write operation directed at one of the control registers with a false indication of success. As illustrated, at 150, the security agent component 110 sets intercepts on instructions for accessing control register(s) 152. The security agent component 110 then notes an access operation, at 154, and responds, at 156, with a false indication of success and/or with a security action.

Control registers 152 may be registers of the processor 124 which change or control the behavior of the processor 124 or another device. x86 series processors may include control registers such as CR0, CR2, CR3, and CR4, and x86-64 series processors may also include EFER and CR8 control registers. Such control registers may each have a specific or general purpose, and control registers 152 may include any, all, or none of these x86 series processor control registers.

In some implementations, at least one of the control registers 152 may include an on setting for a security feature of the computing device. For example, control registers 152 may include a CR4 register that stores an on setting for a security feature called Supervisor Mode Execution Prevention (SMEP). SMEP may prevent the processor 124 from executing code in a user mode memory range while the privilege of the processor 124 is still in kernel mode, essentially preventing kernel mode privilege escalation. If process 118 is a malicious process or thread operating in kernel mode, however, it is able to turn off SMEP, as any kernel mode process or thread can set the on setting in CR4 to an off value.

In further implementations, the security agent 108 may determine which of the control register(s) 152 to protect. For example, the configuration 114 of the security agent 108 may specify that the CR4 register of control register(s) 152 should be protected. At 150, then, the security agent component 110 (initiated by the security agent 108, as described above) may set intercepts for the control register(s) 152 that are to be protected. Setting intercepts for those control register(s) 152 may include, at 150, setting intercepts for instructions seeking to access those control register(s) 152.

In some implementations, at 154, the security agent component 110 then notes an instruction seeking to access one of the control register(s) 152, such as a write operation seeking to write an off value to a CR4 register to turn off a security feature. The security agent component 110 then responds, at 156, with a false indication of success or by initiating a security action (e.g., killing the process 118 that requested the write operation or monitoring that process 118).

FIGS. 2a-2b illustrate overviews of techniques for protecting memory locations through privilege attributes of pages while enabling operations on other memory locations associated with those pages. FIG. 2a includes a memory page 202 having at least memory location 204(a), memory location 204(b), memory location 204(c), and memory location 204(d), as well as privilege attribute 206. Further, a process 208, as shown, may make requests associated with the memory locations 204. Also, as shown in FIG. 2a, that privilege attribute 206 may be temporarily reset to privilege attribute 210. A process 208 may, at 212, request an operation not permitted by privilege attribute 206. Because the operation may be directed to memory location 204(a), which is not one of the memory locations determined by the security agent 108, the security agent component 110 may, at 214, temporarily reset the privilege attribute 206 to privilege attribute 210 to allow the operation to proceed.

In various implementations, memory page 202 may be an example of the memory pages discussed above with reference to memory 120, memory locations 204 may be examples of memory locations 122, and privilege attributes 206 and 210 may be examples of the privilege attributes discussed above with reference to memory 120. Further, process 208 may be an example of process 118.

Process 208 may request, at 212, an operation such as a read from or write to a memory location 204, or an execute operation to execute code stored at memory location 204. Upon noting the request, the security agent component 110 may determine the memory page 202 associated with the request as well as the specific memory location 204 on that memory page 202. The security agent component 110 then determines if the memory location is one of the memory locations identified by the security agent 108. In FIG. 2a, the memory location 204 identified by the security agent 108 is memory location 204(b), and the operation is a request associated with memory location 204(a). In such an example, if the operation does not conflict with the privilege attribute 206, the operation is allowed to proceed. If, on the other hand, the operation is not permitted by the privilege attribute, then the security agent component 110 may, at 212, temporarily reset the privilege attribute 206 to privilege attribute 210 to allow the operation to proceed. For example, if privilege attribute 206 is “inaccessible” (e.g., to prevent reads of user credentials stored at memory location 204(b)), the security agent component 110 may temporarily reset the privilege attribute 206 to be privilege attribute 210, which may be “read only.” Or in another example, if the privilege attribute 206 is “non-executable” (e.g., to prevent execution of code stored at memory location 204(b)), the security agent component 110 may temporarily reset the privilege attribute 206 to be privilege attribute 210, which may be “executable.” After the operation has been processed, the security agent component 110 may return the privilege attribute 210 to be privilege attribute 206.

FIG. 2b includes a memory page 202 having at least memory location 204(a), memory location 204(b), memory location 204(c), and memory location 204(d), as well as privilege attribute 206. A process 208, as shown, may make requests associated with the memory locations 204, and privilege attribute 206 may be temporarily reset to privilege attribute 210. As is further illustrated, copies of information stored in memory page 202 may be stored in a copy memory page 216. The copy memory page 216 may include copy memory location 218(a), which includes a copy of the information stored at memory location 204(a); copy memory location 218(c), which includes a copy of the information stored at memory location 204(c); and copy memory location 218(d), which includes a copy of the information stored at memory location 204(d). Rather than storing a copy of the information from memory location 204(b), the copy memory page 216 may include phony/false or deceptive data or code 220. The copy memory page 216 may also include a privilege attribute 222, which may represent elevated privileges when compared to privilege attribute 206.

As illustrated, the process 208 may, at 224, request an operation affecting memory location 204(b). Because 204(b) is one of the memory locations identified by the security agent 108, the security agent component 110 may respond in one of a number of ways. At 226, the security agent component 110 may temporarily reset the privilege attribute 206 to be privilege attribute 210 in order to allow the operation to proceed. The security agent component 110 may then also identify the process, thread, or component that made the request for the operation at 224 and may monitor further activity of that process, thread, or component or terminate that process, thread, or component. Alternatively, the security agent component 110 may, at 228 generate copy memory page 216, including the phony/false or deceptive data or code 220, and may, at 230, allow the process 208 to access the phony/false or deceptive data or code 220.

Process 208 may request, at 224, an operation such as a read from or write to a memory location 204 or an execute operation to execute code stored at a memory location 204. Upon noting the request, the security agent component 110 may determine the memory page 202 associated with the request as well as the specific memory location 204 on that memory page 202. The security agent component 110 then determines whether the memory location is one of the memory locations identified by the security agent 108. In FIG. 2b, the memory location 204 identified by the security agent 108 is memory location 204(b), and the operation is a request associated with memory location 204(b). Accordingly, the security agent component 110 determines that the memory location 204(b) is one of the memory locations identified by the security agent 108. In response, the security agent component 110 may take no action, which may result in the computing device crashing and rebooting. Alternatively, the security agent component may take action to allow the operation and monitor further operation, allow the operation to occur on phony/false or deceptive data or code 220, or to provide a false indication of success to the process 208.

In a first example, the operation request at 224 may be a write operation to modify privilege information stored at memory location 204(b). In response to the request for the write operation, the security agent component 110 may allow the operation to proceed by temporarily resetting, at 226, the privilege attribute 206 to be privilege attribute 210. The security agent component 110 may also identify the process, thread, or component that made the request for the write operation (i.e., process 208) and may monitor further activity of that process, thread, or component. Alternatively, the security agent component 110 may copy, at 228, the contents of memory page 202 to copy memory page 216, set the privilege attribute 222 to read-write, and temporarily redirect from memory page 202 to copy memory page 216. The security agent component 110 may then allow the write operation to proceed, and the process 208 may modify the copy memory page 216 and receive an indication of success. The security agent component 110 may then return mapping to point to memory page 202. Thus, the memory location 204(b) is protected, the process 208 is tricked into thinking it succeeded, and both objectives are achieved without the computing device crashing.

In a second example, the operation request at 224 may be a read operation to obtain user credentials stored at memory location 204(b). In response to the request for the read operation, the security agent component 110 may allow the operation to proceed by temporarily resetting, at 226, the privilege attribute 206 to be privilege attribute 210. The security agent component 110 may also identify the process, thread, or component that made the request for the read operation (i.e., process 208) and may monitor further activity of that process, thread, or component. Alternatively, the security agent component 110 may copy, at 228, the contents of memory page 202 to copy memory page 216, set the privilege attribute 222 to read only, and temporarily redirect from memory page 202 to copy memory page 216. In addition to copying the contents of memory page 202, the security agent component 110 may store phony/false or deceptive data 220 at the same offset in copy memory page 216 as the memory location 204(b) is in memory page 202. The security agent component 110 then allows the read operation to proceed, and the process 208 read the phony/false or deceptive data 220. After the read operation, the security agent component 110 may then return mapping to point to memory page 202. If the process 208 obtained deceptive data 220, such as a username and password for a monitored account, then future use of that username and password may trigger monitoring by the security agent 108 and/or the security agent component 110.

In a third example, the operation request at 224 may be an execute operation to execute code stored at memory location 204(b). In response to the request for the execute operation, the security agent component 110 may allow the operation to proceed by temporarily resetting, at 226, the privilege attribute 206 to be privilege attribute 210. The security agent component 110 may also identify the process, thread, or component that made the request for the execute operation (i.e., process 208) and may monitor further activity of that process, thread, or component.

Alternatively, the security agent component 110 may copy, at 228, the contents of memory page 202 to copy memory page 216, set the privilege attribute 222 to execute, and temporarily redirect from memory page 202 to copy memory page 216. The security agent component 110 may then allow the execute operation to proceed, and the process 208 may execute false code stored at copy memory page 216 and receive an indication of success. The security agent component 110 may then return mapping to point to memory page 202. Thus, the memory location 204(b) is protected, the process 208 is tricked into thinking it succeeded, and both objectives are achieved without the computing device crashing.

In a further alternative, rather than allowing and monitoring or redirecting, the security agent component 110 may prohibit the execute action and/or kill the process that requested the execute operation (or a process deemed by the security service to be responsible for that execute operation).

Example System

FIG. 3 illustrates a component level view of a computing device configured with a security agent and security agent component configured to execute as a hypervisor. As illustrated, computing device 300 comprises a memory 302 storing a security agent 304, a security agent component 306, page tables 308, user credentials 310, privilege information 312, an OS 314, processes and data 316, and whitelist component(s) and data 318. Also, computing device 300 includes processor(s) 320 with register(s) 322, a removable storage 324 and non-removable storage 326, input device(s) 328, output device(s) 330 and communication connections 332 for communicating with other computing devices 334.

In various embodiments, memory 302 is volatile (such as RAM), non-volatile (such as ROM, flash memory, etc.) or some combination of the two. Memory 302 may be an example of memory 120, which is described above in detail with respect to FIG. 1. The security agent 304 may be an example of security agent 108, which is described above in detail with respect to FIG. 1. The security agent component 306 may be an example of security agent component 110, which is described above in detail with respect to FIG. 1. Page tables 308 may be any sort of page tables, such as page tables mapping virtual addresses to physical addresses of memory pages. Uses of such page tables 308 are described above in detail with respect to FIG. 1 and FIGS. 2a-2b. User credentials 310 may be any sort of user credentials, such as user names and passwords for one or more processes or components. Privilege information 312 may be indications of privileges, such as admin privileges for processes, threads, user accounts, etc. The OS 314 may be any sort of OS, such as the host OS kernel 106 described above in detail with respect to FIG. 1. The processes and data 316 may be any sort of processes and data, such as process 118, which is described above in detail with respect to FIG. 1, or process 208, which is described above in detail with respect to FIGS. 2a-2b. The whitelist component(s) and data 318 may be any sort of components and data, such as whitelist component(s) and data 136, which is described above in detail with respect to FIG. 1b.

In some embodiments, the processor(s) 320 is a central processing unit (CPU), a graphics processing unit (GPU), or both CPU and GPU, or other processing unit or component known in the art. Processor 320 supports hardware-based virtualization (such as Intel™ VT-x) with second level address translation (SLAT). Processor(s) 320 may be an example of processor 124, which is described above in detail with respect to FIGS. 1a-1d. Also, processor 320 may include one or more processor register(s) 322. Processor register(s) 322 may be example(s) of either or both of the debug registers 144, which are described above in detail with respect to FIG. 1c, or the control registers 152, which are described above in detail with respect to FIG. 1d.

Computing device 300 also includes additional data storage devices (removable and/or non-removable) such as, for example, magnetic disks, optical disks, or tape. Such additional storage is illustrated in FIG. 3 by removable storage 324 and non-removable storage 326. Non-transitory computer-readable media may include volatile and nonvolatile, removable and non-removable tangible, physical media implemented in technology for storage of information, such as computer readable instructions, data structures, program modules, or other data. System memory 302, removable storage 324 and non-removable storage 326 are all examples of non-transitory computer-readable media. Non-transitory computer-readable media include, but are not limited to, RAM, ROM, EEPROM, flash memory or other memory technology, CD-ROM, digital versatile disks (DVD) or other optical storage, magnetic cassettes, magnetic tape, magnetic disk storage or other magnetic storage devices, or any other tangible, physical medium which can be used to store the desired information and which can be accessed by the computing device 300. Any such non-transitory computer-readable media may be part of the computing device 300.

Computing device 300 also has input device(s) 328, such as a keyboard, a mouse, a touch-sensitive display, voice input device, etc., and output device(s) 330 such as a display, speakers, a printer, etc. These devices are well known in the art and need not be discussed at length here.

Computing device 300 also contains communication connections 332 that allow the computing device 300 to communicate with other computing devices 334, such as device(s) of a remote security service.

Example Processes

FIGS. 4-5 illustrate example processes 400 and 500. These processes are illustrated as logical flow graphs, each operation of which represents a sequence of operations that can be implemented in hardware, software, or a combination thereof. In the context of software, the operations represent computer-executable instructions stored on one or more computer-readable storage media that, when executed by one or more processors, perform the recited operations. Generally, computer-executable instructions include routines, programs, objects, components, data structures, and the like that perform particular functions or implement particular abstract data types. The order in which the operations are described is not intended to be construed as a limitation, and any number of the described operations can be combined in any order and/or in parallel to implement the processes.

FIG. 4 illustrates an example process for initiating execution of a security agent component as a hypervisor for a computing device, determining memory locations of the computing device to be intercepted, and setting intercepts for the determined memory locations. The process 400 includes, at 402, a security agent on a computing device initiating a security agent component as a hypervisor for the computing device. The initiating may include, at 404, storing processor state settings in a data structure and, at 406, instructing a processor of the computing device to initiate the security agent component as the hypervisor based on the data structure. In some implementations, the security agent may include different routines for different operating systems, each of the different routines fixing as invariant a part of the data structure associated with the respective different operating system.

At 408, the security agent may then determine a subset of memory locations in the memory to be intercepted. At 410, the security agent may determine the subset based on a security agent configuration received from a security service.

At 412, the security agent may request that an operating system kernel of the computing device lock page table mappings of the memory locations of the subset of memory location.

At 414, the security agent may determine instructions to be intercepted and, at 416, the security agent component mat set intercepts for the determined instructions. The operations at 414 and 416 may also be performed before the operations show at 408-412 or concurrently with those operations.

At 418, the security agent component may set intercepts for memory locations of the determined subset of memory locations. At 420, setting the intercepts may include setting privilege attributes for pages which include the memory locations of the determined subset of memory locations, or it may include changing the physical memory location of such pages.

At 422, the security agent may receive an updated security agent configuration and, without rebooting, repeat the determining of the subset of memory locations at 408 and cause the security agent component to repeat the setting of the intercepts at 418.

At 424, the security agent component may remove intercepts corresponding to a process upon termination of the process.

FIG. 5 illustrates an example process for protecting memory locations through privilege attributes of pages while enabling operations on other memory locations associated with those pages. The process 500 includes, at 502, identifying memory locations of a subset of memory locations in memory of the computing device to be intercepted. In some implementations, the identified memory locations include a memory location associated with privileges for a process. In further implementations, the identified memory locations include a memory location associated with user credentials.

At 504, pages of the memory which include the identified memory locations may then be determined.

At 506, privilege attributes of the pages may then be set to prevent specific types of operations from affecting the memory locations. When the identified memory locations include a memory location associated with privileges for a process, the specific types of operations may include write operations and the setting includes setting the privilege attribute for the page including the memory location to a read only value to prevent writes to the memory location. When the identified memory locations include a memory location associated with user credentials, the specific types of operations may include read operations and setting includes setting the privilege attribute for the page including the memory location to an inaccessible value to prevent reads of the memory location.

At 508, an operation affecting another memory location associated with one of the pages which differs from the identified memory location associated with that page may be noted.

At 510, the privilege attribute of the one of the pages may then be temporarily reset to allow the operation.

Before, during, or after the operations shown at 508-510, an operation affecting the identified memory location may, at 512, be noted.

At 514, a process, thread, or module that requested the operation may then be identified.

At 516, responsive to noting the operation at 512, the privilege attribute of the page including the one of the identified memory locations may be temporarily reset to allow the operation. At 518, after temporarily resetting the privilege attribute, activities of the process, thread, or module may be monitored.

At 520, responsive to noting the operation at 512, a false indication of success for the operation may be returned. At 522, returning the false indication of success includes allowing the write operation to an alternate memory location and returning an indication that the write operation was successful. At 524, the read operation may be redirected to be performed on an alternate memory location storing false or deceptive user credentials. At 526, use of the deceptive credentials may then be monitored. In some implementations, redirecting to an alternate memory location may involve copying contents of the page including the identified memory location to a page which includes the alternate memory location storing the false or deceptive user credentials.

FIG. 6 illustrates an example process for determining memory locations to be intercepted and setting privilege attributes for memory pages including those memory locations, including setting a memory page to non-executable. The process 600 includes, at 602, a security agent on a computing device initiating a security agent component as a hypervisor for the computing device. The initiating may include, at 604, storing processor state settings in a data structure and, at 606, instructing a processor of the computing device to initiate the security agent component as the hypervisor based on the data structure.

At 608, the security agent may then identify memory locations in the memory to be intercepted. At 610, the security agent may identify those memory locations based on a security agent configuration received from a security service.

At 612, the security agent component then determines pages of memory that include the identified memory locations and sets privilege attributes for those pages to prevent specific types of access to the memory locations. For example, at 614, the security agent component may set at least one of the pages to non-executable to prevent execution of code stored at an identified memory location included in that page.

At 616, the security agent component may note an operation affecting another memory location associated with one of the pages which differs from an identified memory location associated with that page. For instance, the operation may involve execution of code stored at the other memory location. At 618, the security agent component may then temporarily reset the privilege attribute of the page to allow the execution of the code stored at the other memory location.

Alternatively, or additionally, at 620, the security agent component may return a false indication of success to a process seeking to execute the code stored at an identified memory location.

Alternatively, or additionally, at 622, the security agent component may cause an execute operation intended for the code stored at an identified memory location to be performed on other code stored at an alternate memory location.

Alternatively, or additionally, at 624, the security agent component may prohibit the execute operation and/or kill the process the executed or is deemed responsible for the execute operation.

FIG. 7 illustrates an example process for determining that a memory location is whitelisted and excluding memory page(s) that include the whitelisted memory location from a set of pages to be intercepted. The process 700 includes, at 702, a security agent on a computing device initiating a security agent component as a hypervisor for the computing device and identifying memory locations in memory of the computing device to be intercepted.

At 704, the security agent component determines a set of pages of the memory, each of the pages include at least one of the identified memory locations.

At 706, the security agent component then determines that one of the memory locations is a whitelisted memory location. At 708, the determining may include consulting a component or list identifying different memory regions of the memory and indicating which memory regions are whitelisted. At 710, the determining may additionally or alternatively include receiving the list of different memory regions that are whitelisted from a security service. At 712, the determining may additionally or alternatively include building a list of whitelisted memory locations based on memory accesses of a known safe component.

At 714, the security agent component then excludes one or more pages that include a whitelisted memory location from the set of pages.

At 716, the security agent component then sets privilege attributes for remaining pages of the set of pages to prevent specific types of operations from affecting memory locations included in those pages.

At 718, the security agent component notes an operation effecting a memory location included in a remaining page of the set of pages, determines whether the memory location is a whitelisted memory location, and, in response to determining that the memory location is a whitelisted memory location, permits the operation.

FIG. 8 illustrates an example process for intercepting accesses of debug registers and, when such accesses are from the operating system, responding with operating-system-permitted values. The process 800 includes, at 802, a security agent on a computing device storing memory addresses in debug registers. At 804, such memory addresses may include memory addresses not permitted in a debug register by the operating system of the computing device. Such a memory address not permitted by the operating system to be stored in the debug registers may, for example, be associated with a kernel-mode component. Further, the security agent may initiate a security agent component as a hypervisor for the computing device.

At 806, the security agent component sets intercepts for the debug registers. At 808, setting the intercepts may include setting intercepts for instructions seeking to read the debug registers.

At 810, the security agent component notes a read operation from the operating system attempting to read one of the debug registers. At 812, in response to noting the read operation, the security agent component returns an operating-system-permitted value for the one of the debug registers to the operating system.

At 814, the security agent component may note a read operation from malware attempting to read one of the memory addresses stored in a corresponding one of the debug registers and, at 816, in response, return a false value to the malware or perform a security action.

At 818, the security agent component may further set intercepts for the memory addresses stored in the debug registers. At 820, the setting may include setting privilege attributes for memory pages which include the memory addresses.

At 822, the security agent may further identify other memory locations to be intercepted, and the security agent component may set privilege attributes for memory pages that include the other memory locations.

FIG. 9 illustrates an example process for intercepting instructions for accessing control registers. The process 900 includes, at 902, a security agent on a computing device initiating a security agent component as a hypervisor for the computing device.

At 904, the security agent then determines control registers of the computing device to be protected. Such control registers may include, at 906, a control register storing an on setting for a security feature of the computing device.

At 906, the security agent component then sets intercepts for instructions for performing write operations on the control registers.

At 908, the security agent component further notes a write operation seeking to write an off value to the control register storing the on setting for the security feature. At 910, the security agent component responds to the write operation with a false indication that the security feature has been set to the off value, kills the process or thread requesting the write operation, and/or remembers the fact that the process or thread requested the write operation, which can be used for further analysis.

CONCLUSION

Although the subject matter has been described in language specific to structural features and/or methodological acts, it is to be understood that the subject matter defined in the appended claims is not necessarily limited to the specific features or acts described. Rather, the specific features and acts are disclosed as exemplary forms of implementing the claims.

Claims

1. A computer-implemented method comprising: storing memory addresses of control registers of an operating system of the computing device in debug registers or model specific registers (MSRs) of the computing device, the memory addresses including a memory address not permitted by the operating system to be stored in the debug registers or MSRs;determining control registers to be protected;setting intercepts for the memory addresses stored in the debug registers or MSRs;monitoring a read operation from malware attempting to read one of the memory addresses stored in a corresponding one of the debug registers or MSRs;

2. The computer-implemented method of claim 1, further comprising setting privilege attributes for memory pages which include the memory addresses.

3. The computer-implemented method of claim 2, further comprising identifying other memory locations to be intercepted and setting privilege attributes for memory pages that include the other memory locations.

4. The computer-implemented method of claim 1, wherein setting the intercepts for the memory addresses stored in the debug registers or MSRs comprises setting intercepts for instructions seeking to read the debug registers or MSRs.

5. The computer-implemented method of claim 1, wherein the memory address not permitted by the operating system to be stored in the debug registers or MSRs is associated with a kernel-mode component.

6. The computer-implemented method of claim 1, wherein in response to monitoring the write operation attempting to write the off value to the one of the control registers further comprises at least one of: killing the write operation, or remembering that the process sought to write the off value.

7. The computer-implemented method of claim 6, wherein the one of the control registers includes an on setting for a security feature of the operating system.

8. The computer-implemented method of claim 1, wherein the computer-implemented method is performed by a security agent on the computing device.

9. The computer-implemented method of claim 8, wherein the security agent initiates a security agent component as a hypervisor for the computing device.

10. The computer-implemented method of claim 1, further comprising: monitoring a read operation from the operating system attempting to read one of the debug registers or MSRs; andin response to monitoring the read operation from the operating system, returning an operating-system-permitted value corresponding to a memory address permitted by the operating system for the one of the debug registers or MSRs to the operating system.

11. A non-transitory computer-readable medium having stored thereon executable instructions which, when executed by a computing device, cause the computing device to perform operations comprising: storing memory addresses of control registers of an operating system of the computing device in debug registers or model specific registers (MSRs) of the computing device, the memory addresses including a memory address not permitted by the operating system to be stored in the debug registers or MSRs;determining control registers to be protected;setting intercepts for the memory addresses stored in the debug registers or MSRs;monitoring a read operation from malware attempting to read one of the memory addresses stored in a corresponding one of the debug registers or MSRs;

12. The non-transitory computer-readable medium of claim 11, wherein the operations further comprise setting privilege attributes for memory pages which include the memory addresses.

13. The non-transitory computer-readable medium of claim 12, wherein the operations further comprise identifying other memory locations to be intercepted and setting privilege attributes for memory pages that include the other memory locations.

14. The non-transitory computer-readable medium of claim 11, wherein setting the intercepts for the debug registers or MSRs comprises setting intercepts for instructions seeking to read the debug registers or MSRs.

15. The non-transitory computer-readable medium of claim 11, wherein the memory address not permitted by the operating system to be stored in the debug registers or MSRs is associated with a kernel-mode component.

16. The non-transitory computer-readable medium of claim 11, wherein the operations further comprise: monitoring a read operation from the operating system attempting to read one of the debug registers or MSRs; and in response to monitoring the read operation from the operating system, returning an operating-system-permitted value corresponding to a memory address permitted by the operating system for the one of the debug registers or MSRs to the operating system.

17. A computing device comprising: a processor; andmemory coupled to the processor, the memory storing thereon executable instructions which, when executed by processor, cause the processor to perform operations, the operations comprising: storing memory addresses of control registers of an operating system of the computing device in debug registers or model specific registers (MSRs) of the computing device, the memory addresses including a memory address not permitted by the operating system to be stored in the debug registers or MSRs;determining control registers to be protected;setting intercepts for the memory addresses stored in the debug registers or MSRs;monitoring a read operation from malware attempting to read one of the memory addresses stored in a corresponding one of the debug registers or MSRs;in response to monitoring the read operation from the malware attempting to read the one of the memory addresses: returning deceptive data to the malware that provides a false indication of success to the malware, andperforming a security action including killing the read operation from the malware;monitoring a write operation attempting to write an off value to one of the control registers to be protected, the off value turning off a security feature that prevents a processor of the operating system from performing write operations on the control registers;in response to monitoring the write operation attempting to write the off value to the one of the control registers to be protected: allowing the write operation to write the off value to an alternate memory location different from the memory addresses of the control registers, andreturning a false indication that the security feature has been set to the off value.

18. The computing device of claim 17, wherein the operations are performed by a security agent on the computing device, and the security agent initiates a security agent component as a hypervisor for the computing device.