Hysteresis Comparator with Programmable Hysteresis Width

Information

  • Patent Application
  • 20080048746
  • Publication Number
    20080048746
  • Date Filed
    August 25, 2006
    18 years ago
  • Date Published
    February 28, 2008
    16 years ago
Abstract
A digitally programmable hysteresis comparator a includes digitally programmable variable resistor. One or more control bits are operable to modify the resistance of the variable resistor, and such modification is operable to modify the hysteresis width of the comparator.
Description

BRIEF DESCRIPTION OF THE DRAWINGS

A more complete understanding of exemplary embodiments and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features, and wherein:



FIG. 1 illustrates an ideal voltage comparator, as is known in the art;



FIG. 2 illustrates a voltage transfer curve (VTC) for the ideal voltage comparator depicted in FIG. 1;



FIG. 3 illustrates a hysteresis comparator circuit, as is known in the art;



FIG. 4 illustrates a VTC for the hysteresis comparator circuit depicted in FIG. 3;



FIG. 5
a illustrates sample waveforms for the input voltage and output voltage versus time for the ideal voltage comparator depicted in FIG. 1;



FIG. 5
b illustrates sample waveforms for the input voltage and output voltage versus time for the hysteresis comparator circuit depicted in FIG. 3;



FIG. 6 illustrates an embodiment of a digitally programmable hysteresis comparator circuit, in accordance with teachings of the present disclosure;



FIG. 7 illustrates an embodiment of a digitally programmable variable resistor used in implementing a digitally programmable hysteresis comparator circuit, in accordance with teachings of the present disclosure; and



FIG. 8 illustrates a truth table setting forth the values of resistance for the digitally programmable variable resistor depicted in FIG. 7 based on different input values, in accordance with teachings of the present disclosure.





DETAILED DESCRIPTION

Preferred embodiments and their advantages are best understood by reference to FIGS. 6 through 8, wherein like numbers are used to indicate like and corresponding parts.


For the purposes or this disclosure, comparators (or “voltage comparators”) may include any circuit component or device capable of comparing at least one signal or value received at an input, such as a voltage, against one or more other signal or value received at one or more other inputs, such as a voltage, and output one or more discrete signals or values, such as a voltage, based on the relative strengths, intensities, amplitudes or values of the input signals. Comparators may be used in various phases of signal generation and transmission, as well as in automatic control and measurement to implement any number of applications within microprocessors, microcontrollers, integrated circuits and other electronic components and circuits. Comparators are used alone or as part of larger systems, such as analog-to-digital converters, switching regulators, function generators, voltage-to-frequency converters, power-supply supervisors, level detectors, window detectors, pulse-width modulators, Schmitt triggers, and a variety of others.



FIG. 6 illustrates a digitally programmable hysteresis comparator circuit 22. Although a specific circuit topology is illustrated in FIG. 6, it is understood that comparator circuit 22 may include any number of suitable circuit designs, layouts, or topologies for implementing a hysteresis comparator circuit. In the illustrated embodiment, comparator circuit 22 may include ideal voltage comparator 10, with ideal inputs 6 and 8 and output 4, similar to the ideal voltage comparator depicted in FIG. 1. In addition, comparator circuit 22 may include voltage source 12, which supplies a voltage vI, and voltage source 13, which supplies a voltage VREF. Although depicted as independent voltage sources, voltage sources 12 and 13 may be any voltage signals suitable for being input to a comparator circuit. Either or both of voltage sources 12 and 13 may be an electrical signal transduced by a temperature sensor, pressure sensor, strain sensor, position sensor, fluidic level sensor, light or sound intensity sensor, or other suitable sensor. In some embodiments, either or both of voltage sources 12 and 13 may correspond to a control signal, such as desired temperature for a thermostat, or some other critical or threshold measure in a level-detection circuit. In some embodiments, voltage sources 12 and 13 may be analog signals that are to be converted to a digital signal by one or more comparator circuits analogous to comparator circuit 22.


Comparator circuit 22 may also include one or more biasing elements used to establish the hysteresis width of comparator circuit 22, such as resistor 18 with fixed resistance RB and digitally programmable variable resistor 30 with variable resistance RVAR. Although FIG. 6 depicts that resistor 30 has a variable resistance and resistor 18 has a fixed resistance, it is understood that other topologies may be employed. For example, in some embodiments, comparator circuit 22 may be modified such that the locations of resistor 18 and resistor 30 are swapped. In other embodiments, both of resistor 18 and resistor 30 may be digitally programmable variable resistors. In addition, although comparator circuit 22 is depicted as comprising resistor 18 and digitally programmable variable resistor 30 as its only biasing elements, it is understood that comparator circuit 22 may include any number of fixed or variable biasing elements, including without limitation, resistors, capacitors, inductors, diodes, transistors, or any other passive or active circuit components.


In the depicted embodiment, the hysteresis width of comparator circuit 22 may be expressed as:







Δ






V
T


=



R
VAR


R
B




(


V
OH

-

V
OL


)






where ΔVT represents the hysteresis width, VOH represents the maximum output voltage of comparator circuit 22 and VOL represents the minimum output voltage of comparator circuit 22. Hence, in the depicted embodiment, one may vary the hysteresis width of comparator circuit 22 by varying the resistance RVAR of digitally programmable variable resistor 30.



FIG. 7 illustrates an embodiment of a digitally programmable variable resistor 30 used for implementing digitally programmable hysteresis comparator circuit 22. Although a specific circuit topology is illustrated in FIG. 7, it is understood that variable resistor 30 may include any number of suitable circuit designs, layouts, or topologies for implementing a variable resistor similar or analogous to that set forth in this disclosure.


In the illustrated embodiment, variable resistor includes terminals 31 and 32. Variable resistor 30 as depicted also includes an enable bit 33, allowing the user to selectively enable variable resistor 30. Variable resistor 30 as shown further includes one or more control bits, such as control bits 34, 35, and 36 representing BIT0, BIT1 and BIT2 of a digital control signal 37, respectively, as shown in the depicted embodiment.


Variable resistor 30 also includes one or more resistors 51-58 with resistance values of R1, R2, R3, R4, R5, R6, R7 and R8, respectively, and switches 40-48 operable to enable or disable variable resistor 30 or to enable or disable individual resistors 51-58. Switches 40-48 may be any circuit component capable of making or breaking an electrical circuit, or for selecting between multiple circuits. As depicted in FIG. 7, variable resistor 30 may include a first set of series resistors 51-54, and a second set of series resistors 55-58 in parallel with the first set. One of the control bits 37, for example BIT 0 as shown in FIG. 7, may enable the first set of series resistors and disable the second set of series resistors, or vice versa. A remainder of the control bits 37 may then control selective bypassing of one or more of the resistors in the enabled set of series resistors.


The operation of digitally programmable variable resistor 30 may be described with reference to truth table 80 depicted in FIG. 8. Truth table 80 sets forth the values of resistance RVAR between terminals 31 and 32 of digitally programmable variable resistor 30 based on whether the variable resistor has been enabled via enable bit 33 and the input values of the digital control signal represented by BIT0, BIT1 and BIT2 on control bits 34, 35 and 36.


In many applications, it may be desirable for a use to disable hysteresis in comparator circuit 22. Referring again to the equation for determining hysteresis width in comparator circuit 22:







Δ






V
T


=



R
VAR


R
B




(


V
OH

-

V
OL


)






From the equation, it is evident that for RVAR=0, ΔVT=0, and no hysteresis is present in comparator circuit 22. In the depicted embodiment, this can be accomplished by appropriately setting the enable signal on input 33. Referring to the first row of truth table 80, when the enable signal on input 33 is set to 0, switch 40 is closed creating a conductive path between terminals 31 and 32, and the resistance RVAR is equal to zero, meaning ΔVT=0.


However, where it is desirable to include hysteresis in comparator circuit 22, the user may set the enable signal to the appropriate value (e.g., logic 1 in the depicted embodiment). When variable resistor 30 is enabled, control signals such as control signals BIT0, BIT1, and BIT2 may be used to control the resistance RVAR, thus allowing the user to control hysteresis width. In the depicted embodiment, the user may selectively manipulate BIT0, BIT1, and BIT2 to set the resistance RVAR to a desired value. For example, referring to the fourth row of values in truth table 80, enable bit 33 may be set to logic 1, BIT0 (control bit 34) to logic 0, BIT1 (control bit 35) to logic 1, and BIT2 (control bit 36) to logic 0. In such as case, switches 40, 42, 43 and 45 are open, switches 41 and 44 are closed, and a circuit path is completed between terminals 31 and 32 with a resistance RVAR=R1+R2+R3. It is evident from FIGS. 7 and 8 that numerous other values for RVAR may be selected.


Although variable resistor 30 is depicted as utilizing three control bits operable to select among eight values for resistance RVAR when enabled, it is understood that variable resistor may comprise any number N of control bits used to select any number 2N of values for resistance RVAR. Accordingly, although variable resistor 30 is depicted as utilizing nine switches and eight resistors, it is understood that variable resistor 30 may comprise an appropriate number of switches and resistors suitable to implement variable resistor 30 with N control bits and 2N possible values of resistance.


Utilizing the methods and systems set forth in this disclosure, one may digitally program a hysteresis comparator to configure a desired hysteresis width. A comparator with digitally programmable hysteresis may be useful for many purposes. For example, digitally programmable hysteresis comparator may be useful to allow a user to fine tune hysteresis width appropriately to the particular application for which the comparator is used. In addition, a user may fine tune hysteresis width to an appropriate level based on the electrical noise present in a circuit.


Although the present disclosure as illustrated by the above embodiments has been described in detail, numerous variations will be apparent to one skilled in the art. It is understood that various changes, substitutions and alternations can be made herein without departing from the spirit and scope of the disclosure as illustrated by the following claims.

Claims
  • 1. A digitally programmable hysteresis comparator, comprising: a digitally programmable variable resistor; andone or more control bits operable to modify the resistance of the variable resistor;wherein the modification of the resistance of the variable resistor is operable to modify the hysteresis width of the comparator.
  • 2. The comparator of claim 1, further comprising an enable bit operable to selectively enable the variable resistor.
  • 3. The comparator of claim 2, wherein disabling the variable resistor produces a hysteresis width of approximately zero.
  • 4. The comparator of claim 1, wherein the variable resistor includes a first set of series resistors and a second set of series resistors in parallel with the first set.
  • 5. The comparator of claim 4, wherein a first of the control bits enable the first set of series resistors and disabled the second set.
  • 6. The comparator of claim 5, wherein a remainder of the control bits control selective bypassing of at least some of the resistors in the enabled set of series resistors.
  • 7. The comparator of claim 1 wherein the variable resistor is connected between an input terminal and a positive input of a voltage comparator.
  • 8. The comparator of claim 1 wherein the variable resistor is connected between and output of a voltage comparator and a positive terminal of the voltage comparator.
  • 9. The comparator of claim 8 further comprising a second variable resistor connected between an input terminal of the hysteresis comparator and the positive input terminal of the voltage comparator.
  • 10. A system for implementing digitally programmable hysteresis in a comparator, comprising: a digitally programmable variable resistor; andone or more control bits operable to modify the resistance of the variable resistor;wherein the modification of the resistance of the variable resistor is operable to modify the hysteresis width of the comparator.
  • 11. The system of claim 10, further comprising an enable bit operable to selectively enable the variable resistor.
  • 12. A method for implementing digitally programmable hysteresis in a comparator, comprising: providing a digitally programmable variable resistor; andmanipulating one or more control bits, the manipulation operable to modify the resistance of the variable resistor;wherein the modification of the resistance of the variable resistor is operable to modify the hysteresis width of the comparator.
  • 13. The method of claim 12, further comprising manipulating an enable bit operable to selectively enable the variable resistor.