This application is a U.S. National-Stage entry under 35 U.S.C. § 371 based on International Application No. PCT/EP2010/001956, filed Mar. 27, 2010, which was published under PCT Article 21(2) and which claims priority to British Application No. 0908262.9, filed May 14, 2009, which are all hereby incorporated in their entirety by reference.
The technical field relates to the field of the controlling devices for fuel injectors and in particular deals with a hysteresis-type electronic controlling device for automotive injectors and associated method.
It is known that fuel injectors, used to inject a fuel-air mixture in the combustion chamber of an engine can be injectors, principally piezoelectric or solenoidal. In particular, injectors are driven by electronic controlling devices that comprise a power stage designed to drive them with a proper current or voltage signal.
It is also known that the standard control techniques for current generation in the power stage of the aforementioned devices are principally PWM or average current mode stages. Even if they do not present sub-harmonic instability, they actually introduce delays with respect to the switching frequency; thus, those delays force the designers to construct control loop stages operating with a frequency that is at least three or four times lower than the switching frequency of the power stage.
To solve this problem, control loop stages have been designed with a reduced time delay; that type control loop stages operate typically with two different circuit configurations, known in the art as a “peak current mode circuit” and “valley current mode circuit”. Driving fuel injectors with “peak current mode circuits” or “valley current mode circuits”, even if produces a reduced time delay, present instability.
In fact the power stage typically operates over MOS or FET transistors having a common switching node connected to the load (the injector) that presents a lot of ringing due to the reactive parasitic components. Since the control loop stages operate sensing the current on that node, there is the need of a blanking time before the sensing (typically around 300 ns). In particular when the load presents a very high duty cycle (bigger than 50%), sub harmonic instability occurs.
The peak or valley current mode circuits instability can be solved by using circuits with hysteretic current mode circuits, with a quasi-constant period that provide adequate stability of the current control loop. Nevertheless, the known circuits still present some disadvantages; on one hand they do need particularly complex circuits that make the measurement of the frequency (or the period) very convoluted. On the other and, they do not give sufficient performances when used with injectors that operate with high frequencies. In particular, if the injector operates with frequencies higher than a hundredth of kilohertz, the switching frequency becomes too high for those circuits, thus making a stable and simple control loop stage technically not feasible.
In view of the foregoing, it is at least desirable to provide a hysteresis-type electronic controlling device for fuel injectors that is free of the aforementioned disadvantages. It is also at least desirable to provide a fuel injector control method. In addition, desirable features and characteristics will become apparent from the subsequent summary and detailed description, and the appended claims, taken in conjunction with the accompanying drawings and this background.
A hysteresis-type electronic controlling device is provided for fuel injectors and a method is provided for controlling a fuel injector.
The present invention will hereinafter be described in conjunction with the following drawing figures, wherein like numerals denote like elements, and:
The following detailed description is merely exemplary in nature and is not intended to limit application and uses. Furthermore, there is no intention to be bound by any theory presented in the preceding background or summary or the following detailed description.
With reference to
In detail, the control stage 10, has the first output port 10c connected through a wire line to a node 50 from which depart a first line directed to the input 20i of the power driving unit 20 and a second line feeding the input 30i of the frequency feedback control stage 30. The output 30o of the frequency feedback control stage 30 feeds a multiplier 60 on a first input, while its second input is fed with a reference signal Vpeak that defines the maximum magnitude of the electric signal fed to the load 100. The reference signal is also fed to the first input port 10a of the control stage 10.
In detail, as shown in
The change of slope sign of the signal s1 depends on the signal s2 that control stage 10 feeds to the node 50—and thus to the input 20i of the power driving unit 20—from its output port 10c. In detail s2 assumes a squared waveform in which every period is defined by a first time Toff in which it assumes a first lower value and a second time Ton in which it assumes a second value higher than the first.
The power driving unit 20, a D class type amplifier, must be able to drive the load 100, thus producing on its output 20o the electric signal S1, to drive the load 100 in current or equivalently in voltage. Clearly, on the basis of the type of driving, the sensing stage 40 can be respectively a current sensing stage or a voltage sensing stage of known type. The power driving unit 20, in particular, can be a buck converter, a boost converter or a buck-boost converter
In detail, the fuel injector represented by the load 100 varies the way it opens on the basis of the magnitude of the electric signal S1; in detail, the higher it is, the faster the injector opens. The present-day fuel injectors operate very fast, with multiple fuel shots for each cycle of the engine on which they operate; in particular applications they can produce fuel shots requesting electric signals Spzi that can reach frequencies 1 MHz. For this reason also the power driving unit 20 shall be designed in order to be able to produce this type of current or voltage signal. The output 20o of the power driving unit 20 is connected to a respective node 70 from which two different lines depart. A first line reaches the input of the load 100, while the second line reaches the input of the sensing stage 40, whose output is connected to and feeds through a line 41 the third input port 10d of the current control stage 10.
The control stage 10 operates with a hysteretic electric signal variation. In detail, it receives the on the first and second input ports 10a, 10b respectively the peak value Vpeak and the valley value that is produced by the multiplication of the peak value Vpeak with the electric signal fed to the multiplier 60 by a corrective signal coming of the feedback frequency control stage 30, whose details will be described in detail in the following part of the description; with a known circuit configuration, the control stage 10 generates on its output port 10c the reference signal s2, that assumes the first lower value during the period of time in which the electric signal s1, sensed by the sensing stage 40, is higher than the reference signal Vpeak that assumes the second higher value during the period of time in which the electric signal s1 is lower than the reference signal Vpeak. The control stage 10 is designed in order to keep the valley value of the signal s1 as a gain (always below the 100%) of the reference signal Vref.
Finally, frequency feedback control stage 30 comprises a time counter 31, having the input directly connected to the input 30i of the frequency feedback control stage 30 and an output connected to a first input 32a of an adder 32, in turn having a second input 32b that receives a reference timing signal Tref, whose magnitude is decided a-priori by a value that can be constant in time or modulated with a very low frequency (typically up to 10 Hz but, anyway, several magnitude orders lower than the switching frequency of the driving unit 20).
The adder 32 has an own output 32c that is directly connected to the input of an integration stage. The time counter 31, measures the period between two positive edges of the signal s2 and produces on its output a respective signal Tm,s that is the result of the aforementioned measure. The signal Tmis assumes a waveform whose magnitude directly depends on the measured value itself Thus, through the time counter 31 is also measured of the signal si. Then the adder 32 executes the difference of the reference timing signal Tref present on its second input 32b with respect to the signal Tmis present on its first input 30a and coming from the output of the time counter, producing on its output 30c a difference signal eT(t) that reaches the input of the integrator 33.
The integrator 33 generates a hysteretic corrective signal kh that feeds one of the inputs of the multiplier 60. In detail, the integrator 33 is included in order to achieve a smoothed response of the variation of the corrective signal kh to the variation of the difference signal eT(t). In fact, if the device 1 as disclosed would be deprived of the integrator 33, at a step change of the difference signal eT(t), would result a variation of the corrective signal kh having a step waveform too. In contrast, due to the presence of the integrator 33, there is a smoothed response in the variation of the corrective signal kh, even in case of abrupt changes of the difference signal eT(t).
In detail, the feedback frequency control stage 30 can be designed so as to work in discrete or continuous time domain. In the first case, that is the one presented in the following part of the description, the sampling frequency shall be kept sufficiently high so as to avoid aliasing problems and so as to provide sufficient oversampling. Since the feedback frequency control stage 30 operates in the discrete time domain, thus sampling the difference signal eT(t) at constant intervals.
Clearly, the difference signal eT(t) cannot be maintained completely constant at each sampling instant, since the control operates with an error correction on the basis of the previous values. For this reason, even after a proper settling time, the device 1 will present, at an idle operating condition, the difference signal eT(t) affected by a small amplitude ripple. Due to the discrete time domain operation of the integrator 33, and given an instant of sampling time (i) and a previous instant of sampling time (i−1), then the corrective signal kh at the instant (i), is given by:
k
h (i)=kh (i−1)+K1·(eT (i))
Where eT(i) represents the difference signal eT(t) sampled at the time instant (i), and ki is a tuning parameter (integration gain) of the integrator. As it is known, increasing the integration gain of the integrator 33 results in a reduced rise time of its response, as well as an increase of the overshoot time and the settling time. Thus the correct level of integration gain should be chosen considering the response of the rest of the components of the device 1, and also keeping into account the fuel injector operative frequency. The corrective signal kh(i) is always saturated to a magnitude comprised within the range (0÷1).
Multiplying the corrective signal kh(i) with the reference signal Vpeak results in obtaining the valley value of the signal s2. Due to the fact that the corrective signal cannot exceed the unity, the valley value is forcedly kept lower than the reference signal's magnitude. Thus, the reference signal Vref is kept constant, that means that the maximum magnitude of the signal s1 fed to the load 100 is fixed too, while the valley value of the signal s1 changes according to the variation of kh.
A second preferred embodiment of the device 1 is shown in
In the second embodiment, the control stage 10 receives on the first and the second input port 10a, 10b respectively the reference signal Vref and the first time Toff in which the signal s2 assumes the first lower value. The first time Toff is obtained from the output of the multiplier 60, that numerically multiplies the corrective signal kh and the reference timing signal Tref, both fed to its inputs. In this second embodiment, the reference timing signal Tref is thus fed to the input of the multiplier 60 and, as happens in the first embodiment of the invention, to the adder's 32 input.
Thus the first and second embodiments still permit to obtain the same result with the same user defined inputs (the reference signal Vref and reference timing signal Tref) and with the same circuit configuration. The internal operation of the control stage 10 and one of its inputs (the one that do not receive the reference signal Vref) change from the first to the second embodiment. Also in the second embodiment the reference signal Vref is kept constant, that means that the maximum magnitude of the signal s1 fed to the load 100 is fixed too, while the valley value of the signal s1 changes according to the variation of kh; in this case, in contrast, the variation of the valley value is indirect, and is produced to a direct variation of the first time Toff through the action of the variation of kh. Of course, the two circuits whose block schemes are represented in
The advantages and benefits of the device previously disclosed are clear: it allows the avoidance of sub-harmonic instability that are present in classic peak current mode circuits and allows a simpler design and tuning with respect to frequency feedback circuits. In fact, the period measurement is executed using a simple counter, while a frequency measurement necessitates complex division stages in order to be effectively implemented. In addition, the presence of an integral control guarantees a smoothed variation of the hysteresis and a smoothed variation of the power driving unit 20. This produce a better functioning of the fuel injectors and, consecutively, an enhanced performance of the engine on which they are mounted on. Moreover, with the device herein disclosed it is possible to achieve a better frequency tuning of all the components of the circuit; the maintenance of a quasi-constant frequency, allows for a better filtering of the RF noise that is induced on the injectors.
In both the embodiments previously described, the reference timing signal Tref can be changed so as to adapt the device 1 functioning to a wide range of loads and system configurations without involving any modification in the interconnections of the circuit. Finally it is evident that modification and variations may be made to the device herein described, without departing from the scope of the present invention, as defined in the annexed claims.
While at least one exemplary embodiment has been presented in the foregoing summary and detailed description, it should be appreciated that a vast number of variations exist. It should also be appreciated that the exemplary embodiment or exemplary embodiments are only examples, and are not intended to limit the scope, applicability, or configuration in any way. Rather, the foregoing summary and detailed description will provide those skilled in the art with a convenient road map for implementing an exemplary embodiment, it being understood that various changes may be made in the function and arrangement of elements described in an exemplary embodiment without departing from the scope as set forth in the appended claims and their legal equivalents.
Number | Date | Country | Kind |
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0908262.9 | May 2009 | GB | national |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/EP2010/001956 | 3/27/2010 | WO | 00 | 11/14/2011 |