ILLUMINATION ASSEMBLY INCLUDING CHIP-SCALE PACKAGED LIGHT-EMITTING DEVICE

FIELD

The present embodiments are drawn generally towards illumination assemblies including light emitting devices, and, in some embodiments, more specifically to illumination assemblies including chip-scale packaged light-emitting devices.

BACKGROUND

A light-emitting diode (LED) can provide light in a more efficient manner than an incandescent light source and/or a fluorescent light source. The relatively high power efficiency associated with LEDs has created an interest in using LEDs to displace conventional light sources in a variety of lighting applications. For example, in some instances LEDs are being used as traffic lights and to illuminate cell phone keypads and displays.

Typically, an LED is formed of multiple layers, with at least some of the layers being formed of different materials. In general, the materials and thicknesses selected for the layers influence the wavelength(s) of light emitted by the LED. In addition, the chemical composition of the layers can be selected to promote isolation of injected electrical charge carriers into regions (commonly including quantum wells) for relatively efficient conversion to light. Generally, the layers on one side of the junction where a quantum well is grown are doped with donor atoms that result in high electron concentration (such layers are commonly referred to as n-type layers), and the layers on the opposite side are doped with acceptor atoms that result in a relatively high hole concentration (such layers are commonly referred to as p-type layers).

LEDs also generally include contact structures (also referred to as electrical contact structures or electrodes), which are conductive features of the device that may be electrically connected to an electrical driver circuit. The driver can provide electrical current to the device via the contact structures, e.g., the contact structures can deliver current along the lengths of structures to the surface of the device within which light may be generated.

SUMMARY

Illumination assemblies including light-emitting devices and methods associated therewith are provided.

In some embodiments, an illumination assembly is provided. The assembly comprises a light-emitting device. The light-emitting device comprises a light-emitting die comprising a light-generating region capable of generating light and an emission surface through which generated light is capable of being emitted. The light-emitting device comprises a package layer at least partially disposed over at least a portion of the light-emitting die emission surface. The package layer has an aperture through which light from the light-emitting die is capable of being emitted. The assembly further comprises an optical component arranged to receive light emitted by the light-emitting device. The optical component includes features that provide for the extraction of light from the optical component.

In some embodiments, a method of making an illumination assembly is provided. The method comprises providing a light-emitting device comprising a light-emitting die comprising a light-generating region capable of generating light and an emission surface through which generated light is capable of being emitted. The method further comprises providing a package layer at least partially disposed over at least a portion of the light-emitting die emission surface, wherein the package layer has an aperture through which light from the light-emitting die is capable of being emitted, and a close proximity optical element disposed over at least a portion of the aperture of the package layer and in the optical pathway of the emitted light. The method further comprises providing an optical component arranged to receive light emitted by the light-emitting device, wherein the optical component includes features that provide for the extraction of light from the optical component.

Other aspects, embodiments and features of the invention will become apparent from the following detailed description of the invention when considered in conjunction with the accompanying figures. The accompanying figures are schematic and are not intended to be drawn to scale. In the figures, each identical or substantially similar component that is illustrated in various figures is represented by a single numeral or notation.

For purposes of clarity, not every component is labeled in every figure. Nor is every component of each embodiment of the invention shown where illustration is not necessary to allow those of ordinary skill in the art to understand the invention. All patent applications and patents incorporated herein by reference are incorporated by reference in their entirety. In case of conflict, the present specification, including definitions, will control.

BRIEF DESCRIPTION OF DRAWINGS

FIGS. 1A, 1B and 1C respectively show a cross-section view, a top view and a bottom view of a light-emitting device including a light-emitting die according to an embodiment.

FIG. 2 illustrates a cross-section view of a chip scale packaged light-emitting device according to an embodiment.

FIG. 3 illustrates a cross-section view of a chip scale packaged light-emitting device according to an embodiment.

FIGS. 4A-4C illustrates a cross-section view of a chip scale packaged light-emitting devices according to embodiments.

FIG. 5 illustrates an LED according to an embodiment.

FIG. 6 illustrates an illumination assembly according to an embodiment.

FIG. 7 illustrates an illumination assembly according to an embodiment.

FIGS. 8A-8D illustrate respective optical components according to embodiments.

DETAILED DESCRIPTION

Illumination assemblies presented herein can include one or more chip-scale packaged light-emitting device. The chip-scale packaged light-emitting devices can be configured so as to facilitate the coupling of light emitted from the chip-scale packaged light-emitting device into an optical component (e.g., a light guide have extraction features) of the illumination assembly. In some embodiments, the chip-scale packaged light-emitting device can be abutted to a light input surface of the optical component. The chip-scale packaged light-emitting device can include features that allow for the packaged device to be abutted adjacent to the light input surface of the optical component such that the light emission surface of the device is at a pre-determined distance away from the light input surface. In some embodiments, such a feature comprises a package layer at least partially disposed over at least a portion of a light-emitting die emission surface, as described further below. Since light coupling efficiency into an optical component can be sensitive to the distance between the light emission surface and the light input surface, such a chip-scale package light-emitting device can enable reliable and reproducible light coupling into the optical component.

Some embodiments presented herein describe chip-scale packaged light-emitting devices comprising a light-emitting die including a light-generating region capable of generating light, where the light-emitting die includes an emission surface through which generated light is capable of being emitted. In some embodiments, a package houses the light-emitting die. The light-emitting die can be at least partially embedded in the package. The package can include a package layer at least partially disposed over at least a portion of the light-emitting die emission surface. The package layer may include an aperture through which light from the light-emitting die is capable of being emitted. The package can have a top surface less than about 100 micrometers from the light-emitting die emission surface. In some embodiments, the chip-scale packaged device has a device area less than 3 times the light-emitting die emission surface area. In some embodiments, the chip-scale packaged device thickness is less than 2 times the light-emitting die thickness.

FIG. 1A illustrates a cross-section view of a light-emitting device including a light-emitting die 120. Light-emitting die 120 may be a light-emitting diode die or laser diode die. Light-emitting die 120 can include semiconductor layers 33, 34, and 35. Layer 34 may be a light-generating region, also referred to as an active region which can include one or more quantum wells. Semiconductor layer 33 can be a semiconductor of a first conductivity type (e.g., n-type or p-type) and semiconductor layer 32 can be a semiconductor of a second conductivity type (e.g., p-type or n-type), thereby forming a p-n junction where the light-generating region can be disposed between the n-type and p-type regions. Semiconductor layer 33 can be attached to a layer 32 which can include reflective layer(s) (e.g., a metal layer stack, a dielectric or semiconductor multilayer mirror) and a supporting submount layer (e.g., one or more metal layers, such as a copper or copper-tungsten submount). The reflective layer(s) can be in contact with the semiconductor layer 33. The submount and/or any reflective layers disposed under semiconductor layer 33 can be electrically conductive, thereby providing for electrical contact to the semiconductor layer 33.

Light-emitting die 120 include an emission surface 38 through which light generated by the light-generating region 34 can be emitted, as represented by arrows 154.

Light-emitting die 120 may be formed by transferring semiconductor layers onto a supporting submount, for example, by using a grinding, etching, and/or laser liftoff process. Laser liftoff processes are disclosed, for example, in U.S. Pat. Nos. 6,420,242 and 6,071,795, which are hereby incorporated by reference in their entirety. It should be appreciated that other methods of forming the light-emitting die 120 are possible, as the embodiments presented herein are not limited in this respect.

In some embodiments, the light-emitting die can be a large-area die have an emission area greater than or equal to about 1 mm². In some embodiments, the light-emitting die emission area can be greater than 3 mm². In some embodiments, the light-emitting die emission area can be greater than or equal to 5 mm². In some embodiments, the light-emitting die emission area can be greater than or equal to 10 mm². A large-area light-emitting die can facilitate the packaging of such dies as a chip-scale packaged light-emitting device, such as the packaged light-emitting devices described herein. Extraction of light from large-area light-emitting dies can be facilitated by the presence of one or more light extraction features. In some embodiments, the one or more light extraction features comprise a roughed surface (e.g., a rough emission surface). In some embodiments, the one or more light extraction features comprise a patterned surface (e.g., a patterned emission surface), as described further below in detail.

A package can house light-emitting die 120. The light-emitting die can be at least partially embedded in the package. As illustrated in the embodiment shown in FIG. 1A, the edges of the light-emitting die 120 can be surrounded by a filler material 132 that can form part of the package. Filler material 132 can be an electrically insulating material (e.g., an epoxy). Filler material 132 can be thermally conductive. Filler material can be optically non-transparent (e.g., non-transparent epoxy, such as black epoxy) or optically transparent (e.g., transparent epoxy).

The package can include a package layer 108 at least partially disposed over at least a portion of the light-emitting die 120 emission surface 38. Package layer 108 can include an aperture through which light from the light-emitting die 120 is capable of being emitted. FIG. 1B illustrates a top-view of the light-emitting device of FIG. 1A. The figure shows a top-view of package layer 108 and the aperture through which light emitted via emission surface 38 of light-emitting die 120 can be transmitted. The perimeter of the light-emitted die 120 is outlined by a dashed line and can be disposed under package layer 108. In some embodiments, the aperture of package layer 108 is rectangular, square, circular, elliptical, triangular, or hexagonal. In some embodiments, the perimeter of the light-emitting die 120 has a different shape than the aperture of package layer 108. For example, the perimeter of light-emitting die 120 has a rectangular or square shape and the aperture of package layer 108 does not have a rectangular or square shape (e.g., circular, elliptical, triangular, or hexagonal).

In some embodiments, at least a portion (e.g., some or all) of the package layer 108 can be disposed over a perimeter of the light-emitting die 120 emission surface 38. An optically transmissive material may be disposed in and/or over at least a portion (e.g., some or all) of the aperture formed by the package layer. The optically transmissive material may be a window that can serve to protect the surface of the light-emitting die 120. Alternatively, in some embodiments, the packaged light-emitting device can be free of a window.

Package layer 108 can include an electrically conductive material, such as one or more metals and/or metal alloys (e.g., nickel, copper, gold, or combinations thereof) that can form an electrical connection with the light-emitting die 120. Package layer 108 can include a multi-layer stack of one or more metals and/or metal alloys. In some embodiments, the electrically conductive material of package layer 108 can serve as part or all of a first electrical contact path to the light-emitting die 120. The first contact path to the can be established via a top surface connection to light-emitting die 120. The light-emitting die 120 can include an electrical bond pad (not shown in FIG. 1A) disposed over the emission surface 38, and the electrically conductive material of package layer 108 can provide for the electrical connection with the electrical bond pad. Electrically conductive fingers (not shown) may extend from the contact pad and along the surface 38, thereby allowing for uniform current injection into the LED structure.

A backside of the light-emitting die 120, such as the backside of layer 32, can serve as part or all of a second electrical contact path to the light-emitting die 120. As previously described, the light-emitting die 120 can include a p-type side and an n-type side, and the first electrical contact path can connect to the n-type side of the light-emitting die 120, and the second electrical contact path can connect to the p-type side of the light-emitting die 120. Alternatively, the first electrical contact path can connect to the p-type side of the light-emitting die, and the second electrical contact path can connect to the n-type side of the light-emitting die 120.

In some embodiments, the light-emitting device can include an electrically conductive path 129 from the electrically conductive material of package layer 108 to a backside of the device. In some embodiments, the electrically conductive path 129 to the device backside can include one or more solder balls, metal spheres or columns, leads, other suitable electrically conductive structures. Electrically conductive path 129 may be in contact with package layer 108 and partially exposed on the backside of the light-emitting device, as illustrated in the cross-section view of FIG. 1A.

The light-emitting device may include one or more materials disposed between the electrically conductive path 129 and the light-emitting die 120. For example, filler material 132 can fill part or all of the space between electrically conductive path 129 and the light-emitting die 120. The filler material can be electrically insulating, and thus can provide for electrical isolation between electrically conductive path 129 and the edge of the light-emitting die 120.

The backside of the light-emitting die 120 may be at least partially covered by one or more electrically conductive materials, such as one or more metals. In some embodiments, the backside of the light-emitting die 120 is at least partially covered by solder 130. The solder can cover substantially all or a portion of the light-emitting die 120 backside. Such a configuration can facilitate the attachment (e.g., soldering) of the packaged light-emitting device to another structure, such as a printed circuit board (e.g., a metal core-board) or a heat sink. In some embodiments, the package layer 108 and solder 130 on the light-emitting die 120 backside can have a combined thickness of less than about 250 micrometers (e.g., less than about 200 micrometers, less than about 150 micrometers, less than about 100 micrometers). In some embodiments, the package layer 108 and solder 130 on the light-emitting die 120 backside can have a combined thickness in the range from about 50 micrometers to about 150 micrometers. An exposed die or backside or die backside having a thin layer of material (e.g., a thin layer of solder) can facilitate the removal of heat can directly from the die.

FIG. 1C illustrates a bottom view of the light-emitting device shown in FIG. 1A. One or more electrically conductive paths 129 can be present on one or more edges of the light-emitting die 120. For example, electrically conductive paths 129 may be present on two sides of the light-emitting die 120, as shown in the FIG. 1C. Alternatively, electrically conductive paths 129 may be present on all sides of the light-emitting die 120. Solder 130 can cover part or the entire backside of the light-emitting die 120.

In some embodiments, light-emitting device can include a heat spreading component, which is attached to the backside of the light-emitting die 120 by the solder 130. In some embodiment, the heat spreading component comprises a heat sink. Various embodiments of light-emitting devices including a heat sink can enable the dissipation of more than 20 W (e.g., more than 10 W, more than 25 W, more than 50 W) of heat from the light-emitting die. The ability to extract such large amounts of heat can facilitate the use of high power light-emitting devices which typically generate significant thermal energy during operation.

In some embodiments, the backside of light-emitting die 120 may be exposed. This may allow for there to be direct thermal contact between the light emitting die and the mounting surface or the heat spreading element. Direct thermal contact may create thermal advantages. One advantage is significantly higher amounts of heat dissipating out of the light emitting die than a traditionally packaged light emitting device. Another advantage is smaller number of manufactured components that could lead to ease of manufacturing.

Any suitable external heat sink may be used. The heat sink can include passive and/or active heat exchanging mechanisms, as the invention is not limited in this respect. Passive heat sinks can include structures formed of one or more materials that conduct heat as a result of temperature differences in the structure. Passive heat sinks may also include protrusions 208 (e.g., fins, combs, spikes, etc.) which can increase the surface contact area with the surrounding ambient and therefore facilitate heat exchange with the ambient. For example, a passive heat sink may include a copper slug core, which provides a thermally conductive material that can conduct thermal energy to surrounding aluminum fins radiating out from the copper slug. In a further embodiment, a passive heat sink may also include channels in which fluid (e.g., liquid and/or gas) may flow so as to aid in heat extraction via convection within the fluid. For example, in one embodiment, the heat sink may comprise a heat pipe to facilitate heat removal. Heat pipes can be designed to have any suitable shape, and are not necessarily limited to only cylindrical shapes. Other heat pipe shapes may include rectangular shapes which may have any desired dimensions.

In some embodiments, a light-emitting device, such as the device illustrated in FIGS. 1A-1C, can be a chip-scale packaged light-emitting device having a small device thickness. A small device thickness can facilitate the extraction of heat generated by the light-emitting die. In some embodiments, the light-emitting device comprises a light-emitting die comprising a light-generating region capable of generating light and an emission surface through which generated light is capable of being emitted. A package can house the light-emitting die, wherein the light-emitting die is at least partially embedded in the package. The device thickness can be less than about 2 times the light-emitting die thickness. The device thickness can be less than about 1.5 times the light-emitting die thickness. The device thickness can be less than about 1.3 times the light-emitting die thickness. The device thickness can be less than about 500 micrometers. The light-emitting die thickness can be less than about 250 micrometers. In some embodiments, the device thickness can be about 500 micrometers or less and the light-emitting die thickness can be about 250 micrometers or less.

In some embodiments, a light-emitting device, such as the device illustrated in FIGS. 1A-1C, can be a chip-scale packaged light-emitting device having a small device area (e.g., package and die area). In some embodiments, the light-emitting device comprises a light-emitting die comprising a light-generating region capable of generating light and an emission surface through which generated light is capable of being emitted. A package can house the light-emitting die, wherein the light-emitting die can be at least partially (e.g., part or all) embedded in the package. The device area can be less than about 3 times the light-emitting die emission surface area. The device area can be less than about 3 times the light-emitting die emission surface area. The device area can be less than about 2 times the light-emitting die emission surface area. The device area can be less than about 1.5 times the light-emitting die emission surface area.

In some embodiments, a light-emitting device, such as the device illustrated in FIGS. 1A-1C, can have a top package layer in close proximity with the emission surface of the light-emitting die. In some embodiments, a package can house the light-emitting die, where the package can have a top surface less than about 250 micrometers from the light-emitting die emission surface. The top surface of the package layer can be less than about 100 micrometers from the light emission surface of the die. The top surface of the package layer can be less than about 75 micrometers from the light emission surface of the die. The top surface of the package layer can be less more than about 50 micrometers from the light emission surface of the die. The top surface of the package layer can be less than about 25 micrometers from the light emission surface of the die. Such configurations can facilitate the placement of optical components (e.g., lens, light guide, etc.) over the emission surface of the light-emitting die, whereby the distance between the optical component and the emission surface may be small and/or precisely controlled. For example, the optical component can be placed in direct contact with the package layer 108 of the device shown in FIG. 1A. In some embodiments, the optical component may be within 250 micrometers from the top surface of the package layer; In some embodiments, the optical component may be within 100 micrometers from the top surface of the package layer. In some embodiments, the optical component may be within 50 micrometers from the top surface of the package layer. In some embodiments, the optical component may be within 25 micrometers from the top surface of the package layer.

Light-emitting devices described herein can be formed using one or more methods presented herein. In one embodiment, the method of making a light-emitting device can include providing a light-emitting die comprising a light-generating region capable of generating light and an emission surface through which generated light is capable of being emitted, and providing a package layer at least partially disposed over at least a portion of the light-emitting die emission surface, wherein the package layer has an aperture through which light from the light-emitting die is capable of being emitted. In some embodiments, a substrate structure can be formed and a light-emitting die can be attached to the substrate structure. Subsequent processing may follow, as described below.

FIG. 2 illustrates a cross-section view of a chip scale package, according to one embodiment. The package can include a substrate 102. The substrate 102 can be made of a light transmissive material such as a polycarbonate, glass, or sapphire material. Any type of transmissive material may be used that has high resolution, purity, transmittance over a wide spectral range and a low thermal expansion coefficient. For example, the transmissive material may be a high resolution fused silica bicarbonate glass with a high refractive index.

In some embodiments, the substrate has a thickness of less than about 300 micrometers (e.g., less than 200 micrometers, less than 150 micrometers). A cavity can QQbe formed in the substrate 102. The cavity can be filled with a mask material 104. Mask material 104 can include a solder mask material known to those of ordinary skill in the art. A printing process, for example screen printing, can be used to fill the cavity with mask material 104. Grinding of the mask material 104 may be used to provide for a flush surface of mask material 104 with substrate 102. In some embodiments, the cavity between the mask 104 and the substrate can be completely under filled. The material can include silicone and should be index matched to the transmissive substrate material.

Plating can then be used to form package layer 106 and package layer 108 (e.g., metal layers) in unmasked areas of substrate 102. In some embodiments, the plating process can include electroplating, for example, as commonly used in printed circuit board fabrication. Package layer 106 can be a different material (e.g., different metal) than package layer 108. In some embodiments, package layer 108 is formed of the same metal as starting substrate 102. For example, package layer 106 can be a nickel layer. Package layer 108 can be a copper layer. Package layer 106 can serve as a stop layer for further processing that may involve removing (e.g., etching) initial substrate 102.

Mask material 112 can be deposited over package layer 108. Mask material 112 may form a mask that can expose regions of package layer 108. The exposed regions that are not masked may define regions where contact to package layer 108 is desired (e.g., solder bump regions). Plating may then be used to form layers 114 and 116, as illustrated in FIG. 2F. Layers 114 and 116 may be metal layers, for example layer 114 may be formed of nickel and layer 116 may be formed of gold. Layer 116 may be used as bonding regions, as discussed further below. A nickel layer may serve as a diffusion barrier, whereas a gold layer is useful due to the oxidation resistance of gold.

Flip-chip bumps 126 (e.g., gold bumps, solder bumps, etc.) may be used to attach the light-emitting die to the substrate structure. A thermo-sonic bonding process may be used to attach light-emitting die 120 bond pads 36 (e.g., gold bond pads) with the bumps 126. The thermo-sonic bonding process may be performed between a temperature of about 100 and about 200 degrees Celsius and may involve the exposure of the bond to ultrasonic sound waves. Optionally thermo-compression bonding without ultrasonic energy may be performed between a temperature of about 200 and about 350 degrees Celsius. For solder bumps, a solder reflow process may be used.

In some embodiments, the electrically conductive structures may include one or more solder balls, metal spheres or columns, and/or leads. In such embodiments, the electrically conductive path between the package layer 108 and the device backside (129 in FIG. 1A) can comprise the electrically conductive structures 128 and pad regions of package layers 116 and 114.

Solder 130 may be disposed on the backside of light-emitting die 120. A reflow process may be used to attach the solder to adjacent surfaces, as known by those of skill in the art. In some embodiments, the reflow process is performed at temperatures ranging from about 180 degrees Celsius to about 280 degrees Celsius. In some embodiments, solder may be dispensed onto desired regions via a print process, such as screen printing. In some embodiments, solder may be deposited (e.g., vapor deposited) on the backside of the light-emitting die. Such a process may be performed at the wafer-level prior to dicing the dies, or after dicing. In some embodiments, the backside of the light-emitting die is free of solder, and may include an exposed gold-containing (e.g., gold or gold-alloy layer) surface.

In some embodiments, filler material 132 may be deposited over the light-emitting die 120 (e.g., over solder 130) and/or over electrically conductive structures 128. Filler material 132 may be a low viscosity material (e.g., low viscosity epoxy) that self levels. In such a process, the protective coating 127 prevents filler material 132 from flowing onto the emission surface of the light-emitting die 120. After dispensing, a cure step may be performed to set the filler material. The cure step may include the application of heat and/or UV radiation. Grinding may then be performed so as to level the electrically conductive structures 128, filler material 132 and solder 130.

In some embodiments, the transmissive material making up the substrate layer can contain one or more light extraction features. These extraction features can be created by producing variation in the surface of the transmissive material according to a pattern. Some of the extraction features as referred herein are roughened surface textures, arranged in a pattern to create a photonic lattice. The pattern may be periodic (e.g., having a simple repeat cell, or having a complex repeat super-cell), or non-periodic. As referred to herein, a complex periodic pattern is a pattern that has more than one feature in each unit cell that repeats in a periodic fashion. Such patterns and textures have been described in U.S. Pat. Nos. 7,084,434 and 7,083,993 and 7,196,354, which are incorporated herein by reference in their entirety.

In some embodiments, the photonic lattice may be printed directly on the transmissive material. In other embodiments, a layer of polymer embedded with a photonic lattice is printed on the transmissive material. For example, the layer of polymer could be a photoimagable epoxy. In yet another embodiment, a SOG layer embedded with a photonic lattice is printed on the transmissive material

In some embodiments, the transmissive material making up the substrate layer can contain a wavelength converting material. Wavelength-converting material is a material that can convert the wavelength of absorbed light. The wavelength-converting materials can function by absorbing light having a first wavelength and emitting light having a second wavelength (e.g., longer wavelengths). For example, the wavelength-converting material can convert ultra-violet or near ultra-violet light to light in the visible spectrum. The wavelength converting material can down-convert light from shorter wavelengths (higher energies) to longer wavelengths (shorter energies). Phosphors are examples of typical wavelength converting materials, which can take the form of phosphor particles. Quantum dots can also serve as wavelength converting materials. In some preferred embodiments, the wavelength-converting material is a phosphor material. In other preferred embodiments, a combination of phosphors can be used to create visible light emission of a desired wavelength.

In some embodiments, the phosphor material may be present in particulate form. The wavelength converting material regions may be formed by a number of methods. Methods such as printing, molding (e.g., injection molding), spin coating, spraying, stenciling, spin-on glass, electroforming, injection molding, and thin layer deposition and/or embossing may be employed. For example, a printing process (e.g., a jet printing process) may be used to create wavelength converting material having a spatially varying density (e.g., per unit area of the emission surface of the illumination assembly). The printer cartridge may include a solution comprising the wavelength converting material (e.g., phosphor and/or quantum dots). Varying thickness of a wavelength converting material region can then be created by performing a longer printing step at different locations. Alternatively, or additionally, small features (e.g., dots, stripes) with small sizes (e.g., less than 500 microns, less than 200 microns, less than 100 microns) can be printed with a spatially varying nearest neighbor distance. In other embodiments, wavelength converting material may be included in a molding material (e.g., a polymer such as PMMA or acrylic) so as to have a varying density at different locations of the molded component, such as a molded light guide. The particles may be distributed in a second material (e.g., an encapsulant or adhesive, such as epoxy) to form a composite structure or a plate.

In some embodiments, the transmissive material making up the substrate layer can include light extraction features that can transmit, diffuse, homogenize, scatter and/or emit some or all of the light transmitted therein.

In an alternative embodiment, substrate 102 and mask material 104 can be removed, as illustrated in the cross-section view of FIG. 3. A selective etch may be used to remove substrate 102 and stop on layer 106. In this embodiment, the light emitting die 120 may be directly exposed. In order to protect the die 120, an encapsulant may be used. The encapsulant may fill the area between the light emission surface and the top most feature of the package layer 106 of the light emitting device. In one embodiment, the encapsulant may be comprised of a transparent material, but may not contain any optical features and may serve only as a protective layer. The close proximity optical element may form a wide variety of structures known to persons skilled in optical technology. The optical element may be square or rectangular, circular, symmetrical or non-symmetrical, regular or irregular.

FIG. 4A shows an embodiment of the chip-scale package with a close proximity optical element 140. In some embodiments, the close proximity optical element may be directly on the light emission surface. In some embodiments, the close proximity optical element may be close to the light emission surface. For example, the close proximity optical element may be within 250 microns from the light emission surface; in some embodiments, the close proximity optical element may be within 100 microns from the light emission surface; in some embodiments, the close proximity optical element may be within 50 microns from the light emission surface; and, in some embodiments, the close proximity optical element may be within 25 microns from the light emission surface.

In this embodiment, the close proximity optical element 140 may be an encapsulant element that is optically coupled to the light emission surface. The optical element 140 may comprise a transparent shell encapsulating the diode. In one embodiment, the transparent shell has a rigid material on the outside and optically transmissive material on the inside of the shell. The optically transmissive material is transparent and preferably has a relatively high refractive index. Suitable materials for the optical element can include inorganic materials such as high index glasses and ceramics. FIG. 4A shows the optical element 140 forming a flat rectangular window that is on the same level as top most feature of the package layer 106. FIG. 4B shows another embodiment of an optical element that forms a dome like shape completely encapsulating the diode.

In some embodiments, an index matching layer (e.g., having similar refractive index as the optical element) is disposed on the emission surface of the light emitting diode. In some embodiments, a substantial portion of the optical element has an index of refraction of less than about 1.4. In some embodiments, the index matching layer may be used to fill the gap between the light-emitting surface and the optical element. FIG. 4B shows the index matching layer 142 between the light-emitting surface of the light emitting die 120 and the optical element 140.

In other embodiments, the index matching layer may also be a binder material to attach the optical element to the light emitting diode. The index matching layer may be injected, wicked, or otherwise inserted into the partially enclosed cavity using methods known in the art and then sealed off using an epoxy or cured wherein index matching material seals the cavity itself.

Various binder materials may include epoxies, glues, silicon-based adhesives and other common binding materials known to those skilled in the art of attaching materials together. Those materials are either made of the same substance or of a different substance, which affects the choice of a proper binding material. Some of these binding materials have different methods for curing. For example a thermosetting epoxy may require being heated to 150 degrees Celsius for a specified period of time in order to fully be fully cured. Other adhesives may cure with time, while the curing process with additional adhesives may be expedited by applying UV light.

These binding materials can have ideal properties for refractive-index matching between optical interfaces. The refractive index of a light-emitting surface of an LED will be different than that of air or glass. By adding an index matching material the angle of incidence at the optical interface can be reduced, thus enabling more light to pass through the interface as less light is internally reflected at the interface.

In some embodiments, the close proximity optical element comprises one or more light extraction features. The light extraction features can transmit, diffuse, homogenize, scatter and/or emit some or all of the light transmitted therein. In other embodiment, the optical element comprises a light homogenization region that substantially and uniformly distributes light outputted by the light emitting device. FIG. 4C shows an optical element with a light homogenization region 144. The homogenization region is formed between the index matching layer 142 and the optical element 140. The index matching layer 142 would be index matched both to the light homogenization region and optical element.

In one embodiment, the chip scale package presented here could be used in solar or photovoltaic cell technology. Solar or photovoltaic cells have the ability to convert sunlight into electricity. Photovoltaic cells used in concentrator photovoltaic modules that include optics and housing are more efficient than traditional single cell arrangements. In these concentrator photovoltaic modules large amounts of solar energy are converted to heat. In order to maximize efficiency of the photovoltaic cells, the dissipated heat must be effectively removed from the cell. Removing heat could increase efficiency of the cell and prevent damage from overheating.

In one embodiment, the present chip scale package places a photovoltaic cell in place of the light emitting device. Because the package was originally designed for light emitting devices with high output of optical power, that generates high amounts of heat, the package can withstand the large amount of heat associated with the photovoltaic cell. Additionally, because of the configuration of the chip scale package, direct thermal contact exists between the light emitting die and the heat management systems described above.

FIG. 5 illustrates a light-emitting diode (LED) which may be one example of a light-emitting die, in accordance with one embodiment. It should be understood that various embodiments presented herein can also be applied to other light-emitting dies, such as laser diode dies, and LED dies having different structures (such as organic LEDs, also referred to as OLEDs). LED die 120 shown in FIG. 5 comprises a multi-layer stack 31 that may be disposed on a support structure (not shown). The multi-layer stack 31 can include an active region 34 which is formed between n-doped layer(s) 35 and p-doped layer(s) 33. The stack can also include an electrically conductive layer 32 which may serve as a p-side contact, which can also serve as an optically reflective layer. An n-side contact pad 36 may be disposed on layer 35. Electrically conductive fingers (not shown) may extend from the contact pad 36 and along the surface 38, thereby allowing for uniform current injection into the LED structure.

It should be appreciated that the LED is not limited to the configuration shown in FIG. 5, for example, the n-doped and p-doped sides may be interchanged so as to form a LED having a p-doped region in contact with the contact pad 36 and an n-doped region in contact with layer 32. As described further below, electrical potential may be applied to the contact pads which can result in light generation within active region 34 and emission (represented by arrows 154) of at least some of the light generated through an emission surface 38. As described further below, holes 39 may be defined in an emission surface to form a pattern that can influence light emission characteristics, such as light extraction and/or light collimation. It should be understood that other modifications can be made to the representative LED structure presented, and that embodiments are not limited in this respect.

The active region of an LED can include one or more quantum wells surrounded by barrier layers. The quantum well structure may be defined by a semiconductor material layer (e.g., in a single quantum well), or more than one semiconductor material layers (e.g., in multiple quantum wells), with a smaller electronic band gap as compared to the barrier layers. Suitable semiconductor material layers for the quantum well structures can include InGaN, AlGaN, GaN and combinations of these layers (e.g., alternating InGaN/GaN layers, where a GaN layer serves as a barrier layer). In general, LEDs can include an active region comprising one or more semiconductors materials, including III-V semiconductors (e.g., GaAs, AlGaAs, AlGaP, GaP, GaAsP, InGaAs, InAs, InP, GaN, InGaN, InGaAlP, AlGaN, as well as combinations and alloys thereof), II-VI semiconductors (e.g., ZnSe, CdSe, ZnCdSe, ZnTe, ZnTeSe, ZnS, ZnSSe, as well as combinations and alloys thereof), and/or other semiconductors. Other light-emitting materials are possible such as quantum dots or organic light-emission layers.

The n-doped layer(s) 35 can include a silicon-doped GaN layer (e.g., having a thickness of about 4000 nm thick) and/or the p-doped layer(s) 33 include a magnesium-doped GaN layer (e.g., having a thickness of about 40 nm thick). The electrically conductive layer 32 may be a silver layer (e.g., having a thickness of about 100 nm), which may also serve as a reflective layer (e.g., that reflects upwards any downward propagating light generated by the active region 34). Furthermore, although not shown, other layers may also be included in the LED; for example, an AlGaN layer may be disposed between the active region 34 and the p-doped layer(s) 33. It should be understood that compositions other than those described herein may also be suitable for the layers of the LED.

As a result of holes 39, the LED can have a dielectric function that varies spatially according to a pattern. Typical hole sizes can be less than about one micron (e.g., less than about 750 nm, less than about 500 nm, less than about 250 nm) and typical nearest neighbor distances between holes can be less than about one micron (e.g., less than about 750 nm, less than about 500 nm, less than about 250 nm). Furthermore, as illustrated in the figure, the holes 39 can be non-concentric.

The dielectric function that varies spatially according to a pattern can influence the extraction efficiency and/or collimation of light emitted by the LED. In some embodiments, a layer of the LED may have a dielectric function that varies spatially according to a pattern. In the illustrative LED die 120 of FIG. 5, the pattern is formed of holes, but it should be appreciated that the variation of the dielectric function at an interface need not necessarily result from holes. Any suitable way of producing a variation in dielectric function according to a pattern may be used. For example, the pattern may be formed by varying the composition of layer 35 and/or emission surface 38. The pattern may be periodic (e.g., having a simple repeat cell, or having a complex repeat super-cell), or non-periodic. As referred to herein, a complex periodic pattern is a pattern that has more than one feature in each unit cell that repeats in a periodic fashion. Examples of complex periodic patterns include honeycomb patterns, honeycomb base patterns, (2×2) base patterns, ring patterns, and Archimedean patterns. In some embodiments, a complex periodic pattern can have certain holes with one diameter and other holes with a smaller diameter. As referred to herein, a non-periodic pattern is a pattern that has no translational symmetry over a unit cell that has a length that is at least 50 times the peak wavelength of light generated by one or more light-generating portions. As used herein, peak wavelength refers to the wavelength having a maximum light intensity, for example, as measured using a spectroradiometer. Examples of non-periodic patterns include aperiodic patterns, quasi-crystalline patterns (e.g., quasi-crystal patterns having 8-fold symmetry), Robinson patterns, and Amman patterns. A non-periodic pattern can also include a detuned pattern (as described in U.S. Pat. No. 6,831,302 by Erchak, et al., which is incorporated herein by reference in its entirety). In some embodiments, a device may include a roughened surface. The surface roughness may have, for example, a root-mean-square (rms) roughness about equal to an average feature size which may be related to the wavelength of the emitted light.

In certain embodiments, an interface of a light-emitting device is patterned with holes which can form a photonic lattice. Suitable LEDs having a dielectric function that varies spatially (e.g., a photonic lattice) have been described in, for example, U.S. Pat. No. 6,831,302 B2, entitled “Light emitting devices with improved extraction efficiency,” filed on Nov. 26, 2003, which is herein incorporated by reference in its entirety. A high extraction efficiency for an LED implies a high power of the emitted light and hence high brightness which may be desirable in various optical systems.

It should also be understood that other patterns are also possible, including a pattern that conforms to a transformation of a precursor pattern according to a mathematical function, including, but not limited to an angular displacement transformation. The pattern may also include a portion of a transformed pattern, including, but not limited to, a pattern that conforms to an angular displacement transformation. The pattern can also include regions having patterns that are related to each other by a rotation. A variety of such patterns are described in U.S. Patent Publication No. 20070085098, entitled “Patterned devices and related methods,” filed on Mar. 7, 2006, which is herein incorporated by reference in its entirety.

Light may be generated by the LED as follows. The p-side contact layer can be held at a positive potential relative to the n-side contact pad, which causes electrical current to be injected into the LED. As the electrical current passes through the active region, electrons from n-doped layer(s) can combine in the active region with holes from p-doped layer(s), which can cause the active region to generate light. The active region can contain a multitude of point dipole radiation sources that generate light with a spectrum of wavelengths characteristic of the material from which the active region is formed. For InGaN/GaN quantum wells, the spectrum of wavelengths of light generated by the light-generating region can have a peak wavelength of about 445 nanometers (nm) and a full width at half maximum (FWHM) of about 30 nm, which is perceived by human eyes as blue light. The light emitted by the LED may be influenced by any patterned surface through which light passes, whereby the pattern can be arranged so as to influence light extraction and/or collimation.

In other embodiments, the active region can generate light having a peak wavelength corresponding to ultraviolet light (e.g., having a peak wavelength of about 370-390 nm), violet light (e.g., having a peak wavelength of about 390-430 nm), blue light (e.g., having a peak wavelength of about 430-480 nm), cyan light (e.g., having a peak wavelength of about 480-500 nm), green light (e.g., having a peak wavelength of about 500 to 550 nm), yellow-green (e.g., having a peak wavelength of about 550-575 nm), yellow light (e.g., having a peak wavelength of about 575-595 nm), amber light (e.g., having a peak wavelength of about 595-605 nm), orange light (e.g., having a peak wavelength of about 605-620 nm), red light (e.g., having a peak wavelength of about 620-700 nm), and/or infrared light (e.g., having a peak wavelength of about 700-1200 nm).

In certain embodiments, the LED may emit light having a high light output power. As previously described, the high power of emitted light may be a result of a pattern that influences the light extraction efficiency of the LED. For example, the light emitted by the LED may have a total power greater than 0.5 Watts (e.g., greater than 1 Watt, greater than 5 Watts, or greater than 10 Watts). In some embodiments, the light generated has a total power of less than 100 Watts, though this should not be construed as a limitation of all embodiments. The total power of the light emitted from an LED can be measured by using an integrating sphere equipped with spectrometer, for example a SLM12 from Sphere Optics Lab Systems. The desired power depends, in part, on the optical system that the LED is being utilized within. For example, a display system (e.g., a LCD system) may benefit from the incorporation of high brightness LEDs which can reduce the total number of LEDs that are used to illuminate the display system.

The light generated by the LED may also have a high total power flux. As used herein, the term “total power flux” refers to the total optical power divided by the emission area. In some embodiments, the total power flux is greater than 0.03 Watts/mm², greater than 0.05 Watts/mm², greater than 0.1 Watts/mm², or greater than 0.2 Watts/mm². However, it should be understood that the LEDs used in systems and methods presented herein are not limited to the above-described power and power flux values.

In some embodiments, the LED may be associated with one or more wavelength converting regions. The wavelength converting region(s) may include one or more phosphors and/or quantum dots. The wavelength converting region(s) can absorb light emitted by the light-generating region of the LED and emit light having a different wavelength than that absorbed. In this manner, LEDs can emit light of wavelength(s) (and, thus, color) that may not be readily obtainable from LEDs that do not include wavelength converting regions. In some embodiments, one or more wavelength converting regions may be disposed over (e.g., directly on) the emission surface (e.g., surface 38) of the light-emitting device.

FIG. 6 illustrates an illumination assembly 200 including a chip-scale packaged light-emitting device 211, such as the device described in the description provided above. Chip-scale packaged light-emitting device 211 can arranged such that at least some of the light (arrows 154) emitted by the light-emitting device 211 can be coupled into optical component 213. In some embodiments, the chip-scale packaged light-emitting device 211 can abut (e.g., be in direct contact with) the light input surface of the optical component 213, as illustrated in FIG. 6.

Optical component 213 can be a light guide that can include light scattering features that provide for light (arrows 155) emission from one or more surfaces (e.g., a portion or substantially all of surface 214) of the component 213. Optical component 213 may include one or more components composed of material(s) that can transmit, diffuse, homogenize, and/or emit some or all of the light transmitted therein. In some embodiments, optical component 213 may include scattering centers that can diffuse, scatter, homogenize, and/or emit some or all of the light transmitted therein so that light may exit along some or all of the length of the optical component 213. In some embodiments, a reflector (e.g., a reflective metal layer) may be disposed on backside surface 215 of the optical component 213.

In some embodiments, illumination assembly 200 may serve as a backlight unit of a display system, such as an LCD system, wherein a liquid crystal layer (and any associated films) may be disposed over the illumination assembly 200 and thereby illuminated by the assembly 200. In other embodiments, illumination assembly 200 may be an illumination system, such as an illumination panel used for general lighting applications.

FIG. 7 illustrates an illumination assembly including a chip-scale packaged light-emitting device where the package layer 108 is adjacent (e.g., directly in contact with) the light input surface (e.g., edge) of the optical component. The light emission surface 38 of the light-emitting die can therefore be placed at pre-determined distance away from the light input surface of optical component 213 (e.g., light guide, such as a light guide panel). Since light coupling efficiency into an optical component can be sensitive to the distance between the light emission surface and the light input surface, such a chip-scale package light-emitting device can enable reliable and reproducible light coupling into the optical component. Also, such a chip-scale package light-emitting device can include backside electrical contacts (e.g., 130 and 129) that can allow for the device to be abutted directly to an optical component.

In one embodiment, the optical component 213 and the chip-scale packaged light-emitting device 211 can both have interlocking features allowing a releasably attaching mechanism. Interlocking features may include both protrusions and insets or inlays 220 on both the light emitting device 211 and on the optical component 213. These features may allow light-emitting devices to be connected interchangeably with the optical components without the need to seal and reseal the connections.

FIGS. 8A-8D illustrate embodiments of optical components which may be part of an optical system, such as the optical system illustrated in FIGS. 6 and 7. One or more optical components may be included in the optical system. The optical component may have any desired shape, for example, the optical component may be a panel, a cylinder, or any other desired shape. FIG. 8A illustrates an optical component in the shape of a panel 213a, wherein the dimensions of the panel may be such that the length 232 and/or the width 232 are substantially larger than the thickness 233. In some embodiments, the thickness of the panel is less than 3 cm (e.g., less than 2 cm, less than 1 cm, less than 0.5 cm). In one embodiment, the length and/or width of the panel are less than 100 cm (e.g., less than 50 cm, less than 30 cm). In some embodiments, the length and/or width of the panel are at least 10 times greater (e.g., 20 times greater, 50 times greater, 100 times greater) than the thickness of the panel. FIG. 8B illustrates an optical component in the shape of a cylinder 213b. The cylinder may have any desired dimensions, for example, the dimensions may be similar to those of different types of fluorescent light fixtures or tubes. FIG. 8C illustrates an optical component in the shape of a bulb 213c. The bulb may have any desired dimensions, for example, the dimensions may be similar to those of different types of incandescent light bulbs. FIG. 8D illustrates an optical component in the shape of a wedge 213d (e.g., a wedge-optic). Some examples of optical components that may be part of optical systems, such as display systems, include wedge-optics, mixing regions, and illumination panels.

The optical component may be formed of one or more materials including materials that are translucent and/or semi-translucent. Examples of materials that may be used to form the optical components include polycarbonate and PMMA (polymethylmethacrylate). In some embodiments, the optical component may be formed of material(s) that can transmit, diffuse, scatter, homogenize, and/or emit some or all of the light transmitted therein. The optical component may be arranged in an optical system so that light emitted from at least one light-emitting device enters the optical component. For example, in some arrangements, light from at least one light-emitting device may enter the optical component through an edge. In other embodiments, a plurality of light-emitting devices may be arranged to emit light into the optical component. Furthermore, light-emitting devices may be arranged to emit light into different edges and/or corners of the optical component. In the panel embodiment shown in FIG. 8A, light from a light-emitting device may enter via edge 234a of the panel and/or via any one of the corners of the panel. In the cylindrical embodiment shown in FIG. 8B, light from a light-emitting device may enter via edge 234b of the cylinder. In the bulb embodiment shown in FIG. 8C, light from a light-emitting device may enter via edge 234c of the bulb. In the wedge embodiment shown in FIG. 8D, light from a light-emitting device may enter via edge 234d of the wedge, and/or any other suitable edge. Although the edges in the illustrative embodiments of FIG. 8A-8D are flat surfaces, it should be appreciated that an edge need not necessarily have a flat surface. For instance, an edge may have any suitable shape, including a rounded surface, a concave surface, and/or a convex surface.

In some embodiments, an optical component may include one or more cavities and/or recesses that may be capable of receiving one or more light-emitting devices. The cavity and/or recess may be formed on the surface of an optical component and can be used to facilitate the assembly of an optical system that can include the optical component and one or more light-emitting devices that emit light into the optical component. In other embodiments, one or more light-emitting devices may be embedded in the optical component. For example, one or more light-emitting devices may be embedded into the optical component during the formation of optical component. When the optical component is formed with a molded material (e.g., using a mold injection process), one or more light-emitting devices may be embedded into the optical component during the molding process. When the optical component is formed by joining multiple parts, one or more light-emitting devices may be embedded in between the multiple parts. It should be appreciated that these are just some examples of methods by which one or more light-emitting devices may be coupled to and/or embedded into an optical component and various modifications are possible.

As used herein, when a structure (e.g., layer, region) is referred to as being “on”, “over” “overlying” or “supported by” another structure, it can be directly on the structure, or an intervening structure (e.g., layer, region) also may be present. A structure that is “directly on” or “in contact with” another structure means that no intervening structure is present.

Having thus described several aspects of at least one embodiment of this invention, it is to be appreciated various alterations, modifications, and improvements will readily occur to those skilled in the art. Such alterations, modifications, and improvements are intended to be part of this disclosure, and are intended to be within the spirit and scope of the invention. Accordingly, the foregoing description and drawings are by way of example only.

ILLUMINATION ASSEMBLY INCLUDING CHIP-SCALE PACKAGED LIGHT-EMITTING DEVICE

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