Patent Application
20080218617
The present invention relates to an image capturing apparatus provided with an image sensor to convert incident light to electric signals, and also relates to an image capturing method employing the image sensor.
Conventionally, an image capturing apparatus is provided with an image sensor to convert incident light to electric signals. Such the image sensor is capable of changing a conversion mode to the electric signals, based on intensity of the incident light. Concretely speaking, it is possible for such the image sensor to switchover the conversion mode between the linear conversion mode in which the incident light are linearly converted to the electric signals and the logarithmic conversion mode in which the incident light are logarithmically converted to the electric signals (for instance, set forth in Patent Document 1 and Patent Document 2).
According to the image sensor mentioned in the above, since the dynamic range of the electric signals can be widened, compared to that of another image sensor that can be operated only in the linear conversion mode, all of the luminance information can be represented by the electric signals, even when the subject to be captured has a wide luminance range.
In this connection, from the viewpoint for making the processing of the electric signals outputted from the image sensor easier, it is desirable that electric signals originated from a logarithmic conversion source (hereinafter, also referred to as electric signals of logarithmic conversion origin) are reconverted into those originated from a linear conversion source (hereinafter, also referred to as electric signals of linear conversion origin), so as to unify all of the concerned electric signals into those originated from the linear conversion source, and then, necessary processing are totally applied to the linearly-converted electric signals.
[Patent Document 1]
[Patent Document 2]
However, if the electric signals originated from the logarithmic conversion source are simply reconverted into those originated from the linear conversion source, the bit length, to be handled in the digital image processing thereafter, is widened, and therefore, a scale of the signal processing circuit becomes large.
The object of the present invention is to provide an image capturing apparatus and an image capturing method, in which the electric signals originated from the logarithmic conversion source are converted into those originated from the linear conversion source and which makes it possible to prevent the upsizing trend of the apparatus.
The invention recited in claim 1 is characterized in that,
in the image capturing apparatus, provided with: an image sensor having a plurality of pixels to convert incident light to electric signals by employing a plurality of characteristics, based on light amounts of them; and
a signal processing section to apply signal processing to the electric signals,
the signal processing section has:
According to the invention recited in claim 1, since the image capturing apparatus is provided with the linearization section to convert the electric signals outputted from the image sensor and originated from a plurality of characteristic conversion sources into the state linearly converted from the incident light, it becomes possible to convert the electric signals originated from the plurality of characteristic conversion sources into the state of linearly conversion origin. Further, since the image capturing apparatus is provided with the compression section to compress a predetermined range component of the electric signals outputted from the image sensor, it is possible to reduce the bit width of the digital signals to be processed in the following digital signal processing process, after the compression process is completed, compared to the conventional case in which the compressing process is not performed. Accordingly, it becomes possible not only to convert the electric signals originated from the plurality of characteristic conversion sources to those originated from the linear conversion source, but also to prevent the image capturing apparatus from upsizing.
The invention recited in claim 2 is characterized in that, in the image capturing apparatus recited in claim 1,
the plurality of characteristics are linear characteristics.
According to the invention recited in claim 2, since the image capturing apparatus is provided with the linearization section to convert the electric signals outputted from the image sensor and originated from a linear conversion source into the state linearly converted from the incident light, it becomes possible to convert the electric signals originated from the linear conversion source into the state of linearly conversion origin. Further, since the image capturing apparatus is provided with the compression section to compress a predetermined range component of the electric signals outputted from the image sensor, it is possible to reduce the bit width of the digital signals to be processed in the following digital signal processing process, after the compression process is completed, compared to the conventional case in which the compressing process is not performed. Accordingly, it becomes possible not only to convert the electric signals originated from the linear conversion source to those originated from the linear conversion source, but also to prevent the image capturing apparatus from upsizing.
The invention recited in claim 3 is characterized in that, in the image capturing apparatus recited in claim 1,
the plurality of characteristics are logarithmic characteristics.
According to the invention recited in claim 3, since the image capturing apparatus is provided with the linearization section to convert the electric signals outputted from the image sensor and originated from a logarithmic conversion source into the state linearly converted from the incident light, it becomes possible to convert the electric signals originated from the logarithmic conversion source into the state of linearly conversion origin. Further, since the image capturing apparatus is provided with the compression section to compress a predetermined range component of the electric signals outputted from the image sensor, it is possible to reduce the bit width of the digital signals to be processed in the following digital signal processing process, after the compression process is completed, compared to the conventional case in which the compressing process is not performed. Accordingly, it becomes possible not only to convert the electric signals originated from the logarithmic conversion source to those originated from the linear conversion source, but also to prevent the image capturing apparatus from upsizing.
The invention recited in claim 4 is characterized in that, in the image capturing apparatus recited in claim 1,
the plurality of characteristics are linear characteristics and logarithmic characteristics.
According to the invention recited in claim 4, since the image capturing apparatus is provided with the linearization section to convert the electric signals outputted from the image sensor and originated from both a linear conversion source and a logarithmic conversion source into the state linearly converted from the incident light, it becomes possible to convert the electric signals originated from both the linear conversion source and the logarithmic conversion source into the state of linearly conversion origin. Further, since the image capturing apparatus is provided with the compression section to compress a predetermined range component of the electric signals outputted from the image sensor, it is possible to reduce the bit width of the digital signals to be processed in the following digital signal processing process, after the compression process is completed, compared to the conventional case in which the compressing process is not performed. Accordingly, it becomes possible not only to convert the electric signals originated from both the linear conversion source and the logarithmic conversion source to those originated from the linear conversion source, but also to prevent the image capturing apparatus from upsizing.
The invention recited in claim 5 is characterized in that, in the image capturing apparatus recited in any one of claims 1-4,
the compression section compresses a high range component, which is equal to or greater than a predetermined signal value, among the electric signals outputted from the image sensor.
According to the invention recited in claim 5, since the compression section compresses the high range component, the component to be compressed can be easily extracted, and accordingly, it becomes possible to make the compressing operation easier, compared to the case in which a middle range component is to be compressed.
The invention recited in claim 6 is characterized in that, in the image capturing apparatus recited in claim 5,
the image capturing apparatus is provided with an AD converter to convert analogue signals outputted from the image sensor to digital signals; and
the predetermined signal value is a maximum output value of the AD converter.
According to the invention recited in claim 6, being different from such the case that the compressing operation is conducted at the boarder point between the component originated from linear conversion source and the other component originated from logarithmic conversion source, since the compression section compresses the component equal to or greater than the bit width of the AD converter, the boarder point, between the non-compressed component and the compressed component among, for instance, electric signals, is kept constant. Accordingly, it becomes possible to make the processing for the electric signals after compressed easy.
The invention recited in claim 7 is characterized in that, in the image capturing apparatus recited in any one of claims 1-6,
the image sensor switches a linear conversion mode, in which the incident light is linearly converted to the electric signals, and a logarithmic conversion mode, in which the incident light is logarithmically converted to the electric signals, to each other, based on an amount of the incident light; and
the linearization section converts electric signals generated by a logarithmic conversion into a state generated by a linear conversion.
According to the invention recited in claim 7, the image sensor switches the linear conversion mode, in which the incident light is linearly converted to the electric signals, and the logarithmic conversion mode, in which the incident light is logarithmically converted to the electric signals, to each other. It is possible to obtain an effect same as that obtained according to the invention recited in any one of claims 1-6.
The invention recited in claim 8 is characterized in that, in the image capturing apparatus recited in any one of claims 1-7,
the compression section compresses the predetermined range component to ½N (N represents positive integer equal to or greater than 1) times.
According to the invention recited in claim 8, since the compression section compresses the predetermined range component to ½N times, it is possible to employ the bit shift method for the compression processing. Accordingly, compared to the case in which the predetermined range component is divided by a value being different from an exponent of 2, it becomes possible not only to make the compression processing easy, but also to miniaturize the scale of the compression section.
The invention recited in claim 9 is characterized in that, in the image capturing apparatus recited in any one of claims 1-8,
the compression section compresses the predetermined range component so that a linear coefficient between electric signals expanded thereafter and the incident light is kept constant all over a variable range of the incident light amount, when compressed electric signals are expanded up to 2N times (N represents positive integer equal to or greater than 1).
In this connection, the linear coefficient between the electric signals and the incident light represents an inclination of the straight line indicating the relationship between the electric signals and the incident light.
According to the invention recited in claim 9, since the linear coefficient between the electric signals and the incident light is kept constant all over the variable range of the incident light amount, when compressed electric signals are expanded up to 2N times, being different from such the case that the linear coefficient varies, it becomes possible to apply the same processing to all of the electric signals concerned. Accordingly, it becomes possible to make the processing after expanded easy.
The invention recited in claim 10 is characterized in that, in the image capturing apparatus recited in any one of claims 1-9,
the compression section compresses the predetermined range component by employing a bit shift method.
According to the invention recited in claim 10, since the compression section compresses the predetermined range component by employing the bit shift method, it becomes possible not only to make the compression processing easy, but also to miniaturize the scale of the compression section, compared to the case in which the compression section compresses the predetermined range component by employing a method other than the bit shift method.
The invention recited in claim 11 is characterized in that, in the image capturing apparatus recited in any one of claims 1-9,
the signal processing section is provided with a Look Up Table, serving as the linearization section and the compression section, which converts the electric signals outputted from the image sensor into a state generated from the incident light by a linear conversion and compresses the predetermined range component after conversion.
According to the invention recited in claim 11, since the signal processing section is provided with the Look Up Table, serving as the linearization section and the compression section, it becomes possible to miniaturize the scale of the signal processing section, compared to that in such a case that arithmetic calculation circuits are provided as the linearization section and the compression section.
The invention recited in claim 12 is characterized in that, in the image capturing apparatus recited in any one of claims 1-11,
the image capturing apparatus is further provided with:
an arithmetic calculation processing section to conduct an arithmetic calculation processing, based on the electric signals outputted from the signal processing section; and
an expansion section, to expand the predetermined range component compressed by the compression section so as to convert them into a state before compressed, is disposed between the signal processing section and the arithmetic calculation processing section.
According to the invention recited in claim 11, since the expansion section, to expand the predetermined range component compressed by the compression section so as to convert them into a state before compressed, is disposed between the signal processing section and the arithmetic calculation processing section, the linear coefficient between the electric signals to be processed in the arithmetic calculation processing section and the incident light is kept constant all over a variable range of the incident light amount. Accordingly, being different from such the case that the linear coefficient varies, since the same processing can be applied to all of the electric signals after expanded, it becomes possible not only to make the arithmetic calculation processing to be conducted in the arithmetic calculation processing section easy, but also to miniaturize the scale of the arithmetic calculation processing section.
The invention recited in claim 13 is characterized in that, in the image capturing apparatus recited in claim 12,
the expansion section expands the predetermined range component, compressed by the compression section, to 2N (N represents positive integer equal to or greater than 1) times, by employing a bit shift method.
According to the invention recited in claim 13, it becomes possible to obtain the effect similar to that obtained by the invention recited in claim 12.
The invention recited in claim 14 is characterized in that, in the image capturing apparatus recited in claim 12 or claim 13,
the image capturing apparatus is further provided with:
an exposure control processing section to adjust an exposure amount for the image sensor, based on a calculating result of the arithmetic calculation processing section.
According to the invention recited in claim 14, even when the arithmetic calculation processing section calculates the evaluation value for adjusting the exposure amount for the image sensor, it becomes possible to obtain the effect similar to that obtained by the invention recited in claim 12 or claim 13.
The invention recited in claim 15 is characterized in that, in the image capturing apparatus recited in any one of claims 12-14,
a white balance processing section to conduct a white balance processing of a captured image, based on a calculating result of the arithmetic calculation processing section.
According to the invention recited in claim 15, even when the arithmetic calculation processing section calculates the evaluation value for conducting a white balance processing, it becomes possible to obtain the effect similar to that obtained by the invention recited in any one of claims 12-14.
The invention recited in claim 16 is characterized in that,
in the image capturing method, provided with:
an photoelectric converting process for photo-electrically converting incident light to electric signals by employing an image sensor having a plurality of pixels to convert the incident light to the electric signals by employing a plurality of characteristics, based on light amounts of them; and
a signal processing process for applying signal processing to the electric signals; and characterized in that
the signal processing process is provided with:
According to the invention recited in claim 16, by converting the electric signals outputted from the image sensor and originated from a plurality of characteristic conversion sources into the state linearly converted from the incident light, it becomes possible to convert the electric signals originated from the plurality of characteristic conversion sources into the state of linearly conversion origin. By compressing a predetermined range component of the electric signals outputted from the image sensor, it is possible to reduce the bit width of the digital signals to be processed in the following digital signal processing process, after the compression process is completed, compared to the conventional case in which the compressing process is not performed. Accordingly, it becomes possible not only to convert the electric signals originated from the plurality of characteristic conversion sources to those originated from the linear conversion source, but also to prevent the image capturing apparatus from upsizing.
The invention recited in claim 17 is characterized in that, in the image capturing method recited in claim 16,
the plurality of characteristics are linear characteristics.
According to the invention recited in claim 17, by converting the electric signals outputted from the image sensor and originated from a plurality of linear conversion sources into the state linearly converted from the incident light, it becomes possible to convert the electric signals originated from the plurality of linear conversion sources into the state of linearly conversion origin. By compressing a predetermined range component of the electric signals outputted from the image sensor, it is possible to reduce the bit width of the digital signals to be processed in the following digital signal processing process, after the compression process is completed, compared to the conventional case in which the compressing process is not performed. Accordingly, it becomes possible not only to convert the electric signals originated from the plurality of linear conversion sources to those originated from the linear conversion source, but also to prevent the image capturing apparatus from upsizing.
The invention recited in claim 18 is characterized in that, in the image capturing method recited in claim 16,
the plurality of characteristics are logarithmic characteristics.
According to the invention recited in claim 18, by converting the electric signals outputted from the image sensor and originated from a plurality of logarithmic conversion sources into the state linearly converted from the incident light, it becomes possible to convert the electric signals originated from the plurality of logarithmic conversion sources into the state of linearly conversion origin. By compressing a predetermined range component of the electric signals outputted from the image sensor, it is possible to reduce the bit width of the digital signals to be processed in the following digital signal processing process, after the compression process is completed, compared to the conventional case in which the compressing process is not performed. Accordingly, it becomes possible not only to convert the electric signals originated from the plurality of logarithmic conversion sources to those originated from the linear conversion source, but also to prevent the image capturing apparatus from upsizing.
The invention recited in claim 19 is characterized in that, in the image capturing method recited in claim 16,
the plurality of characteristics are linear characteristics and logarithmic characteristics.
According to the invention recited in claim 19, by converting the electric signals outputted from the image sensor and originated from both a linear conversion source and a logarithmic conversion source into the state linearly converted from the incident light, it becomes possible to convert the electric signals originated from both the linear conversion source and the logarithmic conversion source into the state of linearly conversion origin. By compressing a predetermined range component of the electric signals outputted from the image sensor, it is possible to reduce the bit width of the digital signals to be processed in the following digital signal processing process, after the compression process is completed, compared to the conventional case in which the compressing process is not performed. Accordingly, it becomes possible not only to convert the electric signals originated from both the linear conversion source and the logarithmic conversion source to those originated from the linear conversion source, but also to prevent the image capturing apparatus from upsizing.
The invention recited in claim 20 is characterized in that, in the image capturing method recited in any one of claims 16-19,
a high range component, which is equal to or greater than a predetermined signal value, among the electric signals outputted from the image sensor, is compressed in the compressing process.
According to the invention recited in claim 20, since the compression section compresses the high range component, the component to be compressed can be easily extracted, and accordingly, it becomes possible to make the compressing operation easier, compared to the case in which a middle range component is to be compressed.
The invention recited in claim 21 is characterized in that, in the image capturing method recited in claim 20,
the image capturing method is provided with an AD converting process for converting analogue signals outputted from the image sensor to digital signals by employing an AD converter; and
a maximum output value of the AD converter is used as the predetermined signal value in the compressing process.
According to the invention recited in claim 21, being different from such the case that the compressing operation is conducted at the boarder point between the component originated from linear conversion source and the other component originated from logarithmic conversion source, since the compression section compresses the component equal to or greater than the bit width of the AD converter, the boarder point, between the non-compressed component and the compressed component among, for instance, electric signals, is kept constant. Accordingly, it becomes possible to make the processing for the electric signals after compressed easy.
The invention recited in claim 22 is characterized in that, in the image capturing method recited in any one of claims 16-21,
a member, for switching a linear conversion mode, in which the incident light is linearly converted to the electric signals, and a logarithmic conversion mode in which the incident light is logarithmically converted to the electric signals, to each other, based on an amount of the incident light, is employed as the image sensor; and
electric signals generated by a logarithmic conversion are converted into a state generated by a linear conversion in the linearizing process.
According to the invention recited in claim 22, even when the member, for switching the linear conversion mode, in which the incident light is linearly converted to the electric signals, and the logarithmic conversion mode in which the incident light is logarithmically converted to the electric signals, to each other, is employed as the image sensor, it is possible to obtain an effect same as that obtained according to the invention recited in any one of claims 1-6.
The invention recited in claim 23 is characterized in that, in the image capturing method recited in any one of claims 16-22,
the predetermined range component is compressed to ½N (N represents positive integer equal to or greater than 1) times in the compressing process.
According to the invention recited in claim 23, by compressing the predetermined range component to ½N times, it is possible to employ the bit shift method for the compression processing. Accordingly, compared to the case in which the predetermined range component is divided by a value being different from an exponent of 2, it becomes possible not only to make the compression processing easy, but also to miniaturize the scale of the compression section.
The invention recited in claim 24 is characterized in that, in the image capturing method recited in any one of claims 16-23,
the predetermined range component is compressed so that a linear coefficient between electric signals expanded thereafter and the incident light is kept constant all over a variable range of the incident light amount, when compressed electric signals are expanded by multiplying by 2N (N represents positive integer equal to or greater than 1).
According to the invention recited in claim 24, when compressed electric signals are expanded up to 2N times, the linear coefficient between the electric signals and the incident light is kept constant all over the variable range of the incident light amount. Accordingly, being different from such the case that the linear coefficient varies, it becomes possible to apply the same processing to all of the electric signals concerned. Accordingly, it becomes possible to make the processing after expanded easy.
The invention recited in claim 25 is characterized in that, in the image capturing method recited in any one of claims 16-24,
the predetermined range component is compressed by employing a bit shift method in the compressing process.
According to the invention recited in claim 10, by compressing the predetermined range component by employing the bit shift method, it becomes possible not only to make the compression processing easy, but also to miniaturize the scale of the compression section, compared to the case in which a method other than the bit shift method is employed for compressing the predetermined range component.
The invention recited in claim 26 is characterized in that, in the image capturing method recited in any one of claims 16-24,
the linearizing process and the compressing process are conducted in the signal processing process by employing a Look Up Table, which converts the electric signals outputted from the image sensor into a state generated from the incident light by a linear conversion and compresses the predetermined range component after conversion.
According to the invention recited in claim 26, by employing the Look Up Table for conducting the linearizing process and the compression process, it becomes possible to miniaturize the scale of the signal processing section, compared to that in such a case that arithmetic calculation circuits are employed in the linearizing process and the compression process.
The invention recited in claim 27 is characterized in that, in the image capturing method recited in any one of claims 16-26,
the image capturing method is further provided with:
an arithmetic calculation process for conducting an arithmetic calculation processing, based on the electric signals processed in the signal processing process; and
an expanding process, for expanding the predetermined range component compressed in the compressing process so as to convert them into a state before compressed, is conducted between the signal processing process and the arithmetic calculation process.
According to the invention recited in claim 27, by conducting the expanding process, for expanding the predetermined range component compressed in the compressing process so as to convert them into a state before compressed, between the signal processing process and the arithmetic calculation process, the linear coefficient between the electric signals to be processed in the arithmetic calculation processing process and the incident light is kept constant all over a variable range of the incident light amount. Accordingly, being different from such the case that the linear coefficient varies, since the same processing can be applied to all of the electric signals after expanded, it becomes possible not only to make the arithmetic calculation processing to be conducted in the arithmetic calculation processing process easy, but also to miniaturize the scale of the apparatus to be used for the arithmetic calculation processing.
The invention recited in claim 28 is characterized in that, in the image capturing method recited in claim 27,
the predetermined range component compressed in the compressing process is expanded by 2N (N represents positive integer equal to or greater than 1) times, by employing a bit shift method in the expanding process.
According to the invention recited in claim 28, it becomes possible to obtain the effect similar to that obtained by the invention recited in claim 27.
The invention recited in claim 29 is characterized in that, in the image capturing method recited in claim 27 or claim 28,
the image capturing method is further provided with:
an exposure controlling process for adjusting an exposure amount for the image sensor, based on a calculating result calculated in the arithmetic calculation process.
According to the invention recited in claim 29, even when the evaluation value for adjusting the exposure amount for the image sensor is calculated in the arithmetic calculation processing process, it becomes possible to obtain the effect similar to that obtained by the invention recited in claim 27 or claim 28.
The invention recited in claim 30 is characterized in that, in the image capturing method recited in any one of claims 27-29,
the image capturing method is further provided with:
a white balance processing process for conducting a white balance processing of a captured image, based on a calculating result calculated in the arithmetic calculation process.
According to the invention recited in claim 30, even when the evaluation value for conducting a white balance processing is calculated in the arithmetic calculation processing process, it becomes possible to obtain the effect similar to that obtained by the invention recited in any one of claims 27-29.
According to the invention recited in claim 1 or claim 16, it becomes possible not only to convert the electric signals originated from the plurality of characteristic conversion sources into the state of linearly conversion origin, but also to prevent the image capturing apparatus from upsizing.
According to the invention recited in claim 2 or claim 17, it becomes possible not only to convert the electric signals originated from the linear conversion source into the state of linearly conversion origin, but also to prevent the image capturing apparatus from upsizing.
According to the invention recited in claim 3 or claim 18, it becomes possible not only to convert the electric signals originated from the logarithmic conversion source into the state of linearly conversion origin, but also to prevent the image capturing apparatus from upsizing. According to the invention recited in claim 4 or claim 19, it becomes possible not only to convert the electric signals originated from the linear conversion sources and the logarithmic conversion source into the state of linearly conversion origin, but also to prevent the image capturing apparatus from upsizing.
According to the invention recited in claim 5 or claim 20, it is needless to say that it becomes possible to obtain the effect similar to that obtained by the invention recited in any one of claims 1-4 or any one of claims 16-19. In addition, it also becomes possible to make the compressing operation easy.
According to the invention recited in claim 6 or claim 21, it is needless to say that it becomes possible to obtain the effect similar to that obtained by the invention recited in claim 5 or claim 20. In addition, it also becomes possible to make the processing for the electric signals after compressed easy.
According to the invention recited in claim 7 or claim 22, it becomes possible to obtain the effect similar to that obtained by the invention recited in any one of claims 1-6 or any one of claims 16-22.
According to the invention recited in claim 8 or claim 23, it is needless to say that it becomes possible to obtain the effect similar to that obtained by the invention recited in any one of claims 1-7 or any one of claims 16-22. In addition, it also becomes possible not only to make the compressing operation easy, but also to miniaturize the scale of the apparatus to be used for the compressing operation (compressing section).
According to the invention recited in claim 9 or claim 24, it is needless to say that it becomes possible to obtain the effect similar to that obtained by the invention recited in any one of claims 1-8 or any one of claims 16-23. In addition, it also becomes possible to make the processing after expanded easy.
According to the invention recited in claim 10 or claim 25, it is needless to say that it becomes possible to obtain the effect similar to that obtained by the invention recited in any one of claims 1-9 or any one of claims 16-24. In addition, it also becomes possible not only to make the compressing operation easy, but also to miniaturize the scale of the apparatus to be used for the compressing operation (compressing section).
According to the invention recited in claim 11 or claim 26, it is needless to say that it becomes possible to obtain the effect similar to that obtained by the invention recited in any one of claims 1-9 or any one of claims 16-24. In addition, it also becomes possible to miniaturize the scale of the apparatus to be used for the signal processing operation (signal processing section).
According to the invention recited in claim 12 or claim 27, it is needless to say that it becomes possible to obtain the effect similar to that obtained by the invention recited in any one of claims 1-11 or any one of claims 16-26. In addition, it becomes possible not only to make the arithmetic calculation processing to be conducted in the arithmetic calculation processing process easy, but also to miniaturize the scale of the apparatus to be used for the arithmetic calculation processing operation (arithmetic calculation processing section).
According to the invention recited in any one of claims 13-15 or any one of claims 28-30, it becomes possible to obtain the effect similar to that obtained by the invention recited in claim 12 or claim 27.
FIG. 1 shows a block diagram indicating a brief configuration of an image capturing apparatus embodied in the present invention.
FIG. 2 shows a block diagram indicating a configuration of an image sensor.
FIG. 3 is a drawing for explaining operations of pixels and a signal processing section.
FIG. 4 shows a circuit diagram indicating a configuration of each pixel.
FIG. 5 shows a timing chart indicating an operation for resetting pixels.
FIG. 6 is a drawing for explaining operations of an evaluation value calculating section.
FIG. 7 is a drawing indicating a relationship between a difference of signal φVPS and a conversion mode.
FIG. 8 is a drawing indicating a processing for signals outputted from a signal processing section.
FIG. 9 is a drawing indicating a Look Up Table.
Referring to the drawings, the embodiment of the present invention will be detailed in the following.
FIG. 1 shows a block diagram indicating a brief configuration of an image capturing apparatus 1 embodied in the present invention.
As shown in FIG. 1, the image capturing apparatus 1 is provided with an image sensor 2 that receives incident light coming through a lens group 10 and an aperture 11. Conventionally available lenses and aperture element are employed as the lens group 10 and the aperture 11.
As shown in FIG. 2, the image sensor 2 is provided with a plurality of pixels G11-Gmn (n, m: positive integer equal to or greater than 1), which are two-dimensionally aligned on a matrix plane.
Each of the plurality of pixels G11-Gmn performs an photo-electric converting action so as to output electric signals converted from incident light. Each of the pixels G11-Gmn is capable of changing a conversion mode to the electric signals, based on intensity of the incident light. Concretely speaking, it is possible for each of the pixels G11-Gmn to switchover the conversion mode between the linear conversion mode in which the incident light are linearly converted to the electric signals and the logarithmic conversion mode in which the incident light are logarithmically converted to the electric signals. In this embodiment, each of the pixels G11-Gmn conduct the linear conversion mode when intensity of the incident light currently received is smaller than a predetermined incident-light intensity th, while conduct the logarithmic conversion mode when intensity of the incident light currently received is equal to or greater than the predetermined incident-light intensity th, as shown in FIG. 3(a). Incidentally, hereinafter in the embodiment of the present invention, the term of “to linearly or logarithmically convert incident light into electric signals” is to linearly or logarithmically convert a time integral value of light amount into electric signals.
A unicolor filter (not shown in the drawings), serving as any one of a red filter, a green filter and a blue filter, is disposed on a surface of each of the pixels G11-Gmn, opposing to the lens group 10. Further, as shown in FIG. 2, a power source line 20, signal applying lines LA1-LAn, LB1-LBn and LC1-LCn, signal reading lines LD1-LDn are coupled to the pixels G11-Gmn, respectively. Still further, although other various kinds of lines, such as a clock line, a bias supplying line, etc., are also coupled to the pixels G11-Gmn, respectively, such the lines are not shown in FIG. 2.
Signals φV, φVD, φVPS (refer to FIG. 4 and FIG. 5) are applied to each of the pixels G11-Gmn, through the signal applying lines LA1-LAn, LB1-LBn and LC1-LCn. Further, the signal applying lines LA1-LAn, LB1-LBn and LC1-LCn are coupled to a vertical scanning circuit 21. The vertical scanning circuit 21 applies the signals to the signal applying lines LA1-LAn, LB1-LBn and LC1-LCn, based on signals sent from a signal generating circuit 48 detailed later (refer to FIG. 1), while sequentially changing the objective signal lines onto which the current signal is to be applied, in the X direction shown in FIG. 2, among the signal applying lines LA1-LAn, LB1-LBn and LC1-LCn.
The electric signal generated in each of the pixels G11-Gmn is outputted onto the signal reading lines LD1-LDn. Further, constant current sources D1-Dm and selection circuits S1-Sm are coupled to the signal reading lines LD1-LDn.
A DC voltage VPS is applied to terminal ends (lower ends shown in FIG. 2) of the constant current sources D1-Dm.
Each of the selection circuits S1-Sm samples and holds both a nose signal and an electric signal acquired in the image capturing operation, outputted from each of the pixels G11-Gmn, through each of the signal reading lines LD1-LDn. The selection circuits S1-Sm are coupled to a horizontal scanning circuit 22 and a correction circuit 23. The horizontal scanning circuit 22 sequentially changes the selection circuits S1-Sm, each of which samples and holds the electric signal and transmits it to the correction circuit 23, in the Y direction shown in FIG. 2. Further, the correction circuit 23 removes the nose component from the electric signals concerned, based on the nose signals and the electric signals acquired in the image capturing operation, both of which are transmitted from the selection circuits S1-Sm.
In this connection, the selection circuits and the correction circuit, both set forth in Tokkai 2001-223948 (Japanese Non-Examined Patent Publication), can be also employed as the selection circuits S1-Sm and the correction circuit 23 of the present embodiment, respectively. Further, although the following explanation is based on an assumption that only a single set of the correction circuit 23 is provided for the overall configuration of the selection circuits S1-Sm, it is also applicable that plural correction circuits 23 are provided, so that each of the plural correction circuits 23 corresponds to each of the selection circuits S1-Sm.
As shown in FIG. 1, the image sensor 2, an amplifier 12, an analogue-to-digital converter 13 (hereinafter, referred to as AD converter 13, for simplicity), a black-reference level setting section 14 and a signal processing section 3 are serially cascaded with each other in this order. Further, in this embodiment, the bit length of the digital signals to be outputted from the AD converter 13 is set at 12 bits, as shown in FIG. 3(a).
A role of the black-reference level setting section 14 is to establish the lowest level of the digital signals.
The signal processing section 3 is provided with a linearization section 30 and a compression section 31, so as to apply signal processing to the electric signals outputted from each of the pixels G11-Gmn.
As shown in FIG. 3(a), a role of the linearization section 30 is to convert electric signals generated in the logarithmic conversion mode, among all of the electric signals outputted from the image sensor 2, into those generated in the linear conversion mode, namely those originated from a linear conversion source. In this connection, it is possible for the linearization section 30 to employ either a LUT (Look Up Table) or a calculation method, such as an exponential conversion method or the like, for conducting the abovementioned conversion processing. Further, in this embodiment, the total bit length of the digital signals processed in the linearization section 30 is set at 24 bits.
As shown in FIG. 3(a), a role of the compression section 31 is to compress a predetermined range component corresponding to a predetermined signal-value range among the electric signals outputted from the linearization section 30, namely, a high range component being equal to or greater than the bit length of the AD converter 13 in the present embodiment.
As shown in FIG. 1, an image processing section 4 is coupled to the signal processing section 3.
The processing section 4 is provided with an automatic white balance processing section 40 (hereinafter, referred to as AWB processing section 40, for simplicity), a color interpolating section 41, a color correction section 42, a gradation conversion section 43 and a color space converting section 44, so as to apply various kinds of image processing to the image data constituted by the overall electric signals outputted from the pixels G11-Gmn. Succeeding to the signal processing section 3, the AWB processing section 40, the color interpolating section 41, the color correction section 42, the gradation conversion section 43 and the color space converting section 44 are serially cascaded in this order.
The AWB processing section 40 applies a white balance processing to the image data, while the color interpolating section 41 performs a color interpolating calculation with respect to a color of a specific pixel positioned in the vicinity of plural adjacent pixels to which filters having the same color are attached, based on electric signals outputted from the plural adjacent pixels. A role of the color correction section 42 is to correct a color appearance to be represented by the image data, and more specifically, to conduct the operation for correcting an electric signal of each color for every pixel, based on electric signals of other colors. The gradation conversion section 43 conducts gradation conversion processing of the image data, while the color space converting section 44 converts the RGB signals to the YCbCr signals.
Further, the signal processing section 3, an evaluation value calculating section 5 and a control apparatus 46 are serially cascaded with each other in this order.
The evaluation value calculating section 5 is provided with an expansion section 50 and an arithmetic calculation processing section 51.
As shown in FIG. 6, the expansion section 50 expands the high range component previously compressed by the compression section 31 of the signal processing section 3, so as to resume its original state before compressed. In this connection, the high range component outputted from the expansion section 50 after expanded and the low range component bypassing the expansion section 50 without being expanded are added to each other at the mid-point between the expansion section 50 and the arithmetic calculation processing section 51.
Further, the arithmetic calculation processing section 51 is provided with an AWB evaluation value calculating circuit 52, a compression section 53 and an AE evaluation value calculating circuit 54.
The AWB evaluation value calculating circuit 52 calculates an AWB evaluation value to be employed for the white balance processing (AWB processing) conducted in the AWB processing section 40. The compression section 53 compresses the electric signals, and, in this embodiment, employs the bit sift method so as to multiply the electric signals by ½12. The AE evaluation value calculating circuit 54 calculates an AE evaluation value to be employed for the exposure control processing (AE processing) conducted in an exposure control processing section 47.
The control apparatus 46 controls each of the sections incorporated in the image capturing apparatus 1. Accordingly, as shown in FIG. 1, the amplifier 12, the black-reference level setting section 14, the AWB processing section 40, the color interpolating section 41, the color correction section 42, the gradation conversion section 43 and the color space converting section 44, which are aforementioned, are coupled to the control apparatus 46. Further, the aperture 11 is also coupled to the control apparatus 46 through the exposure control processing section 47, while the image sensor 2 and the AD converter 13 are also coupled to the control apparatus 46 through a signal generating section 48.
Successively, the pixels G11-Gmn defined in the present embodiment will be detailed in the following.
As shown in FIG. 4, each of the pixels G11-Gmn is constituted by a photodiode P, transistors T1-T6 and a capacitor C. In this connection, the transistors T1-T6 are P channel MOS transistors.
The light passing through the lens group 10 and the aperture 11 is projected onto the photodiode P. A DC voltage VPD is applied onto a cathode PK of the photodiode P, while a drain T1D of the transistor T1 is coupled to an anode PA of the photodiode P.
A signals φS is inputted into a gate T1G of the transistor T1, while a gate T2G and a drain T2D of the transistor T2 is coupled to a source T1S of the transistor T1.
A source T2S of the transistor T2 is coupled to a signal applying line Lc (equivalent to the signal applying lines LC1-LCn shown in FIG. 2), so that the signal φVPS is inputted into the transistor T2 from the signal applying line Lc. In this connection, as shown in FIG. 5, the signal φVPS is a binary voltage signal, and more specifically, the signal φVPS includes two voltage values, including a voltage value VL for operating the transistor T2 in the sub-threshold region when an intensity of incident light exceeds the predetermined incident-light intensity th, and a voltage value VH for making the transistor T2 act as ON-state (conductive state).
Further, a gate T3G of the transistors T3 is coupled to the source T1S of the transistor T1.
Still further, the DC voltage VPD is applied to a drain T3D of the transistors T3. Yet further, a port of the capacitor C, a drain T5D of the transistors T5 and a gate T4G of the transistors T4 are coupled to a source T3S of the transistors T3.
Another port of the capacitor C is coupled to a signal applying line LB (equivalent to the signal applying lines LB1-LBn shown in FIG. 2), so that the signal φVD is inputted into the transistors T2 from the signal applying line LB. In this connection, as shown in FIG. 5, the signal φVD is a ternary voltage signal, and more specifically, the signal φVD includes three voltage values, including a voltage value Vh to be employed when making the capacitor C conduct an integrating operation, a voltage value Vm to be employed when reading out the photo-electrically converted electric signals and a voltage value V1 to be employed when reading out the noise signals.
Further, a DC voltage VRG is applied to a source T5S of the transistor T5 and a signals φRS is applied to a gate T5G of the transistor T5.
Still further, the DC voltage VPD is applied to a drain T4D of the transistor T4, as well as the drain T3D of the transistor T3. Yet further, a drain T6D of the transistor T6 is coupled to a source T4S of the transistor T4.
The source T6S of the transistor T6 is coupled to a signal reading line LD (equivalent to the signal reading lines LD1-LDn shown in FIG. 2), while the signal φV is inputted into a gate T6G of the transistor T6 from the signal applying line LA (equivalent to the signal applying lines LA1-LAn shown in FIG. 2).
Successively, the pixels G11-Gmn and the operations of the vertical scanning circuit 21 will be detailed in the following.
At first, the vertical scanning circuit 21 conducts resetting operations of the pixels G11-Gmn, as shown in FIG. 5.
Concretely speaking, the vertical scanning circuit 21 applies the pulse signal φV, and the pulse signal φVD of the voltage value Vm onto the pixels G11-Gmn in the state that the signal φs is a low level (hereinafter, referred to as “L”), the signal φV is a high level (hereinafter, referred to as “H”), the signal φVPS is equal to voltage value VL, the signal φRS is “H” and the signal φVPS is equal to voltage value VL, so as to output the electric signals onto the signal reading lines LD1-LDn. Then, the vertical scanning circuit 21 turns the signal φs to “H”, so as to turn OFF the transistor T1.
Next, the vertical scanning circuit 21 turns the signal φVPS to voltage value VL, so as to resume the original potential state of the transistor T2, and then, turns the signal φRS to “H”, so as to turn OFF the transistor T5. Successively, the capacitor C performs the integrating action, so that the voltage at the connection node between the capacitor C and the gate T4G of the transistor T4 corresponds to the gate voltage of the transistor T2, which is currently reset.
Next, the vertical scanning circuit 21 applies the pulse signal φV to the gate T6G of the transistor T6, to turn ON the transistor T6, and, at the same time, applies the pulse signal φVD of the voltage value V1 to the capacitor C. On this occasion, since the transistor T4 serves as a source follower of MOS transistor, the noise signals emerge on the signal reading line LD as voltage signals.
Successively, the vertical scanning circuit 21 applies the pulse signal φRS to the gate T5G of the transistor T5, in order to reset the voltage at the connection node between the capacitor C and the gate T4G of the transistor T4, and then, turns the signal φS to “L”, so as to turn ON the transistor T1. After that, the resetting operation is completed and the pixels G11-Gmn are enters in the state capable of capturing an image.
Next, the pixels G11-Gmn conduct the image capturing operations.
Concretely speaking, the photoelectronic charges, corresponding to the intensity of the incident light, flow into the transistor T2 from the photodiode P and are accumulated into the gate T2G of the transistor T2.
In this connection, since the transistor T2 is in a cut-off state when the luminance of the subject is low, and the intensity of the incident light to be projected onto the photodiode P is smaller than the predetermined incident-light intensity th, the voltage, corresponding to the photoelectronic charges accumulated at the gate T2G of the transistor T2, emerges at the gate T2G. Accordingly, the voltage linearly converted from the incident light emerges at the gate T3G of the transistor T3.
On the other hand, when the luminance of the subject is high, and the intensity of the incident light to be projected onto the photodiode P is greater than the predetermined incident-light intensity th, the transistor T2 is operated in the sub-threshold region. Accordingly, the voltage natural-logarithmically converted from the incident light emerges at the gate T3G of the transistor T3.
Incidentally, in the present embodiment, over all of the pixels G11-Gmn, the predetermined incident-light intensity th is set at the same value.
When the voltage emerges on the gate T3G of the transistor T3, the current flowing from the capacitor C to the drain T3D of the transistor T3, is amplified corresponding to the above voltage. Therefore, the voltage either linearly or logarithmically converted from the incident light emerges on the gate T4G of the transistor T4.
Successively, the vertical scanning circuit 21 sets the voltage value of the signal φVD at Vm, and, at the same time, turns the signal φV to “L”. Then, the source current corresponding to the voltage on the gate T4G of the transistor T4 flows onto the signal reading lines LD through the transistor T4. On this occasion, since the transistor T4 serves as a source follower of MOS transistor, the electric signals at the time of image capturing operation emerge on the signal reading line LD as voltage signals. In this connection, since the signal value of the electric signal outputted through the transistors T4 and T6 is in proportion to the gate voltage of the transistors T4, the concerned voltage is such a voltage that is either linearly or logarithmically converted from the incident light projected onto the photodiode P.
Finally, the vertical scanning circuit 21 sets the signal φVD at Vh, and, at the same time, turns the signal φV to “H”, so as to finalize the image capturing operation.
In this connection, when the pixels G11-Gmn are operated in the manner mentioned in the foregoing, the greater the difference between the voltage value VL and the reset voltage value VH becomes and/or the shorter the time interval from the completion of the resetting operation to the commencement of the image capturing operation becomes, the greater the potential difference between the gate T2G and the source T2S of the transistor T2 becomes in order of “I” to “V” as shown in FIG. 7. In other words, the ratio of subject luminance for which the transistor T2 is operated in its cutoff state, namely, the ratio of subject luminance to be linearly converted is getting large. Incidentally, the graph shown in FIG. 7 is the single logarithm graph, the vertical line of which is represented by the logarithmic value.
Accordingly, by varying the voltage values VL and VH of the signal φVPS and/or by varying the time interval from the completion of the resetting operation to the commencement of the image capturing operation, it becomes possible to control the conversion point serving as the border between the linear conversion mode and the logarithmic conversion mode, namely, the predetermined incident-light intensity th. Concretely speaking, for instance, by setting the voltage value VL at a low level so as to widen the luminance range in which the incident light is to be linearly converted, when the luminance range of the subject is narrow, or by setting the voltage values VL at a high level so as to widen the luminance range in which the incident light is to be logarithmically converted, when the luminance range of the subject is wide, it is possible to match the photoelectric conversion characteristics of the pixels G11-Gmn with the characteristics of the subject. Further, it is also possible to always place the pixels G11-Gmn on the linearly converting state when the voltage value VL is set at the minimum level (refer to “I” shown in FIG. 7), while it is also possible to always place the pixels G11-Gmn on the logarithmically converting state when the voltage value VL is set at the maximum level (refer to “V” shown in FIG. 7).
Successively, the image capturing method embodied in the present invention will be detailed in the following. In the following explanation, it is assumed that the incident light projected onto the pixels G11-Gmn is greater than the predetermined incident-light intensity th, and the image sensor 2 is operated in the logarithmic conversion mode.
At first, the image sensor 2 photo-electrically converts the incident light projected onto the pixels G11-Gmn to electric signals, and outputs the electric signals originated from the logarithmic conversion source as analogue signals (photoelectric conversion process). Concretely speaking, as described in the foregoing, when each of the pixels G11-Gmn outputs the electric signal onto the signal reading lines LD, the constant current source D amplifies the electric signal, and then, the selection circuit S sequentially samples and holds the amplified electric signal. Further, when the sampled-and-held electric signal is inputted into the correction circuit 23 from the selection circuit S, the correction circuit 23 removes noises from the electric signals to output the processed electric signals.
Next, the amplifier 12 amplifies the analogue signals outputted from the image sensor 2, and then, the AD converter 13 converts the amplified analogue signals to the digital signals (analogue-to-digital conversion process).
Next, the black-reference level setting section 14 establishes the lowest level of the digital signals, and then, the signal processing section 3 conducts the signal processing (signal processing process). Concretely speaking, as indicated by the arrow Z shown in FIG. 3(a), the linearization section 30 converts the digital signals to linearized digital signals in a state of linear conversion origin (linearizing process). Further, as indicated by the arrow W shown in FIG. 3(a), the compression section 31 employs the bit sift method, in order to compress the component equal to or greater than the bit width of the AD converter 13, namely, the upper 12-bits component of the linearized digital signals, serving as the aforementioned high range component of the electric signals, to compressed component of 4-bits width by multiplying them by ½8 (compression process).
According to the above, the bit width of the digital signals to be processed in the following process, detailed later, becomes small, compared to the conventional method in which the compression process is not applied. Further, the compression process is made to be easier and the scale of the compression section 31 can be miniaturized, compared to the conventional case in which the high range component is compressed by employing a method being different from the bit sift method. Still further, being different from such the case that the compression processing is applied to the component equal to or greater than the signal value corresponding to the predetermined incident-light intensity th, the boarder point, between the non-compressed component and the compressed component among, for instance, electric signals, is kept constant.
Next, as shown in FIG. 6, the expansion section 50 of the evaluation value calculating section 5 expands the high range component compressed by the compression section 31 from 4-bits width to 12-bits width by employing the bit sift method (expanding process). Then, the expanded high range component is combined with the low range component, namely, the lower 12-bits width electric signals, so as to generate 24-bits width electric signals. As a result, the linear coefficient between the electric signals and the incident light is kept constant over the total range of the incident light.
Successively, based on the combined 24-bits width electric signals, the AWB evaluation value calculating circuit 52, the compression section 53 and the AE evaluation value calculating circuit 54, which are included in the arithmetic calculation processing section 51, calculates the AWB evaluation value and the AE evaluation value (arithmetic calculation process).
Then, based on the AE evaluation value, the control apparatus 46 controls the exposure control processing section 47 to adjust the exposure amount for the image sensor 2 (exposure control processing process).
Further, based on the AWB evaluation value, the lowest level established in the black-reference level setting section 14, etc., the control apparatus 46 controls the AWB processing section 40 to apply the white balance processing to the image data outputted from the signal processing section 3 (white balance processing process).
Still further, based on the image data outputted from the AWB processing section 40, the color interpolating section 41, the gradation conversion section 43 and the color space converting section 44 respectively conducts the image processing so as to output the processed image data.
According to the image capturing method mentioned in the foregoing, the linearizing process makes it possible to convert the electric signals originated from the logarithmic conversion source to those originated from the linear conversion source, and the compression process makes it possible to reduce the bit width of the digital signals to be processed in the image processing process, etc., after the compression process is completed. Accordingly, it becomes possible not only to convert the electric signals originated from the logarithmic conversion source to those originated from the linear conversion source, but also to prevent the image capturing apparatus 1 from upsizing.
Further, since it is possible the keep the boarder point between the non-compressed component and the compressed component constant, it becomes possible to make the various kinds of processing, such as the expanding process of the compressed electric signals, arithmetic calculation processing, etc., easy.
Still further, since the expanding process makes it possible to keep the linear coefficient between the electric signals and the incident light constant over the total range of the incident light, it becomes possible to apply the same processing to all of the expanded electric signals, being different from such the case that the linear coefficient varies. Accordingly, it becomes possible not only to make the processing to be applied in the arithmetic calculation process easy, but also to miniaturize the scale of the arithmetic calculation processing section 51.
In this connection, although it is assumed, in the embodiment described in the foregoing, that the AD converter 13, the linearization section 30 and the compression section 31 are cascaded in this order, it is also applicable that those are cascaded in other order. For instance, if the compression section 31, the linearization section 30 and the AD converter 13 were cascaded in this order, the compression process, the linearizing process and the analogue-to-digital conversion process would be conducted in the above order.
Further, although it is assumed, in the embodiment described in the foregoing, that the predetermined range component to be compressed by the compression section 31 of the signal processing section 3 is established as the component equal to or greater than the bit width of the AD converter 13, namely, the high range component of the upper 12-bits width, it is also applicable that the predetermined range component is established as the high range component equal to or greater than the signal value corresponding to the predetermined incident-light intensity th. Still further, it is also applicable that the predetermined range component is established as the predetermined low range component or the predetermined middle range component.
Still further, although, in the embodiment described in the foregoing, the electric signals, the high range component of which is compressed in the compression section 31 of the signal processing section 3, and then, expanded in the expansion section 50 of the evaluation value calculating section 5, are employed for the calculation processing of the AWB evaluation value and the AE evaluation value, it is also applicable that the concerned electric signals are used for other processing, and after that, the high range component is again compressed to output the electric signals, as shown in FIG. 8.
Still further, although it is assumed, in the embodiment described in the foregoing, that each of the pixels G11-Gmn has the circuit configuration shown in FIG. 4, it is also applicable that each of the pixels G11-Gmn has another circuit configuration, for instance, same as that indicated by the aforementioned Patent Document 1 (Tokkai 2002-77733, Japanese Non-Examined Patent Publication), as far as the switchover operation between the linear conversion mode and the logarithmic conversion mode is possible.
Yet further, although it is assumed, in the embodiment described in the foregoing, that the RGB filter is mounted on each of the pixels G11-Gmn, it is needless to say that another color filter, such as a cyan filter, a magenta filter, a yellow filter, etc., can be employed for this purpose.
Next, the modified example of the present embodiment will be detailed in the following. Incidentally, the same reference numbers as those in the aforementioned embodiment will be attached to the structural elements same as those shown in the aforementioned embodiment, and the explanations for them will be omitted.
The signal processing section 3 in the modified example is provided with a LUT (Look Up Table) shown in FIG. 9, instead of the linearization section 30 and the compression section 31.
Referring to the LUT, the signal processing section 3 linearly converts electric signals originated from the linear conversion source among the electric signals inputted from the image sensor 2 through the AD converter 13 and the black-reference level setting section 14, so as to output linearly-converted electric signals (line extended from the original point to point “a”, shown in FIG. 9). Further, referring to the LUT, the signal processing section 3 logarithmically converts electric signals originated from the logarithmic conversion source among the inputted electric signals (line extended from point “a” to point “c”, shown in FIG. 9). Still further, after the abovementioned logarithmic conversion is completed, the signal processing section 3 compresses the logarithmically-converted electric signal component, whose bit width is equal to or greater than that of the AD converter 13, by multiplying by ½8 (line extended from point “b” to point “d”, shown in FIG. 9).
According to the modified example mentioned in the above, since both the linearizing process and the compression process can be achieved by employing the LUT, it becomes possible to miniaturize the scale of the signal processing section 3, compared to that in such a case that arithmetic calculation circuits are provided as the linearization section 30 and the compression section 31.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2004-367725 | Dec 2004 | JP | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/JP05/21347 | 11/11/2005 | WO | 6/13/2007 |
