The present invention relates generally to electronic devices comprising image sensors and, more specifically, to binning (downscaling) of images taken by the image sensors.
Many image sensors have binning functionality, which means that some downscaling can be done in analog domain before digitizing the signal. The advantage of binning is that it enables such resolution/frame rate combinations that would not otherwise be possible due to ADC (analog-to-digital) or analog readout speed limitation. Furthermore doing scaling in an analog domain provides in some cases higher signal to noise ratio than doing scaling in a digital domain.
The problem with standard analog binning is that after the standard binning, the output video is not similar as, e.g., the raw Bayer output would be. When Bayer interpolation is done to this kind of video stream, the image will have artifact.
Typically, a color video image is represented by channels (or color channels), e.g., a standard Bayer video output has four channels, green_red, red, blue and green_blue, which are uniformly distributed and have equal “distance” to each other (i.e., distances between adjacent pixels in both vertical and horizontal directions). In a standard analog binning, different channels become grouped (e.g., averaged or binned pixels are placed in the middle of the averaging areas, wherein the averaging is performed for each color separately) and the phase difference of the different channels becomes smaller and almost disappears. In other words, distances between adjacent center points of the binned pixels (i.e., after binning is performed) becomes substantially different in both vertical and horizontal directions (see discussion of
There are a few earlier methods used to avoid artifacts in the downscaled output image as briefly discussed below:
1. Doing the downscaling after Bayer interpolation. In this case, all pixels have to be digitized and full size image has to be processed, so that large (e.g., 3 to 16 MP) and fast frame rate (e.g., 30 frame per second, fps) for video purposes may not be possible. The power consumption is also very high.
2. Doing the downscaling in digital domain to Bayer data using the methods presented in SMIA Functional specification 1.0, Part 1, Chapter 9 (http://www.smia-forum.org). In this mode, all pixels still need to be digitized so that fast frame rate (30 fps) video purposes may not be possible. However, the power consumption is lower than in case 1.
3. Further downscaling the image by 2×2 after doing Bayer interpolation to a binned image (binned using standard binning). However, in this case, it is difficult to achieve high resolution video mode unless the sensor resolution is very high. To have proper 720 pixel mode, the sensor would need to be 14.7 MP. In addition, the image processing is done slightly differently and it requires special operation mode for the interpolation function, because it has to reduce the image size to a quarter of the original size.
According to a first aspect of the invention, an apparatus, comprises: an image sensor, configured to capture at least one image comprising a plurality of pixels with a pre-selected color arrangement; and a binning processor, configured to perform binning of the plurality of pixels using a predetermined procedure, wherein center points of binned pixels, representing the at least one image and formed by the binning, maintain the pre-selected color arrangement, distances between any two adjacent center points of the center points are substantially equal in at least one direction, vertical or horizontal, and the binned pixels are for further processing of the at least one image.
According further to the first aspect of the invention, the binning may be performed in an analog domain.
Further according to the first aspect of the invention, all distances between any two adjacent center points of the center points may be substantially equal in both vertical and horizontal directions.
Still further according to the first aspect of the invention, the binning processor may be configured to perform the binning in such a way that each of all or selected pixels of the binned pixels is determined by averaging over a predetermined number of pixels of at least one color located in a predetermined area of the at least one image.
According further to the first aspect of the invention, the pre-selected color arrangement may be a Bayer arrangement. Still further, the binning processor may be configured to perform the binning by averaging pixels of two different green colors in adjacent rows of the Bayer arrangement using weighted values of the two different green colors to form binned green pixels. Yet still further, the binning processor may be configured to perform the binning by averaging pixels of two different green colors in adjacent rows of the Bayer arrangement to form binned green pixels.
According still further to the first aspect of the invention, the binning processor may be configured to perform the binning by including all the pixels.
According further still to the first aspect of the invention, the binning processor may be configured to perform the binning by including only selected pixels of the pixels and by discarding non-selected pixels of the pixels.
According yet further still to the first aspect of the invention, the binning processor may be configured to use at least one of the pixels for determining two or more of the binned pixels formed by the binning.
Yet still further according to the first aspect of the invention, the binning processor may be configured to use overlapping pixel areas selected from the pixels for determining two or more of the binned pixels formed by the binning.
Still yet further according to the first aspect of the invention, the binning processor may be configured to use non-overlapping pixel areas selected from the pixels for determining all or selected pixels of the binned pixels formed by the binning.
Still further still according to the first aspect of the invention, the binning processor may be configured to use a variable number of pixels of the pixels for determining each or selected pixels of the binned pixels formed by the binning.
According further to the first aspect of the invention, the image sensor may be a charged-coupled device or a complimentary metal oxide semiconductor sensor.
Further according to the first aspect of the invention, the apparatus may be a part of an electronic device or of an electronic device for wireless communications.
Still further according to the first aspect of the invention, an integrated circuit may comprise all or selected modules of the apparatus.
According further to the first aspect of the invention, the image sensor and the binning processor may be combined in one module.
According to a second aspect of the invention, an method, comprises: capturing at least one image comprising a plurality of pixels with a pre-selected color arrangement; and binning the plurality of pixels using a predetermined procedure, wherein center points of binned pixels, representing the at least one image and formed by the binning, maintain the pre-selected color arrangement, distances between any two adjacent center points of the center points are substantially equal in at least one direction, vertical or horizontal, and the binned pixels are for further processing of the at least one image.
According further to the second aspect of the invention, all distances between any two adjacent center points of the center points may be substantially equal in both vertical and horizontal directions.
Further according to the second aspect of the invention, each of all or selected pixels of the binned pixels may be determined by averaging over a predetermined number of pixels of at least one color located in a predetermined area of the at least one image using the binning.
Still further according to the second aspect of the invention, the binning may be performed in an analog domain.
According further to the second aspect of the invention, the pre-selected color arrangement may be a Bayer arrangement. Still further, the binning may be performed by averaging pixels of two different green colors in adjacent rows of the Bayer arrangement using weighted values of the two different green colors to form binned green pixels. Yet still further, the binning may be performed by averaging pixels of two different green colors in adjacent rows of the Bayer arrangement to form binned green pixels.
According still further to the second aspect of the invention, the binning may be performed by including all the pixels.
According further still to the second aspect of the invention, the binning may be performed by including only selected pixels of the pixels and by discarding non-selected pixels of the pixels.
According yet further still to the second aspect of the invention, at least one of the pixels may be used for determining two or more of the binned pixels formed by the binning.
Yet still further according to the second aspect of the invention, overlapping pixel areas selected from the pixels may be used for determining two or more of the binned pixels formed by the binning.
Still yet further according to the second aspect of the invention, non-overlapping pixel areas selected from the pixels may be used for determining all or selected pixels of the binned pixels formed by the binning.
Still further still according to the second aspect of the invention, a variable number of pixels of the pixels may be used for determining each or selected pixels of the binned pixels formed by the binning.
According to a third aspect of the invention, a computer program product comprises: a computer readable storage structure embodying computer program code thereon for execution by a computer processor with the computer program code, wherein the computer program code comprises instructions for performing the second aspect of the invention, indicated as being performed by any component or a combination of components of an electronic device.
According to a fourth aspect of the invention, a module, comprises: a binning processor, responsive to an image signal comprising plurality of pixels with a pre-selected color arrangement, configured to perform binning of the plurality of pixels using a predetermined procedure, wherein center points of binned pixels, representing the at least one image and formed by the binning, maintain the pre-selected color arrangement, distances between any two adjacent center points of the center points are substantially equal in at least one direction, vertical or horizontal, and the binned pixels are for further processing of the at least one image.
According further to the fourth aspect of the invention, the module may further comprise: a processing memory configured to store temporarily values of the plurality pixels of the at least one image during performing the binning.
Further according to the fourth aspect of the invention, the binning processor may be configured to use at least one of the pixels for determining two or more of the binned pixels formed by the binning.
For a better understanding of the nature and objects of the present invention, reference is made to the following detailed description taken in conjunction with the following drawings, in which:
a and 1b are schematic representations of a raw Bayer arrangement (
a and 6b are schematic representations of downscaled pixels of raw Bayer arrangements using 3×3 binning with pixel overlapping without (
a and 7b are exemplary block diagrams of an electronic device for implementing image binning (downscaling), according to embodiments of the present invention; and
A new method, apparatus and software product for image binning (downscaling) according to a predetermined procedure for a pre-selected color arrangement (e.g., a Bayer arrangement) by substantially maintaining a phase of channels (represented by selected colors) for reducing/elimination of artifacts in images taken by an electronic device (apparatus). Embodiments of the present invention describe several binning or scaling modes where the center points of each binned (e.g., averaged) pixel are arranged in the pre-selected color arrangement.
After capturing an image comprising a plurality of pixels with the pre-selected color arrangement, binning said plurality of pixels (e.g., averaged or binned pixels are placed in the middle of the averaging areas, wherein the averaging is performed for each color separately) using a predetermined procedure is performed in such a way that center points of the binned pixels, representing the captured image and formed by said binning, maintain the pre-selected color arrangement and distances between any two adjacent center points of said center points are substantially equal in at least one direction, vertical or horizontal, or in both vertical and horizontal directions, thus maintaining the phase of the channels substantially equal. These binned (e.g., averaged) pixels can be used for further processing of said at least one image (e.g., for interpolation in a digital domain). This way, the phases of the channels representing by pre-selected colors are kept and standard processing (e.g., Bayer interpolation) can be applied using the further image processing.
According to one embodiment, each of all or selected pixels of the binned pixels can be determined by averaging over a predetermined number of pixels of at least one color located in a predetermined area of the image using said binning.
According to further embodiments of the present invention there are many binning models which can be used which include but are not limited to:
perform binning by including all the pixels of the raw color image;
perform binning by including only selected pixels and by discarding non-selected pixels;
perform binning in such a way that at least one of the pixels is used for determining two or more of the binned (e.g., averaged) pixels formed by the binning (some small processing memory is required);
perform binning in such a way that overlapping pixel areas are used for determining two or more of the binned (e.g., averaged) pixels formed by the binning;
perform binning in such a way that non-overlapping pixel areas are used for determining all or selected pixels of the binned (e.g., averaged) pixels formed by the binning;
perform binning in such a way that pixels are weighted with different weights of the binned (e.g., averaged) pixels formed by the binning;
perform binning in such a way that a variable number of pixels is used for determining each or selected pixels of the binned (e.g., averaged) pixels formed by the binning, etc.
The electronic device used for the binning described herein can be, but is not limited to, a camera, a digital camera, a wireless communication device, a mobile phone, a camera-phone mobile device, a portable electronic device, non-portable electronic device, etc., utilizing an image sensor (e.g., charged-coupled device, CCD or a complimentary metal oxide semiconductor sensor, CMOS) for capturing the image.
It is further noted that the image binning, described herein, is typically performed in an analog domain, e.g., by combining charges directly in the pixels or using capacitor for analog summing. However, the embodiments of the present invention describing said binning can be also implemented or partially implemented using digital scaling prior to standard digital processing/interpolation.
The embodiments of the present invention presented herein can enables better video quality, can make possible tradeoffs between sharpness and noise, and can be especially useful when implementing high-definition (HD) video modes.
a and 1b show examples of schematic representations of a raw Bayer arrangement shown in
a and 6b shows examples among others of schematic representations of downscaled pixels of raw Bayer arrangements using 3×3 binning with pixel overlapping without (as shown in
In the arrangement of
In the arrangement shown in
It is further noted that averaging in the 5×5 pixel areas 70 without using weighted pixel values for Gr and Gb can only provide a partial Gr/Gb correction because there are 9 Gr but only 4 Gb pixels in each of the 5×5 pixel areas 70. To perform a full Gr/Gb correction, the Gr and Gb pixel values in each of the areas 70 can be weighted with a relative coefficient 4/9 in order to provide an equal weight for averaging the Gr and Gb pixels comprised in the areas 70. Moreover, according to another embodiment, each of the areas 70 shown in
a and 7b show exemplary block diagrams of an electronic device 10 comprising a camera 12 for implementing image binning (downscaling), according to embodiments of the present invention. The electronic device 10 can be, but is not limited to, a camera, a digital camera, a wireless communication device, a mobile phone, a camera-phone mobile device, a portable electronic device, non-portable electronic device, etc.
In
The binned image signal 15 generated by the module 17, can be provided to a further processing module 19 (e.g., for digital signal processing) and then can be further provided (optionally) as an output to different modules of the electronic device 10, e.g., to a display (viewfinder) for viewing, to a device memory for storing, or to an input/output (I/O) port for forwarding to a desired destination.
In another embodiment shown in
It is further noted that the image sensor 16 and the processing module 18a shown in
It is also noted that the binning processor 17 or 17a can generally be means for binning or a structural equivalence (or an equivalent structure) thereof. Similarly, the image sensor 16 can generally be means for capturing an image or a structural equivalence (or equivalent structure) thereof. Also all or selected blocks and modules of the electronic device 10 can be implemented using an integrated circuit.
The flow chart of
In a next step 74, this binned image signal (e.g., an analog signal) is further processed using digital signal processing and in a next step 76, a processed video signal is provided to a viewfinder, a device memory or to a device output port, etc.
As explained above, the invention provides both a method and corresponding equipment consisting of various modules providing the functionality for performing the steps of the method. The modules may be implemented as hardware, or may be implemented as software or firmware for execution by a computer processor. In particular, in the case of firmware or software, the invention can be provided as a computer program product including a computer readable storage structure embodying computer program code (i.e., the software or firmware) thereon for execution by the computer processor.
It is noted that various embodiments of the present invention recited herein can be used separately, combined or selectively combined for specific applications.
It is to be understood that the above-described arrangements are only illustrative of the application of the principles of the present invention. Numerous modifications and alternative arrangements may be devised by those skilled in the art without departing from the scope of the present invention, and the appended claims are intended to cover such modifications and arrangements.