BRIEF DESCRIPTION OF THE DRAWINGS
The accompanying drawings, which are incorporated in and constitute a part of the specification, illustrate embodiments of the invention and, together with the description, serve to explain the principles of the invention.
FIG. 1 is a block diagram of an image encoding apparatus according to the first embodiment;
FIG. 2 is a block diagram of an image encoding apparatus according to the second embodiment;
FIG. 3 is a block diagram of an image encoding apparatus according to the third embodiment;
FIG. 4 is a block diagram showing an example of the arrangement of a conventional image processing apparatus;
FIG. 5 is a block diagram showing another example of the arrangement of a conventional image processing apparatus;
FIG. 6 is a timing chart of encoding processing in one embodiment;
FIGS. 7A and 7B show examples of layouts of regions which are determined to undergo lossy encoding;
FIG. 8 shows a state of an increase/decrease in non-encoded data and an increase in lossy-encoded data without resolution conversion;
FIGS. 9A to 9D show an increase/decrease in non-encoded data of respective resolutions as a result of resolution conversion (once);
FIGS. 10A to 10C show an increase/decrease in non-encoded data of respective resolutions as a result of resolution conversion (twice);
FIG. 11 shows lossless-encoded data sizes of a plurality of resolutions for two different types of images;
FIG. 12 shows a code size obtained by adding a lossy code size as a predicted value or actually measured value to a lossless code size;
FIG. 13 shows lossless-encoded data sizes of a plurality of resolutions according to the third embodiment;
FIG. 14 is a block diagram of an image encoding apparatus according to the fourth embodiment;
FIG. 15 shows transition of increases in non-encoded data size of respective resolutions on a memory;
FIG. 16 is a block diagram of an apparatus for decoding encoded data obtained by the first embodiment;
FIG. 17 is a block diagram of an apparatus for decoding encoded data obtained by the second to fourth embodiments;
FIG. 18 is a timing chart of decoding processing;
FIG. 19 is a flowchart for explaining the processing sequence of a lossless encoding phase in the first embodiment;
FIG. 20 is a flowchart for explaining the processing sequence of the lossless encoding phase in the first embodiment;
FIG. 21 is a flowchart for explaining the processing sequence of the lossless encoding phase in the first embodiment; and
FIG. 22 is a flowchart for explaining the processing sequence of a lossy encoding phase in the first embodiment.