In the following, preferred embodiments of the present invention are described with reference to the accompanying drawings.
The EEPROM 4 may be rewritten and is capable of retaining data even after a power supply is cut off. However, there is a limit to the number of times data may be rewritten on the EEPROM 4 which number may range from several hundred thousand to a million times, for example (referred to as “rewrite cycle limit” hereinafter). Upon rewriting the EEPROM 4, all the bit data of a data area have to be erased even when only a portion of the data needs to be rewritten. That is, random data read/write operations that are performed on a RAM cannot be performed on the EEPROM 4. It is noted that the EEPROM 4 that is included in an image forming apparatus according to an embodiment of the present invention is used for storing data that are frequently rewritten such as the number of prints or the operating time of expendable parts, for example.
The index area is used for determining the data area on which a current write operation (data updating operation) is to be performed, the details of which are described below with reference to
As is shown in this drawing, when a data updating operation is started in response to an updating request, a determination is made as to whether the data to be updated corresponds to frequently rewritten data (step S1). If it is determined that the data are not frequently rewritten, a corresponding fixed area is updated (rewritten) after which the operation is ended. If it is determined that the data are frequently rewritten, a determination is made as to whether the current number of rewrites (number of time the data areas of the EEPROM 4 are rewritten) is over the limit (step S3). If it is determined that the current number of rewrites is over the limit (step S3, YES), the data updating operation is ended without updating the data of the EEPROM 4.
If the current number of rewrites is not over the limit (step S3, NO), a data area to be updated is determined based on index information stored in the index areas (step S4), and the determined data area is updated (step S5). Then, in response to such data updating, value data (index information) of the index areas are updated (step S6). Then, a determination is made as to whether the count value of the counter area representing the number of times the data areas have been rewritten is to be updated (counted up) based on the index information stored in the index areas (step S7). In the present example, the count value of the counter area is updated (counted up) when all the values of the index areas are set to “0” or all the values of the index areas are set to “1” as is shown in
As can be appreciated from the above descriptions, in the image forming apparatus according to the first embodiment, the EEPROM 4 that has a rewrite cycle limit of a predetermined number and is configured to store changing data such as adjustment value data that change in conjunction with operations of the image forming apparatus includes plural data areas for storing the changing data that are obtained by a plurality of write operations and distributed over more than one of the data areas (a data area has to be rewritten plural times to store the changing data in a case where only one data area is provided); an index area for storing index information that is used to determine the data area on which a current write operation is to be performed; and a counter area for counting a number of times the data areas are rewritten which number is controlled to be not more than the rewrite cycle limit. In this way, the life of the data retaining functions of the EEPROM 4 may be extended while ensuring the accuracy of the data stored in the EEPROM 4.
In a preferred embodiment, the display monitor may indicate when the number of times the data areas of the EEPROM are rewritten exceeds the rewrite cycle limit so that a user may be informed of such a situation, for example. In another preferred embodiment, the display monitor may be used to set the rewrite cycle limit of the EEPROM 4 so that usability of the image forming apparatus may be improved, for example. In another preferred embodiment, the display monitor may be used to reset the number of times the data areas have been rewritten that is stored in the counter area of the EEPROM 4 even when the number has not yet reached the rewrite cycle limit so that debugging by a programmer may be effectively implemented, for example.
In another preferred embodiment, when the number of rewrites performed on the EEPROM 4 is close to reaching the rewrite cycle limit, such information may be communicated to a service center via a network so that the EEPROM 4 may be replaced before it reaches its life end, for example. In another preferred embodiment, when the number of times the data areas of the EEPROM 4 are rewritten reaches the rewrite cycle limit, such information may be conveyed via a network to signal the replacement timing of the EEPROM 4, for example.
In the following, an image forming apparatus according to a second embodiment is described. It is noted that components of the image forming apparatus according to the present embodiment that are identical to those of the image forming apparatus according to the first embodiment are given the same reference numerals and their descriptions are omitted.
As is the case with the first embodiment, the image forming apparatus according to the second embodiment includes a controller board with a CPU 1 and a NVRAM 2, and an engine board with a CPU 3 and an EEPROM 4 (see
The image forming apparatus according to the second embodiment includes a RAM having a temporary recording data area for temporarily storing data that are frequently updated (i.e., data that are obtained by plural write operations are temporarily stored in the temporary recording data area instead of directly writing the data in the data area of the EEPROM 4) and a temporary recording counter area that counts the number of times data are rewritten in the temporary recording data area to determine the timing for writing the data in the data area of the EEPROM 4.
As is shown in
It is noted that in the present example, the data area of the EEPROM 4 is rewritten once with respect to every five write operations performed on the temporary recording data area of the RAM so that in the case where the EEPROM 4 has a rewrite cycle limit of 1 million, data may actually be rewritten up to 5 million times. It is noted that although the number of times the temporary recording data area of the RAM is to be rewritten between each rewrite operation of the data area of the EEPROM 4 (rewrite interval) is set to five in the above-described example, the present invention is not limited to such an example, and the rewrite interval may be set to any suitable number N so that data may be rewritten up to N times the rewrite cycle limit of the EEPROM 4.
As is shown in this drawing, when a data updating operation is started in response to a data updating request, a determination is made as to whether the data to be updated corresponds to frequently rewritten data (step S11). If it is determined that the data is not frequently rewritten, the data are written in a corresponding fixed area and the data updating operation is ended. If it is determined that the data are frequently rewritten, a determination is made as to whether the current number of rewrites (number of times the data area of the EEPROM 4 is rewritten) exceeds the limit (step S13). If the current number of rewrites exceeds the limit, the data updating operation is ended without updating the EEPROM 4. If the current number of rewrites does not exceed the limit, a determination is made as to whether the counter value of the counter area of the EEPROM 4 is to be counted up (step S14).
In determining whether the count value of the counter area of the EEPROM 4 is to be counted up, if the number of times the temporary recording data area of the RAM has been rewritten is a multiple of a preset value representing the rewrite interval (i.e., number of times the temporary recording data area of the RAM is to be rewritten between each rewrite operation of the EEPROM 4), a positive determination is made and the data and the counter value of the EEPROM 4 are updated (step S15). Then, the data and the counter value of the RAM are also updated (step S16) and the data updating operation is ended. When it is determined in step S14 that the counter value of the EEPROM 4 does not have to be counted up, the operation moves on to step S16 where the data and the counter value of the RAM are updated after which the operation is ended.
As can be appreciated, the image forming apparatus according to the second embodiment includes a RAM that is made up of a temporary recording data area and a temporary recording counter area where the temporary recording data area is for temporarily storing data that are rewritten plural times before being written in the data area of the EEPROM 4 (i.e., the data are written plural times in the temporary recording data instead of being directly written in the data area of the EEPROM 4), and the temporary recording counter area is for counting the number of times the temporary recording data area has been rewritten to determine the timing for writing the data stored in the temporary recording data area in the data area of the EEPROM 4. In this way, the life of data retaining functions of the EEPROM 4 may be extended without increasing the capacity of the EEPROM 4 while ensuring the accuracy of the retained data, for example.
In a preferred embodiment, the display monitor may indicate when the service life of the EEPROM 4 has reached an end so that a user may be informed of such a situation, for example. In another preferred embodiment, the display monitor may be used for setting of the rewrite cycle limit of the EEPROM 4 so that usability of the image forming apparatus may be improved, for example. In another preferred embodiment, the display monitor may be used for resetting the rewrite count value stored in the counter area of the EEPROM 4 even when the counter value has not yet reached the rewrite cycle limit so that debugging by a programmer may be effectively implemented, for example. In another preferred embodiment, when the EEPROM 4 is close to reaching the end of its life, such a situation may be signaled to a service center via a network so that the EEPROM 4 may be replaced before it reaches its life end, for example. In another preferred embodiment, when the EEPROM 4 reaches the end of its service life, such information may be conveyed via a network to signal the replacement timing of the EEPROM 4, for example.
Although the present invention is shown and described with respect to certain preferred embodiments, it is obvious that equivalents and modifications may occur to others skilled in the art upon reading and understanding the specification. The present invention includes all such equivalents and modifications, and is limited only by the scope of the claims.
The present application is based on and claims the benefit of the earlier filing date of Japanese Patent Application No. 2006-169394 filed on Jun. 19, 2006, the entire contents of which are hereby incorporated by reference.
Number | Date | Country | Kind |
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2006-169394 | Jun 2006 | JP | national |