BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a schematic for explaining a general concept of the present invention;
FIG. 2 is a block diagram of an image processing apparatus according to the present invention;
FIG. 3 is a block diagram of a TPM chip according to the present invention;
FIG. 4 is a block diagram of a server according to the present invention;
FIG. 5 is a flowchart of a processing procedure for an operation according to the present invention;
FIG. 6 is a graph for explaining an operation performed at step SA-2 shown in FIG. 5; and
FIG. 7 is a graph for explaining an operation performed at step SA-3 shown in FIG. 5.