1. Field of Invention
Aspects of the invention can relate to gray scale correction processing of image data. More specifically, the invention can relate to gray scale correction processing, such as color correction or gamma (γ) correction based on lookup tables (LUTs).
2. Description of Related Art
Related art gamma correction processing is processing for adjusting display characteristics of image data in accordance with characteristics of a display device, such as a CRT or an LCD in an image display apparatus for displaying image data. Generally, gamma correction processing can be carried out using, for example, an LUT storing gamma characteristics data (gray scale correction characteristics data) created on the basis of the display characteristics of a display device. Gamma characteristics define relationship between input gray scale values and output gray scale values. The image display apparatus obtains output gray scale values corresponding to input gray scale values of input image data by referring to the gamma characteristics, and displays an image corresponding to the image data on a display device according to the output gray scale values.
Also, when the image display apparatus performs color correction on input image data to achieve desired color characteristics for display, an LUT storing color conversion characteristics prepared in advance is used. An example of such related art color correction and gamma correction is disclosed in Japanese Unexamined Patent Application Publication No. 9-271036.
With the recent improvement in picture quality in cellular phones and other electronic apparatuses, the capacity of a storage device, such as a RAM needed to implement an LUT for gray scale correction characteristics data increases as the number of gray scale levels of image data increases. In view of this, a method has been proposed in which gray scale correction characteristics data for a number of gray scale levels smaller than the number of gray scale levels of input image data is stored in an LUT and gray scale correction characteristics data for the insufficiency is interpolated by linear approximation or the like. (Refer to, for example, PCT Japanese Translation Patent Publication No. 2002-534007).
In order to interpolate gray scale correction characteristics data by linear approximation or the like, output gray scale values of two endpoints of a portion to be interpolated are needed, so that reading operation must be executed twice with an LUT storing a single set of gray scale correction characteristics data. Thus, power consumption increases due to the increased number of times of reading operation, and a clock rate higher than a normal clock rate is required.
An aspect of the invention can provide an image processing circuit for gray scale correction, an image display apparatus, and an image processing method that allow reduction in the storage capacity needed for storing correction characteristics data without increasing clock rate in relation to interpolation processing of correction characteristics.
According to an aspect of the invention, an exemplary image processing circuit can include an input unit that receives input of image data represented in n gray scale levels, first and second lookup-table storage units that store gray scale correction characteristics data for m gray scale levels, m being less than n, an interpolation circuit that linearly interpolates the gray scale correction characteristics data using outputs from the first and second lookup-table storage units, the outputs being associated with mutually adjacent input gray scale values, and a gray scale correcting circuit that corrects gray scales of the image data using gray scale correction characteristics data obtained by the linear interpolation.
The image processing circuit according can be applied, for example, to color correction or gamma correction of color image data. Gray scale correction characteristics data for a number of gray scale levels that is than the number of gray scale levels of input image data is stored in first and second lookup table storing units. Considering a gray scale value of a pixel that is being considered for gray scale correction processing as an input gray scale value, the first and second lookup-table storing units are referred to, obtaining an output gray scale value corresponding to the input gray scale value and an output gray scale value corresponding to an adjacent input gray scale value. An adjacent gray scale value refers to a gray scale value that is higher by one or lower by one than another input gray scale value. Then, output gray scale values between these two adjacent output gray scale values are calculated by linear interpolation, obtaining output values for all input gray scale values. Then, gray scale correction is performed for each pixel of input image data, outputting corrected image data.
Since a lookup table that stores gray scale correction characteristics data for a smaller number of gray scale levels than the gray scale levels of input image data is used, compared with a case where gray scale correction characteristics data for all the gray scale levels is stored, the capacity of a storage device, such as a RAM, needed to implement the lookup table is reduced. Although mutually adjacent two output gray scale values are needed for linear interpolation of gray scale correction characteristics data, since linear interpolation is carried out using output gray scale values read from two lookup tables, it is not required to read twice from a single lookup table by a high-speed (e.g., twice as fast) clock. Thus, clock rate is not increased, and increase in power consumption is avoided.
According to a mode of the image processing circuit, the first and second lookup-table storage units store the same gray scale correction characteristics data. Accordingly, it is possible to obtain mutually adjacent two output gray scale values from the respective lookup-table storage units and to interpolate output values therebetween by linear interpolation.
In a preferred embodiment of the mode, the interpolation circuit uses a first output gray scale value output from the first lookup-table storage unit and a second output gray scale value output from the second lookup-table storage unit, the second output gray scale value being less than the first output gray scale value, to interpolate gray scale correction characteristics data between the first output gray scale value and the second output gray scale value.
According to another exemplary mode of the image processing circuit, the first lookup-table storage unit stores gray scale correction characteristics data for the m gray scale levels, and the second lookup-table storage unit stores difference values between adjacent gray scale values in the gray scale correction characteristics data for the m levels. Accordingly, using an output gray scale value corresponding to an input gray scale value and a difference value between the input gray scale value and an adjacent input gray scale value, output gray scale values between output gray scale values can be obtained by linear interpolation.
In a preferred embodiment of the mode, the interpolation circuit can use a first output gray scale value output from the first lookup-table storage unit and a difference value output from the second lookup-table storage unit to interpolate gray scale correction characteristics data between the first output gray scale value and a second output gray scale value that is adjacent to the first output gray scale value.
According to another exemplary mode of the image processing circuit, the first lookup-table storage unit can store gray scale correction characteristics data associated with odd-numbered input gray scale values among the gray scale correction characteristics data for the m levels, and the second lookup-table storage unit stores gray scale correction characteristics data associated with even-numbered input gray scale values among the gray scale correction characteristics data for the m levels. Accordingly, it can be possible to obtain two mutually adjacent output gray scale values simultaneously from the respective lookup-table storage units and to obtain output gray scale values therebetween by linear interpolation. Furthermore, since mutually adjacent two input gray scale values are a pair of an odd-numbered input gray scale value and an even-numbered input gray scale value, by providing lookup-table storage units respectively for odd-numbered input gray scale values and even-numbered input gray scale values, the storage capacities of the respective lookup-table storage units can be reduced to one half.
In a preferred embodiment of the mode, the interpolation circuit can include a device for determining, based on the image data, magnitude relationship of a first output gray scale value output from the first lookup-table storage unit and a second output gray scale value output from the second lookup-table storage unit; and a device for interpolating gray scale correction characteristics data between the first output gray scale value and the second output gray scale value based on the magnitude relationship. Since the magnitude relationship of two output gray scale values is determined based on whether an input gray scale value is an even number or an odd number, linear interpolation can be readily performed.
According to another mode of the image processing circuit, when an input gray scale value associated with a larger one of the first and second output gray scale values is 0, the interpolation circuit carries out interpolation while setting a smaller one of the first and second output gray scale values to 0. According to another mode of the image processing circuit, when an input gray scale value associated with a smaller one of the first and second output gray scale value is a maximum gray scale value, the interpolation circuit carries out interpolation while setting a larger one of the first and second output gray scale values to a maximum gray scale value. In either mode, all the lacking output gray scale values can be provided by linear interpolation.
According to another exemplary mode of the image processing circuit, a color reduction processing circuit can be further provided, which performs dither processing on the image data obtained by the gray scale correction to reduce colors, outputting image data represented in the m gray scale levels. Accordingly, the amount of image data can be reduced without causing degradation in picture quality, in accordance with the display capability of a display device used to display the image data.
It is possible to implement an image display apparatus including the image processing circuit described above and an image display unit for displaying the image data obtained by the gray scale correction. For example, an image display apparatus such as a portable phone, a PDA, or a digital camera can be implemented using an LCD as an image display unit.
According to another exemplary aspect of the invention, an image processing method can be carried out in an image processing circuit including first and second lookup-table storage units that store gray scale correction characteristics data for m gray scale levels in relation to input image data represented in n gray scale levels, m being less than n. The image processing method can include a step of receiving input of the input image data, a step of linearly interpolating the gray scale correction characteristics data using outputs from the first and second lookup-table storage units, the outputs being associated with mutually adjacent input gray scale values, and a step of correcting gray scales of the image data using the gray scale correction characteristics data obtained by the linear interpolation.
The image processing circuit according can be applied, for example, to color correction or gamma correction of color image data. Gray scale correction characteristics data for a number of gray scale levels that is than the number of gray scale levels of input image data is stored in first and second lookup table storing units. Considering a gray scale value of a pixel that is being considered for gray scale correction processing as an input gray scale value, the first and second lookup-table storing units are referred to, obtaining an output gray scale value corresponding to the input gray scale value and an output gray scale value corresponding to an adjacent input gray scale value. Then, output gray scale values between these two adjacent output gray scale values can be calculated by linear interpolation, obtaining output values for all input gray scale values. Then, gray scale correction is performed for each pixel of input image data, outputting corrected image data.
The invention will be described with reference to the accompanying drawings, wherein like numerals reference like elements, and wherein:
Now, preferred embodiments of the invention will be described with reference to the drawings.
The image processing circuit 101 performs processing for correcting gray scale characteristics, including color correction and gamma correction, on externally supplied image data D1, supplying corrected image data D10 to the image display unit 102. The image processing circuit 101 also receives input of a clock signal CLK that is synchronized with the image data D1. The image display unit 102 can include a display device, such as a CRT or an LCD (liquid crystal display), and it displays the corrected image data D10.
The gray scale corrector 20 is implemented using an image processing circuit according to the present invention. The gray scale corrector 20 performs gamma correction on the image data D2 obtained by the color conversion, correcting the gray scale characteristics of the image data D2, and supplies corrected image data D3 to the color reduction processor 30. The corrected image data D3 also has eight bits for each color of RGB. The gray scale corrector 20 receives input of the register control signal Sc.
The color reduction processor 30 performs color reduction processing on the image data D3 obtained by the gamma correction. As described above, the image data D3 obtained by the gamma correction has eight bits for each color of RGB. The color reduction processor 30 bit-slices, for example, the high-order six bits of the image data D3 to obtain data having six bits for each color of RGB, and performs dither processing based on the low-order two bits, supplying image data D10 having six bits for each color of RGB (equivalent to eight bits for each color due to the dither processing) to the image display unit 102.
Depending on the display capability of the image display unit 102, the color reduction processor 30 may supply image data having eight bits for each color to the image display unit 102 without performing color reduction processing. For example, when the image display unit 102 is capable of displaying an image at a resolution of eight bits for each color, the color reduction processor 30 supplies the image data D10 having eight bits for each color to the image display unit 102 without performing color reduction processing. On the other hand, when the image display unit 102 is capable of displaying an image only at a resolution of six bits for each color, the color reduction processor 30 performs color reduction processing to create image data having six bits for each color, and supplies the image data to the image display unit 102. The color reduction processor 30 receives input of the register control signal Sc, and a horizontal synchronization signal Hsync and a vertical synchronization signal Vsync that are synchronized with the image data D1, in addition to the image data D3 obtained by the gamma correction.
Next, the color conversion calculator 10 will be described in detail.
More specifically, the multiplier 11 multiplies R (red) data Rin of the image data D1 with the coefficients a1 to a3, outputting the results to the adder 14. The multiplier 12 multiplies G (green) data Gin of the image data D1 with the coefficients b1 to b3, outputting the results to the adder 14. The multiplier 13 multiplies B (blue) data Bin of the image data D1 with the coefficients c1 to c3, outputting the results to the adder 14. The adder 14 adds together the outputs of the multipliers 11 to 13 to generate Rout, Gout, and Bout, outputting these components as image data D2.
The color characteristics of the output image data D2 (i.e., Rout, Gout, and Bout) vary depending on the coefficients a1 to a3, b1 to b3, and c1 to c3 set by the register value controller 15. When the coefficients a1, b2, and c3 are set to “1” and the other coefficients are set to “0”, the input image data D1 and the output image data D2 have the same color characteristics. For example, when color characteristics with some emphasis on red are desired for the output image data D2, the coefficients a1 to a3 for multiplying Rin therewith should be chosen to be somewhat larger.
Next, a first exemplary embodiment of gray scale corrector will be described.
The LUTs 21 and 22 shown in
Referring to
The LUT 22 receives input of a gray scale value Rout−1(7 . . . 0) that is lower by one than Rout(7 . . . 0) input to the LUT 21 as an input gray scale value, and outputs a corresponding output gray scale value Xn-1 to the linear interpolation calculation circuit 23. Furthermore, the value of the low-order two bits Rout(1 . . . 0) of the same pixel is supplied to the linear interpolation calculation circuit 23.
More specifically, the calculation by the linear interpolation calculation circuit 23 can be expressed by the following equation.
R(lut_out)=Xn−1+(Xn−Xn−1)×(Rout(1 . . . 0)[Dec]/4)+OFF_set (equation 1)
where Xn−1=0 when Rout−1(7 . . . 2)=−1. ([Dec] indicates decimal notation.)
Now, the where clause for equation 1 will be described. When gray scale correction characteristics data for input gray scale values of 64 gray scale levels are linearly interpolated to create gray scale correction characteristics data for input gray scale values of 256 gray scale levels, if three gray scale values are interpolated in each interval of adjacent two gray scale values among the gray scale values 0 to 63, as shown in
Referring to
In the construction shown in
As described above, the gray scale corrector 20 stores in LUTs gray scale correction characteristics data for input gray scale values having six bits (equivalent to 64 gray scale levels) for each color with regard to input image data having eight bits for each color of RGB (equivalent to 256 gray scale levels). With regard to the insufficiency, the gray scale corrector 20 generates output gray scale values by linear interpolation based on the low-order two bits of input gray scale values to perform correction of gray scale characteristics (gamma correction). Thus, it is not required to store gray scale correction characteristics data for input gray scale values of 256 gray scale levels corresponding to all the gray scale levels of input image data. This serves to reduce the needed capacity of storage devices for implementing LUTs, such as RAMs. In this embodiment, as compared with a case where gray scale correction characteristics data for input gray scale values of 256 gray scale levels is stored in a RAM, since it suffices to provide two LUTs that store gray scale correction characteristics data for input gray scale values of 64 gray scale levels, the total RAM capacity can be reduced to one half.
In this embodiment, two LUTs are provided, and output gray scale values Xn and Xn-1 of two endpoints used for linear interpolation are read from the respective LUTs. As described above, a read clock rate must be increased when output gray scale values of two endpoints are read from a single LUT. However, that is not needed in this exemplary embodiment, so that increase in power consumption is avoided.
Color Reduction Circuit
Now, the color reduction processor will be described. As shown in
Referring to
The counter 31 counts the clock signal CLK synchronized with the image data D3 to output a 2-bit X address Xad to the dither matrix circuit 33. The counter 31 is reset by the horizontal synchronization signal Hsync. The counter 32 counts the horizontal synchronization signal Hsync to output a 2-bit Y address Yad to the dither matrix circuit 33. The counter 32 is reset by the vertical synchronization signal Vsync.
The dither matrix circuit 33, based on the input X address Xads and Y address Yads, supplies a value defined in the dither matrix to the adder 34 as R(D_out). As shown in
The output of the switcher 35 is switched according to a register value output from the register value controller 36 based on the register control signal Sc. When an input terminal a of the switcher 35 is selected, image data having eight bits for each color of RGB, not having undergone color reduction processing, is output as image data D10. On the other hand, when the input terminal b of the switcher 35 is selected, image data having six bits for each color of RGB, obtained by color reduction processing, is output as image data D10.
Next, a second embodiment of gray scale corrector will be described.
An input gray scale value Rout(7 . . . 2) of a pixel in input image data is input to the LUT 25, and a difference value AX associated therewith is supplied to the linear interpolation calculation circuit 23. Furthermore, an input gray scale value Rout−1(7 . . . 2) of the same pixel, lower by one than the input gray scale value Rout(7 . . . 2), is input to the LUT 26, and a corresponding output gray scale value Xn-1 is supplied to the linear interpolation calculation circuit 23.
R(lut_)=Xn−1+ΔX×(Rout(1 . . . 0)[Dec]/4)+OFF_set (equation 2)
where Xn−1=0 when Rout−1(7 . . . 2)=−1. ([Dec] indicates decimal notation.) The meaning of the where clause for equation 2 is the same as that for equation 1.
It suffices for the LUT 25 to store difference values ΔX between adjacent output gray scale values. As will be understood from
In the case of the first exemplary embodiment, when gray scale correction characteristics data is stored in the LUTs 21 and 22, gray scale correction characteristics data prepared in advance is simply stored in the LUTs. On the other hand, in the case of the second exemplary embodiment, in addition to storing gray scale correction characteristics data prepared in advance in the LUT 26, difference values must be calculated based on the gray scale correction characteristics data and stored in the LUT 25.
Next, a third exemplary embodiment of gray scale corrector will be described. In the first exemplary embodiment, the same gray scale correction characteristics data for input gray scale values of 64 gray scale levels is stored in the two LUTs 21 and 22. Two output gray scale values used in a linear interpolation calculation are an input gray scale value of a pixel of image data and an input gray scale value that is adjacent thereto (i.e., upper or lower by one). Thus, when one of these two adjacent input gray scale values is an odd number, the other is an even number. Conversely, when one of these two adjacent input gray scale values is an even number, the other is an odd number. In other words, it is impossible that two adjacent input gray scale values are simultaneously even numbers or simultaneously odd numbers. Accordingly, in the third embodiment, gray scale correction characteristics data for 64 gray scale levels are divided into gray scale correction characteristics data associated with odd-numbered input gray scale values and gray scale correction characteristics data associated with even-numbered input gray scale values, storing the respective gray scale correction characteristics data separately in two LUTs. Thus, the capacity of RAMs for implementing LUTs can be further reduced.
Of the input image data, Rout(7 . . . 3) corresponding to an even-numbered input gray scale value is input to the LUT 28, and a corresponding output gray scale value Xq is output to the data switcher 29. Also, Rout(7 . . . 2) corresponding to an odd-numbered input gray scale value is input to the LUT 27, and a corresponding output gray scale value Xp is output to the data switcher 29. Furthermore, Rout(2) representing the third lowest bit of the input image data is input to the data switcher 29. Rout(2) indicates whether the high-order six bits of the pixel being considered for correction of gray scale characteristics is an even number or an odd number, and it is used as a control signal for switching by the data switcher 29. The data switcher 29 switches relationship of input/output based on Rout(2), supplying the larger one of Xp and Xq as an output gray scale value Yn and the smaller one of Xp and Xq as an output gray scale value Yn-1 to the linear interpolation calculation circuit 23.
R(lut_out)=Yn−1+(Yn−Yn−1)×(Rout(1 . . . 0)[Dec]/4)+OFF_set (equation 3)
where Yn−1=0 when Rout−1(7 . . . 2)=−1. ([Dec] indicates decimal notation.). The meaning of the where clause for equation 3 is the same as that in the first and second embodiments.
As described above, in the third exemplary embodiment, gray scale correction characteristics data for 64 gray scale levels are stored separately in the LUT 27 associated with odd-numbered input gray scale values and the LUT 28 associated with even-numbered input gray scale values. Thus, the capacity of RAMs needed to implement LUTs can be further reduced. Actually, the total RAM capacity is reduced to ¼ compared with the case where a single LUT having input gray scale values for 256 gray scale levels is used, and the total RAM capacity is reduced to one half when compared with the first embodiment.
Modifications.
In the first to third exemplary embodiments of the gray scale corrector, as described with reference to
It is to be noted, however, that “0” must be stored in a register or the like when three gray scale values are added to the smaller side of gray scale values, while “255” must be stored when three gray scale values are added to the larger side of gray scale values. Thus, a smaller area of the register is occupied when three gray scale values are added to the smaller side of gray scale values. Furthermore, of the smaller and larger sides of gray scale values, when gray scale values are added to the side corresponding to black color of a displayed image, the displayed image is less affected.
In the first exemplary embodiment described above, two input gray scale values used in linear interpolation processing are a gray scale value Rout(7 . . . 2) of a pixel and a gray scale value Rout−1(7 . . . 2) that is lower by one. Alternatively, linear interpolation may be carried out using a gray scale value Rout(7 . . . 2) of a pixel and a gray scale value Rout+1(7 . . . 2) that is higher by one.
In the second exemplary embodiment, a difference value between a gray scale value Rout(7 . . . 2) of a pixel and a gray scale value Rout−1(7 . . . 2) that is lower by one is stored in an LUT. Alternatively, a difference value between a gray scale value Rout(7 . . . 2) of a pixel and a gray scale value Rout+1(7 . . . 2) that is higher by one may be stored in an LUT.
While this invention has been described in conjunction with the specific embodiments thereof, it is evident that many alternatives, modifications, and variations will be apparent to those skilled in the art. Accordingly, preferred embodiments of the invention as set forth herein are intended to be illustrative, not limiting. There are changes that may be made without departing from the spirit and scope of the invention.
Number | Date | Country | Kind |
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2003-370631 | Oct 2003 | JP | national |