The present invention relates to a digital video processing system comprising receiving means for receiving a first sequence of data packets before an interrupt and a second sequence of data packets after said interrupt, processing means for processing respectively said first and second sequence of data packets to form consecutive image signals, each consecutive image signal being produced by processing a predetermined number of said first and second sequence of data packets, said processing means being arranged to form substitute consecutive image signals upon said interrupt. The present invention also relates to a video processing method for driving such a system.
Consumer multimedia terminal systems, e.g. Digital TV and Set-top Box, can consist of a number of processing paths between the input (receiver front-end) and the output (display, storage device). Each path is distinguished in a number of processing blocks, e.g. channel decoding and video enhancing. Some blocks are considered to remain in hardware (e.g. channel decoding) while others are opting to be implemented in software (e.g. source decoding).
In interlaced video systems, two consecutive fields with odd respectively even lines belong to one frame. In some applications frames are processed, while in other applications fields are processed. The choice of the term “field” or “frame” processing is however not relevant for this invention. Below, both “fields” or “frames” will be referred to as frames.
For economic reasons, input signals for digital image processing systems, like MPEG, consist of frames with different content. Not every frame contains the whole image. So-called I-frames contain information of the whole image, and are present on regular bases. Frames following an I-frame only contain information on relative changes in the image. From an I-frame and information on relative changes, P-frames and B-frames can be predicted. During a channel change in a Digital TV, an MPEG video decoder has to wait for a first Sequence Header in an I-frame to arrive. The Sequence-Header indicates the start of a new sequence of frames in the new channel. The Sequence-Header shows up only on a regular basis. So after a channel change, there is a time period in which there is a lack of data for the image processing system. At present, there is a delay of up to one second. However, in a consumer terminal, there are hard deadlines and every field/frame period (50/60/100 Hz) a new field/frame should be ready for display. Currently, during a channel change, a black image is displayed until the first Sequence-Header of the new data arrives and new data are processed and ready for display. The black image between two consecutive channels decreases the perceived output quality.
In U.S. Pat. No. 5,933,192, a method is described to avoid a black screen during a channel change by using a multi-channel video receiver that receives the current channel and a most likely next channel. The prediction for the most likely next channel is made by investigating the scrolling behaviour of the user. This solution only works when the user is scrolling through the channels in a predictable way. If the predicted channel is not actually selected by the user, a black image still appears.
It is an object of the present invention to increase the perceived image quality during channel changes or in general video stream changes in digital video processing devices.
The invention relates to a digital video processing system comprising receiving means for receiving a first sequence of data packets before an interrupt and a second sequence of data packets after said interrupt, processing means for processing respectively said first and second sequence of data packets to form consecutive image signals, each consecutive image signal being produced by processing a predetermined number of said first and second sequence of data packets, said processing means being arranged to form substitute consecutive image signals upon said interrupt, characterized in that said processing means are arranged to alter their processing after said interrupt using less data packets than said predetermined number of data packets in order to form said substitute consecutive image signals.
A system according to the invention improves the perceived image quality during channel changes or in general video stream changes.
The invention also relates to a video processing method comprising the steps of:
Below, the invention will be explained with reference to some drawings, which are intended for illustration purposes only and not to limit the scope of protection as defined in the accompanying claims.
In
In
Video decoder 3 stores information on I and P frames in order to process incoming data. A P-frame is predicted from an I-frame. The order of incoming I and P-frames is not defined, so in
Every module 3, 4, 5 has been given (different) priorities. The highest priority is given to the video display processor 5. This is because every new frame period, an output image is needed. The second highest priority is given to the video decoder 3, and the lowest priority is given to the video enhancer 4, since this is the less critical component.
At time t=ti-1 a data packet i-1, belonging to a first channel is input to the processing path. At this time, image i-6 is displayed and the system is working in a steady state mode. In this example the following frame delays are assumed; one for video decoding in the video decoder 3, two for video enhancement in the video enhancer 4, and one for the video display process in video display processor 5. Thus, when data packet i-1 arrives in the system, the video display processor 5 is working on data packet i-5, the video decoder 3 on data packet i-1, and video enhancer 4 on data packet i-3, causing a latency of 4 frame periods.
At a moment t=trequest between the receiving of input of packet i-1 and i, a request for changing the channel is encountered. Such a request is generated by the channel select unit 6 as operated by a user and transmitted to the tuner/channel decoder 2. At that moment the video display processor 5 produces image i-5 which is shown on a display device 13. A new frame period starts, and the video display processor 5 works on data packets i-4 and i-3. These data packets were available from the previous frame period. The video decoder 3 is informed by the system control unit 7 (or the channel decoder 2) that a channel change to a second channel has occurred and that it must wait for a Sequence-Header of the second channel. The video enhancer 4 waits for input but does not get one and thus it blocks. In the next frame period, if no Sequence-Header of the second channel has arrived, the video display processor 5 does not get any data in its input queue and thus blocks after having produced the last image i-4. Now the system performs exception handling by displaying the last produced image i-4 and the output/display freezes. After k frame periods, at time t=ti+k, the Sequence Header from the new channel is received by tuner/channel decoder 2. Now a first data packet j of the new channel is input for the processing path. This first data packet j contains an I-frame which is indicated by j(I). Next, the video decoder 3 processes the new data packet, which is used to decode a P-frame. Both I- and P-frames are needed to predict a B-frame in between. Therefore, the decoder does not output the first decoded I-frame immediately, to accomplish a continuous stream in a steady state. At t=ti+k+1 (i.e. t=tj+1 with j=i+k) the video decoder 3 outputs the new data packet j+1. The new mode of the video enhancer 4 needs 2 more data packets (i.e. j+2, j+3) before it can provide a new output. After having received data packets j+2 and j+3, the video enhancer 4 produces data packet j+1 for the video display processor 5. At this point, the video display processor 5 waits for one more frame period, to receive data packet j+2 from video enhancer 4, until it outputs the first new data image j+1 at t=tj+6.
The above mentioned processing results in a freeze of the displayed image i-4 for k+5 frame periods, as is indicated by the dashed line in the output quality diagram in
In a first embodiment of the present invention an alternative image processing is used in order to decrease the freeze time mentioned above, see also
Preferably similar alternative processing is used for the second channel, which is processed after the new Sequence-Header occurring at t=ti+k. At time t=ti+k the video decoder 3 can make a copy of a first I-frame, output it to the video enhancer 4, and at the same time keep it in memory for a next frame to decode. This results in one extra frame period of regular processing since video enhancer 4 has three data packets j, j+1, j+2 already at time tj+3, i.e., video enhancer 4 can start processing one frame period earlier than in the prior art as explained in
In a second embodiment of the invention the processing in the video decoder 3 occurs as in the first embodiment but in addition the processing within the video enhancer 4 and video display processor 5 is altered gradually. Let's assume that the video enhancer 4 requires three data packets to output the next frame. Since this processing step includes programmable components, it can be altered during processing. The processing of the video enhancer 4 is now altered in such a way that it only needs two data packets, and at the next frame period only, one data packet to continue providing an output. So the video enhancer 4 provides output during two more frame periods. Preferably similar handling is used for the video display processor 5, thus gaining one more frame period, see dashed bars in
In another embodiment similar alternative processing is done for the processing of the second channel as soon as the Sequence Header is received at tj. Instead of waiting for two more data packets, the video enhancer 4 can already work on one data packet and provide an output of lower quality. Similar alternative processing is done in the video display processor 5. This results in a low quality output image j at time t=tj+2. The resulting total freeze period is then equal to k-3 frame periods, see bottom output quality line in
In yet another embodiment a video processing system 8 includes two processing paths, e.g. 2-3-11-4-5 and 9-10-11-4-5, as shown in
As video decoder 3, video decoder 10 also comprises a sequence-header detector, not shown. After the new Sequence-Header has appeared at t=ti+k the second processing path needs two more frame periods before it can produce the first image, see t=tj+2 in
Since two channels are processed in parallel, transition time can completely be avoided by processing and displaying the first channel until the second channel is processed in a regular high quality way. However, a user, after having pressed a button, will have to wait a while (e.g. one second) before the second channel appears. This may cause annoyance, which can be regarded as low perceived quality. Therefore, in this invention the second channel is shown as soon as possible, even if this means lower quality at the start.
The proposed systems are described for the case of channel changing. However, the approaches are valid for any case that may cause lack of data in the input of an algorithm and where a lower quality image is better than a freezed image. Examples of such cases are:
While the invention has been described in connection with preferred embodiments, it will be understood that modifications thereof within the principles outlined above will be evident to those skilled in the art. For example in
The invention is not limited to the preferred embodiments but is intended to encompass such modifications.
Number | Date | Country | Kind |
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02075281.2 | Jan 2002 | EP | regional |
Filing Document | Filing Date | Country | Kind |
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PCT/IB02/05505 | 12/16/2002 | WO |