1. Field of the Disclosure
The present invention relates generally to image sensors. More specifically, examples of the present invention are related to circuits that readout image data from image sensor pixel cells with a charge pump.
2. Background
Image sensors have become ubiquitous. They are widely used in digital cameras, cellular phones, security cameras, as well as, medical, automobile, and other applications. The technology used to manufacture image sensors, and in particular, complementary metal-oxide-semiconductor (CMOS) image sensors, has continued to advance at great pace. For example, the demands of higher resolution and lower power consumption have encouraged the further miniaturization and integration of these image sensors.
In a conventional CMOS pixel cell, image charge is transferred from a photosensitive device (e.g., a photodiode) and is converted to a voltage signal inside the pixel cell on a floating diffusion node. The image charge can be readout from the pixel cell into readout circuitry and then processed. In an image sensor application, a charge pump provides a boosted voltage (i.e., higher than a normal VDD level) to an array of pixel cells in order to readout the image charges from photodiodes in the pixel cells and pass along a voltage signal through a readout path to the readout circuitry.
A charge pump can be driven by a system clock. The charging and discharging phases of the charge pump operate along with the system clock, which can generate a significant amount of noise. The power spectrum of the harmonic tones of the generated noise is aligned with those of the system clock. In other words, the harmonic tones of the noise are aligned with those of the system clock, which can propagate throughout the imaging system and reduce the dynamic range and therefore the image quality of images acquired with the imaging system.
Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.
Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present invention. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present invention.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one having ordinary skill in the art that the specific detail need not be employed to practice the present invention. In other instances, well-known materials or methods have not been described in detail in order to avoid obscuring the present invention.
Reference throughout this specification to “one embodiment”, “an embodiment”, “one example” or “an example” means that a particular feature, structure or characteristic described in connection with the embodiment or example is included in at least one embodiment of the present invention. Thus, appearances of the phrases “in one embodiment”, “in an embodiment”, “one example” or “an example” in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures or characteristics may be combined in any suitable combinations and/or subcombinations in one or more embodiments or examples. Particular features, structures or characteristics may be included in an integrated circuit, an electronic circuit, a combinational logic circuit, or other suitable components that provide the described functionality. In addition, it is appreciated that the figures provided herewith are for explanation purposes to persons ordinarily skilled in the art and that the drawings are not necessarily drawn to scale.
Examples in accordance with the teaching of the present invention describe a charge pump coupled to operate with a random clock in an image sensor in accordance with the teachings of the present invention. As mentioned previously, in an image sensor application, a charge pump provides a boosted voltage (i.e., higher than the normal VDD level) to an array of pixel cells in order to readout the image charges from photodiodes and pass along a voltage signal through a readout path to readout circuitry. The charge pump can be driven by a clock, which can generate a significant amount of undesired noise having harmonic tones that are aligned with those of the system clock. These harmonic tones can propagate throughout the power lines of the image sensor as well as the entire semiconductor substrate. Consequently, these harmonic tones will be added on the noise floor, which can negatively affect the image quality of the image sensor.
As will be discussed, in order to improve the image quality, the level of the harmonic tones is reduced with a charge pump coupled to operate with a random clock in an image sensor in accordance with the teachings of the present invention. In order to reduce the harmonic tones generated by the charge pump, the charging and discharging operations are be randomized. However, in order to reduce the reverse charge leakage from each stage of the charge pump, the randomized charging and discharging operations are synchronized in the stages of the charge pump. In one example, this synchronization with randomized operations is achieved with synchronized two non-overlapping clock phases generated in response to a randomized system clock.
To illustrate,
As shown in the example, pixel array 102 is a two-dimensional (2D) array of imaging sensors or pixel cells (e.g., pixel cells P1, P2 . . . , Pn). In one example, each pixel cell is a CMOS imaging pixel. As illustrated, each pixel cell is arranged into a row (e.g., rows R1 to Ry) and a column (e.g., column C1 to Cx) to acquire image data of a person, place, object, etc., which can then be used to render a 2D image of the person, place, object, etc.
In one example, after each pixel cell has accumulated its image data or image charge, the boosted voltage VBOOST 140 is provided to the array of pixel cells 102 through vertical scanning circuit 110 to readout image charge from photodiodes included in the pixel cells of the array of pixels 102 and also to pass along the signals along the readout path through bitlines 116 to horizontal scanning circuit 104. In one example, a logic circuit 108 can control the horizontal scanning circuit 104 and output image data to a data processing unit 106. In various examples, the readout circuitry including horizontal scanning circuit 104 may also include additional amplification circuitry, additional analog-to-digital (ADC) conversion circuitry, or otherwise. Data processing unit 106 may simply store the image data or even manipulate the image data by applying post image effects (e.g., crop, rotate, remove red eye, adjust brightness, adjust contrast, or otherwise). In one example, horizontal scanning circuit 104 may readout a row of image data at a time along readout column bit lines 116 (illustrated) or may readout the image data using a variety of other techniques (not illustrated), such as a serial readout or a full parallel readout of all pixels simultaneously.
In one example, control circuitry including vertical scanning circuit 110 may be coupled to control operational characteristics of the array of pixels 102. For example, the control circuitry may generate a shutter signal for controlling image acquisition. In one example, the shutter signal is a global shutter signal for simultaneously enabling all pixels within the array of pixels 102 to simultaneously capture their respective image data during a single acquisition window. In another example, the shutter signal is a rolling shutter signal such that each row, column, or group of pixels is sequentially enabled during consecutive acquisition windows.
In the example depicted in
In operation, when clock signal cka 222A is low, diode-coupled transistor 214A is coupled to charge the voltage across capacitor 216A to VDD. When clock signal cka 222A goes high, the voltage at the top plate of capacitor 216A is pushed up to 2VDD. At this point, diode-coupled transistor 214A is turned off, and diode-coupled transistor 214B is turned on, at which point capacitor 216B is charged to 2VDD from capacitor 216A. On the next clock cycle, clock signal cka 222A goes low and clock signal ckb 222B goes high, which pushes up the voltage at the top plate of capacitor 216B to 3VDD. At this point, diode-coupled transistor 214B is turned off, and diode-coupled transistor 214C is turned on, at which point capacitor 216C is charged to 3VDD from capacitor 216B.
This charging of the capacitors continues down the chain of stages of charge pump 212 through diode-coupled transistors 214D and 214E to capacitors 216D and 216E such that a boosted voltage VBOOST 240 is provided across capacitor 216E, which may also be referred to as an output load capacitor of charge pump 212 that provides smoothing. Indeed, as shown in the depicted example, capacitor 216E is coupled to a ground terminal instead of one of the clock signals cka 222A or ckb 222B.
As shown in the example illustrated in
In one example, switches 352 and 354 are switched in response to random sequence 350 to select one of system clock 344 or the inversion of the previous cycle of the random clock 345 to generate random clock 356 as shown in accordance with the teachings of the present invention. For instance, in one example, the random clock 356 that is generated by random clock generator 314 is coupled to be equal to the system clock 344 if the random sequence 350 is representative of a first state, such as for example “0.” In one example, random clock 356 is coupled to be equal to the inverse of the previous cycle of the random clock 345 if the random sequence 350 is representative of a second state, such as for example “1.” Thus, in one example, switches 352 and 354 are switched accordingly in response to random sequence 350 to select the appropriate signal in order to generate the random clock 356 in accordance with the teachings of the present invention.
To illustrate,
Next, after startup is complete, processing continues to state 360 where the system clock and a random number of the random sequence are generated. If the random number is representative of a first state, or for example equal to “0,” then processing continues to state 364. If the random number is representative of a second state, or for example equal to “1,” then processing continues to state 362.
As shown in state 364, if the random number equals “0,” then the random clock 356 equals the system clock 344, and then processing loops back to state 360 for the next cycle where the next system clock cycle and random number are generated.
As shown in state 362, if the random number equals “1,” then the random clock 356 equals the inverse of the previous cycle of the random clock 345, and then processing loops back to state 360 for the next cycle where the next system clock cycle and random number are generated.
To illustrate, as shown in the timing diagram of
As shown in the example depicted in
It is appreciated of course that the example techniques described above are only examples of generating a random clock to clock a charge pump in an image sensor and that other techniques may be utilized to generate the random clock in accordance with the teachings of the present invention. By utilizing the random clock to clock the charge pump of an image sensor in accordance with the teachings of the present invention as described above, it is appreciated that the image quality of an image acquired by an image sensor is improved because the level of harmonic tones is reduced in the power spectrum of the noise levels in the imaging system in accordance with the teachings of the present invention. Therefore, less harmonic tones will be propagated through the power lines and semiconductor substrate of the entire system, which would have otherwise been added to the noise floor and eventually impact image quality.
The above description of illustrated examples of the present invention, including what is described in the Abstract, are not intended to be exhaustive or to be limitation to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible without departing from the broader spirit and scope of the present invention.
These modifications can be made to examples of the invention in light of the above detailed description. The terms used in the following claims should not be construed to limit the invention to the specific embodiments disclosed in the specification and the claims. Rather, the scope is to be determined entirely by the following claims, which are to be construed in accordance with established doctrines of claim interpretation. The present specification and figures are accordingly to be regarded as illustrative rather than restrictive.