1. Field of the Invention
The present invention relates to an imaging apparatus and an imaging system.
2. Description of the Related Art
An imaging apparatus includes a sensor array in which a plurality of sensors are arrayed, a signal readout unit configured to read out signals from the sensor array, and a generation unit configured to generate image data based on the readout signals. As described in Japanese Patent Laid-Open Nos. 8-116044 and 2010-268171, a signal readout unit reads out a signal corresponding to the amount of charge generated in each sensor upon irradiation with radiation or light.
The arrangement of an imaging apparatus which individually reads out electrons and holes generated in each sensor, and uses both the electrons and the holes, or either the electrons or holes to generate image data has not been disclosed. Therefore, only either the electrons or the holes have been conventionally read out and used to generate image data. It is possible to improve the performance of an imaging apparatus by individually reading out the electrons and holes as two signals.
The present invention has been made in recognition of the above problem by the inventor, and provides a technique advantageous in improving the performance of an imaging apparatus.
One of the aspects of the present invention provides an imaging apparatus, comprising a sensor array in which a plurality of sensors are arrayed, a first readout unit configured to read out, from each of the plurality of sensors, a first signal corresponding to an amount of one of an electron and a hole of each of electron-hole pairs generated in the sensor array in response to irradiation with radiation or light, and a second readout unit configured to read out, from each of the plurality of sensors, a second signal corresponding to an amount of the other of the electron and the hole of the electron-hole pairs.
Further features of the present invention will become apparent from the following description of exemplary embodiments with reference to the attached drawings.
The radiation imaging apparatus 100 (to be referred to as an “imaging apparatus 100” hereinafter) can include a detection unit 101, a driving unit 102, readout units 106 and 106′, an image data generation unit 105, a power supply unit 107, and a control unit 108.
The detection unit 101 can be formed by arraying a plurality of pixels. The detection unit 101 can include a sensor array (not shown) in which sensors (to be described later) are arranged to correspond to the respective pixels, and a scintillator layer (not shown) formed on the sensor array. The scintillator layer converts the radiation 505 into light, which is then detected by the sensors. Note that an arrangement which uses a so-called indirect conversion sensor that adopts a method of causing a scintillator layer to convert radiation into light, and photoelectrically converting the light into an electronic signal using a photoelectric conversion element made of amorphous silicon or the like will be exemplified in this example. The present invention, however, is not limited to this arrangement. For example, a radiation imaging apparatus which uses a so-called direct conversion sensor that adopts a method of directly converting radiation into an electronic signal using, as a sensor, a conversion element made of amorphous selenium or the like may be used. Note that the sensor is an element for directly or indirectly converting radiation into an electronic signal, and the sensor array is formed by arraying a plurality of pixels each including a sensor in a matrix.
The detection unit 101 also includes switch elements (to be described later) for reading out signals from the respective sensors, which are arranged to correspond to the respective sensors. The detection unit 101 is divided into, for example, a first group 101a and a second group 101b. The readout units 106 and 106′ read out signals from the first group 101a and the second group 101b.
The driving unit 102 drives the detection unit 101 (the respective pixels thereof) for each row, thereby causing the readout unit 106 to read out a signal from each sensor.
The readout unit 106 can include a processing unit 103 with a first processing unit 103a and a second processing unit 103b, and an A/D converter 104 with a first A/D converter 104a and a second A/D converter 104b. Similarly to the readout unit 106, the readout unit 106′ can include a processing unit 103′ with a first processing unit 103a′ and a second processing unit 103b′, and an A/D converter 104′ with a first A/D converter 104c and a second A/D converter 104d.
For example, the first processing unit 103a reads out signals 112 from the first group 101a of the detection unit 101. The first A/D converter 104a performs A/D conversion (analog/digital conversion) for a signal 113 from the first processing unit 103a, thereby obtaining a signal ADCDATA_a. Similarly, signals ADCDATA_b, ADCDATA_c, and ADCDATA_d are obtained from the remaining processing units (103b, 103a′, and 103b′) and A/D converters (104b, 104c, and 104d), respectively.
The image data generation unit 105 generates image data based on the signals ADCDATA_a, ADCDATA_b, ADCDATA_c, and ADCDATA_d, and outputs the generated image data to the outside as a signal 999. In generating image data, the image data generation unit 105 can perform correction processing such as offset correction, gain correction, fixed pattern noise (FPN) correction, and white balance correction.
The power supply unit 107 supplies a corresponding power to each of the above-described units (for example, the driving unit 102 and readout units 106 and 106′). For example, the power supply unit 107 supplies a first reference voltage Vref1 and a second reference voltage Vref2 to the processing unit 103, and supplies a third reference voltage Vref3 to the A/D converter 104. Similarly, the power supply unit 107 supplies a first reference voltage Vref1′ and a second reference voltage Vref2′ to the processing unit 103′, and supplies a third reference voltage Vref3′ to the A/D converter 104′. Furthermore, the power supply unit 107 supplies, to the driving unit 102, an ON bias voltage Von for setting each switch element of the detection unit 101 in a conductive state, and an OFF bias voltage Voff for setting each switch element of the detection unit 101 in a non-conductive state.
The control unit 108 controls the above-described units (for example, the driving unit 102, power supply unit 107, and readout units 106 and 106′). For example, the control unit 108 outputs a control signal 119 to the driving unit 102. In response to the control signal 119, the driving unit 102 drives the detection unit 101 by control signals 111. Furthermore, for example, the control unit 108 outputs a control signal 118 to the power supply unit 107. In response to the control signal 118, the power supply unit 107 supplies a power or bias voltage to each unit. In addition, for example, the control unit 108 outputs respective control signals 116, 117, and 120 to the readout unit 106, and outputs respective control signals 116′, 117′, and 120′, thereby controlling the readout units 106 and 106′.
An imaging apparatus 1001 according to the first embodiment will be described with reference to
For example, the detection unit 101 can be formed on an insulating substrate such as a glass substrate by using amorphous silicon. As the sensor S, for example, a PIN sensor or MIS sensor is usable. As the switch element T, for example, a thin film transistor (TFT) is usable. Note that in this embodiment, a PIN photodiode is used as the sensor S.
Signal lines G, that is, G1 to G8 for controlling the sensors S are arranged in the detection unit 101 in correspondence with the respective rows. The control signals from the driving unit 102 are input to the control terminals of the corresponding switch elements T via the signal lines G1 to G8, respectively. First signal lines Sig1 to Sig8 and second signal lines Sig9 to Sig16 for reading out signals from the respective sensors S are arranged in the detection unit 101 in correspondence with the respective columns. When signals from the driving unit 102 are activated, the switch elements T are set in a conductive state, and signals of the respective sensors S are input to the processing unit 103 or 103′ via the signal lines Sig1 to Sig8 or Sig9 to Sig16.
A signal (to be referred to as a “first signal” hereinafter) of a first polarity corresponding to the amount of one (in this example, hole) of the electron and hole of each of electron-hole pairs generated in each sensor S is input to the processing unit 103 via a corresponding one of the signal lines Sig1 to Sig8. A signal (a second signal) of a second polarity corresponding to the amount of the other (in this example, electron) of the electron and hole of each of the electron-hole pairs is input to the processing unit 103′ via a corresponding one of the signal lines Sig9 to Sig16. Note that in this embodiment, the anode of the PIN photodiode serving as the sensor S is electrically connected to a corresponding one of the signal lines Sig1 to Sig8 via the corresponding switch element T. Furthermore, the cathode of the PIN photodiode is electrically connected to a corresponding one of the signal lines Sig9 to Sig16. Note that the present invention is not limited to this, and the anode of the PIN photodiode may be electrically connected to a corresponding one of the signal lines Sig9 to Sig16, and the cathode of the PIN photodiode may be electrically connected to a corresponding one of the signal lines Sig1 to Sig8 via the corresponding switch element T. In this case, the second signal is input to the processing unit 103 via a corresponding one of the signal lines Sig1 to Sig8, and the first signal is input to the processing unit 103′ via a corresponding one of the signal lines Sig9 to Sig16.
The processing unit 103 will be described below, and the same goes for the processing unit 103′, too. The processing unit 103 can include amplification circuits 202, sample and hold circuits 203, and multiplexers 204. The first signal can be amplified by a corresponding one of the amplification circuits 202 (amplification units), and sampled by a corresponding one of the sample and hold circuits 203. The sampled signals can be sequentially output to an A/D converter 104 via a variable amplifier 205 from the respective multiplexers 204 for each column.
The amplification circuit 202 corresponding to, for example, a first column can be constructed using an operational amplifier A1, an integral capacitor Cf1, and a reset switch RC1. The first signal from the sensor S is input to the inverting input terminal of the operational amplifier A1, and a reference voltage Vref1 is input to the non-inverting input terminal of the operational amplifier A1. The first signal is amplified by the operational amplifier A1, and output from an output terminal. The inverting input terminal and non-inverting input terminal of the operational amplifier A1 are imaginarily short-circuited, and the voltage of the signal line Sig1 is set to the reference voltage Vref1. Note that each of operational amplifiers A2 to A8 respectively corresponding to the second to eighth columns has the same arrangement as that of the operational amplifier A1 of the first column.
The sample and hold circuit 203 corresponding to, for example, the first column can be constructed using sampling switches SHON1, SHOS1, SHEN1, and SHES1, and sampling capacitors Chon1, Chos1, Chen1, and Ches1. For example, sampling of noise components in the readout operation of the sensors S on the odd-numbered rows (rows corresponding to the signal lines G1, G2, G5, and G7) can be performed using the sampling switch SHON1 and the sampling capacitor Chon1. For example, sampling of signal components (in this example, the first signals) in the readout operation of the sensors S on the odd-numbered rows can be performed using the sampling switch SHOS1 and the sampling capacitor Chos1. For example, sampling of noise components in the readout operation of the sensors S on the even-numbered rows (rows corresponding to the signal lines G2, G4, G6, and G8) can be performed using the sampling switch SHEN1 and the sampling capacitor Chen1. For example, sampling of signal components in the readout operation of the sensors S on the even-numbered rows can be performed using the sampling switch SHES1 and the sampling capacitor Ches1. In the above-described arrangement, the sample and hold circuit 203 can perform correlated double sampling (CDS). Each of the sample and hold circuits 203 respectively corresponding to the second to eighth columns has the same arrangement as that of the sample and hold circuit 203 of the first column.
The multiplexer 204 corresponding to, for example, the first column includes switches MSON1, MSEN1, MSOS1, and MSES1. The multiplexer 204 sequentially sets the switches in a conductive state, and outputs the first signals parallelly read out from the sample and hold circuit 203. Each of the multiplexers 204 respectively corresponding to the second to eighth columns has the same arrangement as that of the multiplexer 204 of the first column.
Note that a first processing unit 103a (
The processing unit 103′ can have the same arrangement as that of the processing unit 103. For example, an amplification circuit 202′ corresponding to the first column can be constructed using an operational amplifier A9, an integral capacitor Cf9, and a reset switch RC9.
The reference voltage Vref1 supplied to the non-inverting input terminal of the operational amplifier A1 and a reference voltage Vref1′ supplied to the non-inverting input terminal of the operational amplifier A9 can satisfy a relation Vref1<Vref1′. When, for example, the power supply voltage is set to 5V, Vref1 is preferably set to, for example, 0.5V and Vref1′ is preferably set to, for example, 4.5V. This sets the respective sensors S11 to S88 in a reverse bias state, thereby allowing the respective sensors S11 to S88 to perform photoelectric conversion.
In the above-described arrangement, signals from the multiplexers 204 and multiplexers 204′ are amplified by the variable amplifier 205 and a variable amplifier 205′, converted into digital data by the A/D converter 104 and an A/D converter 104′, and then output to an image data generation unit 105, respectively. The image data generation unit 105 generates image data based on the signals ADCDATA_a, ADCDATA_b, ADCDATA_c, and ADCDATA_d from the A/D converters 104 and 104′.
In the lower portion of
Before irradiation with radiation, in response to a control signal from a control unit 108, a power supply unit 107 supplies a power to each unit, thereby setting the imaging apparatus 1001 in a standby state. Upon irradiation with radiation, each sensor S generates and accumulates charges (electron-hole pairs).
A predetermined reset operation is performed before a first signal corresponding to the amount of one of the electron and hole of each of the electron-hole pairs and a second signal corresponding to the amount of the other of the electron and hole of each of the electron-hole pairs are read out from each sensor S. More specifically, the integral capacitors Cf1 to Cf16 of the respective processing units 103a, 103b, 103a′, and 103b′ are reset. This is done by sequentially setting the reset switches RC1 to RC8 and RC9 to RC16 in a conductive state, as shown in
After resetting the integral capacitors Cf1 to Cf16, the sampling switches SHON1 to SHONE and SHON9 to SHON16 are set in a conductive state. The outputs of the amplification circuits 202 and 202′ immediately after the reset operation are held by the sampling capacitors Chon1 to Chon8 and Chon9 to Chon16 as noise levels. Note that a period during which the sampling switch SHON is in a conductive state can be determined based on the relationship between a sampling period and the capacitance value of the sampling capacitor Chon.
The respective switch elements T11 to T18 are set in a conductive state by activating the signal of the signal line G1. The first signals of the respective sensors S11 to S18 are input to the processing unit 103 via the signal lines Sig1 to Sig8, respectively. The second signals are input to the processing unit 103′ via the signal lines Sig9 to Sig16, respectively.
The sampling switches SHOS1 to SHOS8 and SHOS9 to SHOS16 are set in a conductive state. As a result, the first signals and the second signals are held by the sampling capacitors Chos1 to Chos8 and Chos9 to Chos16 as signal levels, respectively.
After that, the switches MSON1 to MSON8 and MSOS1 to MSOS8 of the multiplexers 204 and the switches MSON9 to MSON16 and MSOS9 to MSOS16 of the multiplexers 204′ are sequentially set in a conductive state. Consequently, the signals of the sample and hold circuits 203 are sequentially output to the A/D converters 104 and 104′. These signals are converted into digital data by the A/D converters 104 and 104′, and output to the image data generation unit 105. The above-described operation is performed in the same manner up to the eighth row, thereby reading out pixel signals from the respective pixels P of the detection unit 101.
In this case, as described above, Vref1<Vref1′ is satisfied. Assuming that the power supply voltage is set to 5V, for example, Vref1 can be set to 0.5V and Vref1′ can be set to 4.5V. In the operational amplifier A1, for example, the first signals from the respective sensors S11 to S81 change the voltage of the output terminal of the operational amplifier A1 within the range of 0.5 V to 0 V. That is, the output range (width) of the operational amplifier A1 is 0.5 V, which is an insufficient output range. In the operational amplifier A9, the second signals from the sensors S11 to S81 change the voltage of the output terminal of the operational amplifier A9 within the range of 4.5 V to 5.0 V. That is, the output range of the operational amplifier A9 is 0.5 V, which is an insufficient output range. To solve this problem, as exemplified in
Referring to
By arranging the processing units 103 and 103′ so that their gains become equal, the values of HX(1, 1) and EX(1, 1) become almost equal to each other. It is possible to equalize the gains of the processing units 103 and 103′ by, for example, equalizing the capacitance values of the respective integral capacitors Cf, and equalizing the gains of the variable amplifiers 205 and 205′. The number of signal components is doubled by, for example, adding the thus obtained two data, as compared with a case in which image data is generated based on only one of the first signal and second signal. On the other hand, since a noise level is determined based on the wiring capacitance of a signal line and the arrangement of each circuit, the noise levels of the processing units 103 and 103′ become equal to each other by forming them with the same circuit arrangement and layout arrangement. As a result, in the imaging apparatus 1001, an S/N ratio is 21/2 times that obtained when image data is generated based on only one of the first signal and second signal.
The respective sampling switches SHON1 to SHON9, SHON9 to SHON16, SHOS1 to SHOS9, SHOS9 to SHOS16, SHEN1 to SHEN8, SHEN9 to SHEN16, SHES1 to SHES8, and SHES9 to SHES16 of the sample and hold circuits 203 and 203′ can be driven at the same time. This can remove external noise which influences the detection unit 101.
The imaging apparatus 1001 need not always use both the first signal and the second signal, and may determine which of the first signal and second signal is used to generate image data, in accordance with an application purpose. When one of the first signal and second signal is used, it is possible to set one of the readout units 106 and 106′ (or at least some of the internal units thereof), which corresponds to the other of the first signal and second signal, in an idle mode.
As described above, according to this embodiment, a first signal corresponding to the amount of one of the electron and hole of each of electron-hole pairs generated in each sensor S and a second signal corresponding to the amount of the other of the electron and hole of each of the electron-hole pairs are read out, and at least one of the first signal and second signal is used to generate image data in accordance with an application purpose. According to this embodiment, therefore, the present invention is advantageous in improving the performance of the imaging apparatus. Especially, it is possible to improve the S/N ratio by adding the first signal and the second signal. Furthermore, it is possible to suppress power consumption by setting, in an idle state, one of the processing unit 103 for reading out the first signal and the processing unit 103′ for reading out the second signal in accordance with the operation mode.
An imaging apparatus 1002 according to the second embodiment will be described with reference to
In this embodiment, it is possible to obtain the same effects as those in the first embodiment, and to shorten the time taken to read out pixel signals. Note that if the processing units 103 and 103′ are mounted in the detection unit 101 by TAB or COF, the processing units 103 and 103′ may be shifted by the pitch of pixels P, and mounted to overlap the detection unit 101.
An imaging apparatus 1003 according to the third embodiment will be described with reference to
In this embodiment, the gains (amplification factors) of processing units 103 and 103′ are changed by setting different capacitance values for integral capacitors Cf in amplification circuits 202 described above (different capacitance values for integral capacitors Cf1 to Cf8 and integral capacitors Cf9 to Cf16). It is possible to increase the S/N ratio by increasing the gain, but the saturation level of the signal decreases. On the other hand, the S/N ratio is decreased by decreasing the gain but the saturation level of the signal increases. By arranging the processing units 103 and 103′ having different gains, it is possible to obtain first and second signals having different signal levels.
The imaging apparatus 1003 can include, for example, a determination unit (not shown). The determination unit may determine (or select) based on the irradiation dose of radiation which of the first signal and second signal is used to generate image data, and generate image data based on the determination result. Note that the determination processing need only be performed based on the result of comparing the irradiation dose of radiation with a predetermined threshold.
For example, EX(1, 1) can be selected when the radiation dose is smaller than a threshold TH, and HX(1, 1) can be selected when the radiation dose is larger than the threshold TH. The ratio of the gains of the processing units 103 and 103′ may be set to a different value for each pixel P or each column. Alternatively, EX(1, 1) may be selected when EX(1, 1) is smaller than a predetermined threshold, and HX(1, 1) may be selected when EX(1, 1) is larger than the predetermined threshold.
As described above, according to this embodiment, it is possible to obtain the same effects as those in the first embodiment. Especially, it is possible to increase the S/N ratio when the radiation dose is small, and to widen the dynamic range when the radiation dose is large, and thus the present invention is advantageous in improving the performance.
An imaging apparatus 1004 according to the fourth embodiment will be described with reference to
On the other hand, a table 10c of
In
According to this embodiment, it is possible to obtain the same effects as those in the first embodiment, and to decrease the circuit scale of the processing unit 103′. It is also possible to smooth a change in signal in image data.
Furthermore, according to this embodiment, the present invention is advantageous in an arrangement wherein which of the first signal and second signal is used to generate image data is determined based on the operation mode, and one of readout units 106 and 106′ may be set in an idle state in accordance with the operation mode. For example, if a high resolution is required, the imaging apparatus 1004 can operate in a high-resolution mode in which first signals read out for each column are used. If no high resolution is required, the imaging apparatus 1004 can operate in a low-resolution mode (for example, a low-power consumption mode or high-speed mode) in which second signals read out for every two columns are used. Furthermore, signals may be read out from the respective sensors S for each row or every two rows in accordance with the operation mode. As described above, in this arrangement, it is also possible to appropriately set the resolution, power consumption, and readout speed in accordance with the operation mode. Note that the present invention is not limited to the above-described operation modes, and it is possible to set one of the processing units 103 and 103′ in an idle state in accordance with whether the radiation dose is larger or smaller than a predetermined threshold.
An imaging apparatus 1005 according to the fifth embodiment will be described with reference to
In
In the fourth embodiment, for example, the data value on the first row and the fourth column is E13+E14+H14, and contains the signals on the first row and the third column. On the other hand, in this embodiment, the data value on the first row and the fourth column is E14+E15+H13+H14, and contains the signals on the first row and the third column and the signals on the first row and the fifth column. According to this embodiment, therefore, it is possible to smooth a change in signal in image data, as compared with the fourth embodiment.
According to this embodiment, it is possible to obtain the same effects as those in the fourth embodiment, and decrease the circuit scale of the processing unit 103. It is also possible to smooth a change in signal in image data.
An imaging apparatus 1006 according to the sixth embodiment will be described with reference to
If shooting is performed while the imaging apparatus 1006 is irradiated with radiation, a noise current flows through a signal line due to a leakage current from a switch element T or capacitance coupling between the switch element T and the signal line, resulting in deterioration in image quality of image data such as unevenness. In this embodiment, a processing unit 103′ is used to read out noise components due to the noise current, and a processing unit 103 is used to read out signal components due to radiation irradiation.
Next, sampling switches SHON9 to SHON16 of the processing unit 103′ are set in a conductive state for a predetermined period, and noise components are held by sampling capacitors Chon9 to Chon16, and sampled. After that, sampling switches SHOS9 to SHOS16 of the processing unit 103′ are set in a conductive state for a predetermined period, and signal components are held by sampling capacitors Chos9 to Chos16, and sampled. Simultaneously with sampling, sampling switches SHON1 to SHONE of the processing unit 103 are set in a conductive state for a predetermined period, and noise components are held by sampling capacitors Chon1 to Chon8, and sampled.
Next, the signal of a signal line G1 is activated to set respective switch elements T11 to T18 in a conductive state. The first signals of respective sensors S11 to S18 are input to the processing unit 103 via signal lines Sig1 to Sig8, respectively. The second signals of the respective sensors S11 to S18 are input to the processing unit 103′ via signal lines Sig9 to Sig16, respectively. After that, sampling switches SHOS1 to SHOS8 of the processing unit 103 are set in a conductive state for a predetermined period, and signal components are held by sampling capacitors Chos1 to Chos8, and sampled. The above-described operation is sequentially performed for the remaining rows (rows corresponding to signal lines G2 to G8).
That is, the processing unit 103′ performs sampling twice before setting the switch elements T11 to T18 in a conductive state. First sampling is performed by the sampling switches SHON9 to SHON16 and the sampling capacitors Chong to Chon16. Second sampling is performed by the sampling switches SHOS9 to SHOS16 and the sampling capacitors Chos9 to Chos16. In this example, since an A/D converter 104′ A/D-converts the difference between the result of the first sampling and that of the second sampling, if radiation irradiation starts during this period, noise components due to a noise current generated by the radiation irradiation are A/D converted.
On the other hand, the processing unit 103 performs first sampling before setting the switch elements T11 to T18 in a conductive state, and performs second sampling after setting them in a conductive state, that is, performs sampling twice in total. The first sampling is performed by the sampling switches SHON1 to SHON8 and the sampling capacitors Chon1 to Chon8. The second sampling is performed by the sampling switches SHOS1 to SHOS8 and the sampling capacitors Chos1 to Chos8. Signal components to be acquired can be read out from the difference between the result of the first sampling and that of the second sampling.
According to this embodiment, it is possible to reduce noise components due to shooting while the imaging apparatus is irradiated with radiation, thereby improving the S/N ratio. It is also possible to detect the start of radiation irradiation based on the result of A/D conversion of noise components read out by the processing unit 103′. According to this embodiment, therefore, the present invention is advantageous in improving the performance of the imaging apparatus.
As exemplified in
As the radiation dose can change with time, it is possible to cancel noise components with high accuracy by performing sampling so that a period from sampling during the period Ta to sampling during the period Tb becomes short. For example, as exemplified in
Although the six embodiments have been described above, the present invention is not limited to them, and can be changed, as needed, in accordance with the objects, states, applications, functions, and other specifications. Other embodiments can also practice the present invention.
An imaging system to which a radiation imaging apparatus is applied is not limited to the arrangement of the radiation inspection apparatus RIA exemplified in
While the present invention has been described with reference to exemplary embodiments, it is to be understood that the invention is not limited to the disclosed exemplary embodiments. The scope of the following claims is to be accorded the broadest interpretation so as to encompass all such modifications and equivalent structures and functions.
This application claims the benefit of Japanese Patent Application No. 2013-091785, filed Apr. 24, 2013, which is hereby incorporated by reference herein in its entirety.
Number | Date | Country | Kind |
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2013-091785 | Apr 2013 | JP | national |