1. Field of the Invention
The present invention relates to an image pickup apparatus, and more specifically to an image pickup apparatus that uses an image sensor having a plurality of output stages to enable signal charges to be read out at a high transfer rate.
2. Description of the Background Art
To achieve an image sensor enabling signal charges to be read out at a high transfer rate, an image sensor or an image pickup apparatus having a plurality of outputs or horizontal transfer paths is proposed in Japanese patent laid-open publication Nos. 2004-194023 and 103421/1999. The former, '023 publication, discloses an image pickup apparatus in which signal charges are read out only from a selected portion of its photosensitive array and are then transferred to be developed from two output amplifiers in the form of analog signals. The latter, '421 publication, discloses a solid-state image sensor and a driving method thereof in which the photosensitive array is not divided in the horizontal direction but in the vertical direction into the upper and lower areas, which have respective horizontal transfer paths in the upper and lower ends through which the image signals are read out.
Another Japanese patent laid-open publication No. 298626/1996, discloses a solid-state image sensor that has one end of its horizontal transfer path branched into two, one of whose output stage is selected depending on the sensitivity for photographing.
The above-identified '023 and '421 publications provides a plurality of output stages so that signal charge reading is advantageously achieved at a high rate. To do so, however, power saving and signal corrections by means of a variety of processings are required due to the divided photosensitive array. The image sensor taught by the above-identified '626 publication is excellent in that the sensitivity of photographing is selectable depending upon the shooting environment to provide an image signal for the appropriate image quality, but is inferior in signal charge reading.
It is an object of the present invention to provide an image pickup apparatus that includes a plurality of output circuits and may appropriately operate depending on use situation, and an image processing method therefor.
The present invention provides an image pickup apparatus comprising: an image sensor for receiving incident light from an subject field and producing signal charges corresponding to the incident light, the image sensor including a plurality of output circuits for converting the signal charges to an image signal to output the image signal, the image sensor being driven depending on operational situation; a controller for generating a control signal to control operation of the image sensor depending on a multiple-output mode or a single-output mode; a timing generator operative in response to the control signal for generating a timing signal for the image sensor; a drive signal generator operative in response to the timing signal for generating a drive signal; a preprocessor for applying at least noise reduction and digitization on the image signal on an output channel corresponding to effective one of the plurality of output circuits; and a processing controller operative in response to the control signal for controlling a processing for each of the output channels of the preprocessor, the controller determining whether the multiple-output mode is a second speed mode faster than a first speed mode, and generating the control signal depending on a result of determination, the processing controller controlling the processing for a one-output channel in the first speed mode, and controlling the processing for a multiple-output channel in the second speed mode.
The image pickup apparatus of the present invention, determines, in a controller, a condition is a second speed mode faster than a first speed mode determination, generates a control signal depending on the determination result, controls, in response to the control signal, a timing generator, a drive signal generator, and a processing controller, images by an imaging subsection driven by the drive signal generator, provides the obtained image signal in a plurality of the outputs in the second speed mode, reads out a normal image signal in the first speed mode, and controls, by the processing controller, a preprocessor to which the image signal is supplied correspondingly to the number of the outputs of the imaging subsection, thereby making it possible to appropriately operate depending on use situation. The useless operation may thus be avoided.
The present invention also provides an imaging processing method for producing an image signal from signal charges obtained via photoelectric conversion from incident light from a subject field, and providing the image signals on multiple outputs driven depending on operational situation, the method comprising: a first step of acquiring a preset condition; a second step of determining whether the acquired set condition includes a first speed mode or a second speed mode that is faster than the first speed mode, and producing a control signal depending on a result of determination; a third step of setting generation of a timing signal for providing the image signals in multiple outputs in response to the result of determination including the second speed mode; a fourth step of setting generation of a normal timing signal for outputting the image signal on one channel in response to the result of determination including the first speed mode; a fifth step of setting at least noise reduction and digitization on the image signals on a plurality of output channels supplied according to the result of determination including the second speed mode; a sixth step of setting at least noise reduction and digitization on the image signal on one output channel supplied according to the result of determination including the first speed mode; a seventh step of rearranging image data on the plurality of output channels digitized and supplied according to the result of determination including the second speed mode into a sequence of pixels in a normal dot-sequential manner; and an eighth step of setting output of the image data on one output channel digitized and supplied according to the result of determination including the first speed mode, whereby imaging is performed according to the settings to obtain the image data through the preprocessings.
The imaging processing method of the present invention, acquires a set condition, determines whether the condition includes a first speed mode or a second speed mode faster than the first speed mode, produces a control signal depending on the determination result, sets generation of a timing signal to provide an image signal in multiple outputs according to the determination result including the second speed mode, sets at least noise reduction and digitization on the supplied image signal on a plurality of output channels, rearranges the supplied image signal on the plurality of output channels into a sequence of pixels in a normal dot-sequential manner, sets generation of a normal timing signal to provide the image signal in a single output according to the determination result including the first speed mode, sets at least noise reduction and digitization on the supplied image signal on the single output channel, and sets the output of the supplied image signal on the single output channel, thereby making it possible to appropriately operate for each mode the processing depending on the output for imaging, and avoid useless operation.
Further in accordance with the present invention, an image pickup apparatus comprises: an image sensor for receiving incident light from an subject field and producing signal charges corresponding to the incident light, the image sensor including a plurality of output circuits for converting the signal charges to an image signal to output the image signal, the image sensor being driven depending on situation of operation; an operation panel for instructing the operation; a controller operative in response to at least one of an operation signal from the operation panel and a predetermined condition for producing a control signal to control the operation of the image sensor; a timing generator operative in response to the control signal for generating a timing signal for the image sensor; a drive signal generator operative in response to the timing signal for generating a drive signal; a preprocessor for applying at least noise reduction and digitization on the image signal on an output channel corresponding to effective one of the plurality of output circuits; and a power controller operative in response to the control signal for controlling power supply, with respect to at least one of the output channels, to the preprocessor and the plurality of output circuits of the image sensor.
Still further in accordance with the invention, an image pickup apparatus comprises: an image sensor for receiving incident light from an subject field and producing signal charges corresponding to the incident light, the image sensor including a plurality of output circuits for converting the signal charges to an image signal to output the image signal, the image sensor being driven depending on situation of operation; an operation panel for instructing the operation to produce an operation signal; a controller operative in response to the operation signal for producing a control signal to control a recording operation mode and a non-recording operation mode of the apparatus; a timing generator operative in response to the control signal for generating a timing signal for the image sensor; a drive signal generator operative in response to the timing signal for generating a drive signal; a preprocessor for applying at least noise reduction and digitization on the image signal on an output channel corresponding to effective one of the plurality of output circuits; and a processing controller operative in response to the control signal for controlling a processing for each of the output channels of the preprocessor, the controller being operative in response to a set condition and a condition included in the operation signal to determine whether to be in the recording operation mode or the non-recording operation mode to produce the control signal according to a result of determination, the processing controller controlling, in the recording operation mode, the processing at least on one output channel, and controlling, in the non-recording operation mode, the processing in a plurality of output channels.
The objects and features of the present invention will become more apparent from consideration of the following detailed description taken in conjunction with the accompanying drawings in which:
With reference to the accompanying drawings, preferred embodiments of the image pickup apparatus of the present invention will be described in more detail. The instant embodiment is directed to an image pickup apparatus applied to a digital camera 10,
Referring to
The optical system 12 has a function of conducting incident light 13 from a subject field into the imaging subsection 14 in response to the operation on the control panel 34. The optical system 12 adjusts the angle of field or focal distance in response to the zoom operation or half-stroke operation of a shutter release button, not shown, on the control panel 34.
The imaging subsection 14 includes an image sensor 44,
Referring now to
The horizontal transfer path 46 is comprised of the horizontal transfer paths 46a and 46b as its left and right halves partitioned by a central line C, which nearly bisects the columns of the photosensitive devices forming the imaging array of cells into two portions. From the horizontal transfer path 46 (46a, 46b), depending on the drive mode described below, both or either of output amplifiers 50 and 52 conduct analog electrical signals to output.
The image sensor 44 will further be described below. The image sensor 44 includes the vertical transfer paths (VCCD), not shown, formed so as to bypass the photosensitive devices, and the line memory (LM) 48. Because they have the same configurations as the conventional ones, their description will be omitted here. The vertical transfer paths are driven with four-phase drive signals φV1 to φV4. In the following, signals are designated with reference numerals of connections on which they are conveyed.
Consider now the horizontal transfer path 46 (46a, 46b), which is the characteristic of this embodiment. The horizontal transfer path 46 (46a, 46b) is arranged in the form as shown in
As described above, the electrodes 54 and 56 connected into one group so that the groups are the same in number as the vertical transfer paths. This is because the line memory 48 intervenes between the vertical transfer paths and horizontal transfer path 46. The line memory 48 allows only the signal charges of the columns connected to the line memory 48 to be read into the horizontal transfer path 46 for temporary storage.
The image sensor 44 is the same as those disclosed in the conventional technologies except the electrode arrangement or alignment of the horizontal transfer path 46 and the timing of the driving waveforms as will be described below. The disclosure is shown in
The signal charges transferred from the vertical transfer path are temporarily stored in the impurity layers 58 under the electrodes 56. The signal charges located around the central portion C are initially stored immediately under the electrodes H1 and H4 separately.
The drive signal φH4 is then applied at its low voltage to the electrode H4, thereby transferring the signal charges immediately under the electrode H4 to the portion under the electrode H1. One group of drive signals φH1 and φH4 is then applied along with a group of opposite-phase drive signals φH2 and φH3, thereby sequentially transferring the signal charges #4, #2, #3, and #1 in the horizontal transfer path 46a to the left, and signal charges #6, #8, #5, and #7 in the horizontal transfer path 46b to the right, respectively. Those signal charges #1 through #8 are indicated with circles in the figures.
Well, referring to
The signal charges transferred from the vertical transfer path are temporarily stored, via the impurity layer 60 under the electrode 56, in the impurity layer 58 under the electrode 54. A group of drive signals φH1 and φH3 is applied along with a group of opposite-phase drive signals φH2 and φH4. This transfers all of the signal charges in the horizontal transfer paths 46a and 46b to the left.
The image sensor 44 is not limited to the specific configuration of this embodiment, but may have, as shown in
These electrodes are the same as those shown in
It is apparent that the cross-sectional view in
The signal charges transferred from the vertical transfer path to the horizontal transfer path 46 are temporarily stored, via the impurity layer 60 under the electrode 56, in the impurity layer 58 under the electrode 54. Particularly, the signal charges located around the central portion C are initially stored under the electrodes H3 and H5 separately. The low voltage (L level) drive signal φH5 may be applied to move the signal charges under the electrode H5 to the portion under the electrode H3. Then, a group of drive signals φH1, φH2, φH6, and φH7, and a group of opposite-phase drive signals φH3, φH4, φH5, and φH8 are applied to the electrodes to transfer the signal charges in the horizontal transfer path 46a to the left in
Although not shown, one group of drive signals φH2, φH3, φH6, and φH7, and one group of opposite-phase drive signals φH1, φH4, φH5, and φH8 may be applied to transfer the signal charges to the right over the horizontal transfer paths 46a and 46b. The transfer to the right may cause a mirror image to be produced. Such a mirror image may be used, for example, for an image viewed on an on-vehicle rear-view mirror and the like.
In this way, the electrode wiring and its drive timing may be modified to select any one of the two channels of transfer direction. Depending on the user's request, the signal charges may thus be transferred in both directions or in a single direction. With the horizontal transfer only in one direction, the imaging subsection 14 is adapted to develop only the output OS1 (Output Signal 1).
Although the image sensor 44 has the four-phase and eight-phase drive signals applied in this embodiment, it may be adapted to have a six-phase drive signal applied. A timing chart may illustrate the number of the outputs depending on the operation of the shutter release button of the digital camera 10 shown in
Referring back to
The preprocessor 16 has an analog front end (AFE) function. That function has noise reduction of the analog electrical signals 68 and 70 using the correlated double sampling (CDS), and digitization, i.e. analog-to-digital (A/D) conversion, of the noise-reduced analog electrical signals 68 and 70. Although the preprocessor 16 is supplied with the two-channel analog electrical signals 68 and 70, when it is supplied with a one-channel input, the CDS sampling and A/D conversion are accordingly controlled by the drive mode control 32 so as to operate for only one channel. The preprocessor 16 outputs, corresponding to the two-channel inputs, two-channel output signals 72 and 74 to the input image adjuster 18.
The input image adjuster 18 has a function of sampling the output signals 72 and 74, which are concurrently supplied in the form of two-channel outputs, at a frequency, for example, twice as high as the frequency of the output signals, to take in the output data, i.e. the image data of each channel. The input image adjuster 18 is not limited to the above-described function, but may be adapted to store the supplied output signals 72 and 74 in respective memories not shown. The obtained output signal 76 is supplied, over the bus 78 and signal line 80, to the rearranging circuit 20.
The rearranging circuit 20 has a function of rearranging the image data obtained as the two-channel outputs to correct the arrangement of the pixel data into a dot-sequential manner corresponding to a scanning line, for example, to combine the data into a single picture. The input image adjuster 18 and rearranging circuit 20 may not adjust the inputted image or rearrange the pixel data when the preprocessor 16 outputs one channel. The rearranging circuit 20 outputs the obtained image data, over the signal line 80, bus 78, and signal line 82, to the signal processor 22.
The signal processor 22 has a function of synchronizing the supplied image data, and using the synchronized image data to generate a luminance and chrominance (Y/C) signal. The signal processor 22 also has a function of converting the generated Y/C signal into, for example, a signal applicable for a liquid crystal monitor. The signal processor 22 also has a function of compressing the generated Y/C signal depending on the recording mode, and expending the compressed signal to restore or reproduce the signal. The recording mode includes JPEG (Joint Photographic Experts Group), MPEG (Moving Picture Experts Group), and raw data modes and the like. The signal processor 22 supplies the image data processed in the recording mode, over the signal line 82, bus 78, and signal line 86, to the medium control 36. The signal processor 22 delivers to the monitor 40 the signal 84 in the form appropriate for a liquid crystal monitor.
The clock generator 24 has a function of generating a reference clock signal 90. The clock generator 24 generates the clock signal 90 in response to the control signal 88 fed from the system control 30. The clock generator 24 outputs the generated clock signal 90 to the timing signal generator 26. The clock generator 24 preferably also has a function of generating the clock signal depending on the sampling frequency of the output signals 72 and 74.
The timing signal generator 26 has a function of generating various timing signals such as vertical and horizontal synchronous signals for the imaging subsection 14, a field shift gate signal, vertical and horizontal timing signals, and an overflow drain (OFD) signal. This function generates various timing signals 94 in response to the control signal 92 fed from the drive mode control 32. The timing signal generator 26 outputs the various timing signals 92 to the driver 28. In particular, the timing signal generator 26 supplies the driver 28 with a horizontal timing signal that drives, in response to the control signal 92, the horizontal transfer path 46 in two-output or one-output mode. The timing signal generator 26 also has a function of generating various sampling signals and an operational clock for use in the imaging subsection 14 as well as in various portions including, for example, the preprocessor 16 in the camera 10. The timing signal generator 26 supplies various sampling signals 96 to the drive mode control 32.
The driver 28 has a function of using the supplied various timing signals 94 to generate, depending on its drive mode, the vertical and horizontal drive signals. The driver 28 supplies the vertical and horizontal drive signals 98 to the imaging subsection 14.
The system control 30 has a function of generating various control signals in response to the operation signal 100 from the control panel 34 as described below. The system control 30 includes, as shown in
The setting/operation-responsive control functional block 102 serves as acquiring the operation signal 100 from the control panel 34 as a set condition, and generating, depending on the set condition, the various control signals. The setting/operation-responsive control functional block 102 includes, as specifically shown in
The power supply control functional block 108 has a function of generating a control signal that controls the supply/disconnection of the electric power under the control of the two-output/one-output control functional block 106. The power saving control functional block 110 has a function of generating a control signal that controls, under the control of the two-output/one-output control functional block 106, the normal voltage/voltage drop of the working voltage. For example, the power saving control functional block 110 may provide control, for the one-output control, in such a way that the one output channel to be operated is supplied with lower power or voltage, and the output channel to be inoperable is supplied with much lower power. This may be controlled by the power supply control functional block 108. The power-supply capacity threshold setting functional block 112 has a function of presetting a threshold of the capacity of the power supply, and supplying the setting to the power determination control functional block 104. The threshold value thus set is supplied from the control panel 34.
The power determination control functional block 104 uses the type and threshold of power supply and the user setting as the determination condition, and makes a determination depending on at least one of the type and threshold of power supply, and user setting, or a combination thereof, and generates a control signal that achieves operation depending on the power.
Referring again back to
The drive mode control 32 has a function of generating, in response to the supplied control signal 114, the control signal 92 for the timing signal generator 26, and supplying the sampling signal 96 from the timing signal generator 26 to the selected preprocessor 16. The drive mode control 32 supplies the preprocessor 16 with sampling signals 118 to 124. The drive mode control 32 controls the supply of the sampling signals 118 to 124 for the two-channel CDS circuit and A/D converters, not shown.
The control panel 34 includes, as collectively shown in
The motion picture mode setter 134 is used to decide whether to display a motion picture on the liquid crystal monitor 40, and sets the decision in the form of, for example, a value of flag. This setting allows the monitor 40 to display the image of a subject field captured in the through-picture mode. The motion picture mode setter 134 has items for setting a picture resolution, the number of frames to be displayed, and a continuous-shooting speed. The resolution item is designated for selecting, for example, the resolution of VGA (Video Graphics Array) specifications, HDTV (High-Definition TeleVision) specifications/standard. The number of frames to be displayed is designated for selecting either of 30 and 15.
The continuous-shooting speed setter 136 has a plurality of continuous-shooting speeds provided, from which one is selected depending on the two-output or one-output mode. Continuous-shooting speeds may be set to a value appropriate for an image formed of a specific number of pixels. Continuous-shooting speeds are selectable in dependent upon whether or not the rate of continuous-shooting frames is less than a predetermined threshold for continuous shooting in such a fashion that if the rate is less than the threshold the one-output mode is selected and otherwise the two-output mode to drive the solid-state image sensor 44.
The shutter release button 138 is depressed for selecting, in response to its half or full stroke depressing, the operational timing and mode of the digital camera 10. The shutter release button 138 renders, in response to its half-stroke depression, the automatic exposure (AE) and automatic focusing (AF) operations of the camera 10. These operations allows an image obtained and display in the motion picture to determine an appropriate aperture stop value, shutter speed, and focal distance. The shutter release button 138 also defines and sends, in response to its full-stroke operation, the timing of the recording start and end to the system control 30, and provides the operational timing suitable for the set mode of the digital camera 10. The set mode includes a still image recording and a motion picture recording and the like.
The medium control 36 has an interface control function that controls, depending on a recording medium to be handled, the recording and reproduction of image data. The medium control 36 may control the write in and read out of image data 140 to and from a PC (Personal Computer) card, which is a semiconductor recording medium, or may control the write in and read out responsive to a USB (Universal Serial Bus) controller built therein. The recording medium 38 conforms to various semiconductor-card specifications.
The display monitor 40 may be implemented by a liquid crystal display device or the like. The monitor 40 visualizes and displays the image data 84 supplied from the signal processor 22.
The system configuration described above may optimize the operation of the digital camera 10, depending on whether the signal charges are read out from the horizontal transfer path 46 in the two-output or one-output mode.
The general operation of the digital camera 10 will be described briefly. Referring now to
The control signal 114 then sets the timing signal generator 26 to the two-output drive condition (step S14). The control signal 114 also sets the timing signal generator 26 to the one-output drive condition (step S16).
In response to the two-output drive setting condition, the system control 30 generates, by the two-output/one-output control functional block 106, the control signal 114 that controls the horizontal transfer of the imaging subsection 14 in two-output. The control signal 114 is outputted to the drive mode control 32 as well as to the input image adjuster 18 and rearranging circuit 20 (step S18). Particularly, the drive mode control 32 is set, in response to the two-output inputs, to supply to the preprocessor 16 the two-channel sampling signals 118 to 124.
In response to the one-output drive setting condition, the system control 30 generates, by the two-output/one-output control functional block 106, the control signal 114 that controls the horizontal transfer of the imaging subsection 14 in the one-output mode. The control signal 114 is outputted to the drive mode control 32 as well as to the input image adjuster 18 and rearranging circuit 20. The drive mode control 32 is set, in response to the one-output instruction input, to supply to the preprocessor 16 the one-channel sampling signals 118 and 122.
After the setting, a subject field is imaged (step S22). The imaging subsection 14 reads out the image signal obtained during the imaging on the outputs the number of which depends upon the setting, and outputs the image signal to the preprocessor 16. The preprocessor 16 provides the noise reduction and digitization (step S24). Particularly, in the two-output mode, the preprocessor 16 uses the supplied sampling signals 118 to 124 to provide the noise reduction and digitization on the image signals 68 and 70. In the one-output mode, the preprocessor 16 uses the supplied sampling signals 118 and 122 to provide the noise reduction and digitization on the image signal 68. In the one-output mode, the preprocessor 16 processes at a speed that is lower than in the two-output mode and is the same as in the conventional technology.
The image input adjuster 18 and rearranging circuit 20 provide, in the one-output mode, pass the supplied image data 72 therethrough, and supply the passed data to the signal processor 22. Conversely, in the two-output mode, the supplied image data 72 and 74 are concurrently taken into the image input adjuster 18, and the image data 80 thus taken in is rearranged by the rearranging circuit 20. The rearranging circuit 20 thus provides a frame of image and outputs the image data representative of the frame of image to the signal processor 22.
The signal processor 22 synchronizes the supplied image data 82 and processes the synchronized image data into the Y/C data depending on the resolution (step S28). The signal processor 22 displays the image data 84 converted for the liquid crystal monitor (step S30). After the display, it is determined whether to end the process (step S32). When the operation signal 100 instructing the end is supplied (YES), the digital camera 10 stops the operation. When the operation signal 100 indicates continuation or no instructions (NO), the operation is continued to step S22 and the above-described series of processings starting at the imaging will be repeated. For the operation to continue, the control may return to the determination step S12 on whether the resolution is of the HDTV.
The operation stated above may read out from the imaging subsection 14 the image signal at the optimum frame rate and display it.
The digital camera 10 may be adapted for, in addition to providing control depending on the resolution, providing control depending on the displayed frame rate.
The digital camera 10 may be adapted for switching the control in dependent upon the continuous-shooting speed. Referring to
The power control 142 has a function of controlling, in response to the control signal 144, the power supply to the output gates (OG) and amplifier disposed in the image sensor 44, and to the CDS circuit and A/D converter contained in the preprocessor 16. The power control 142 controls the power supply by turning on or off, at least, the power supply to the OG gates and amplifier and the like, when not used, in the image sensor 44, and to the CDS circuit, A/D converter, and amplifier in the preprocessor 16 and the like. For that aim, the power control 142 has its power line 146 connected for turning on or off the power supply to any of the OG gates and amplifier and the like, while unused, in the image sensor 44, and the three power lines 148, 150, and 152 dedicated for the one-output channel to the preprocessor 16. The power control 142 has a power selector switch built therein that operates in response to the control signal 144, thereby controlling the power supply to the power supply lines 146 to 152. Note that power supply lines that are always supplying power are not shown in the figure. The control signal 144 is used for controlling the power supply to the preprocessor 16. The control signal 144 is generated by the power supply control functional block 108 in the system control 30.
The power control 142 is not limited to the function of turning on and off the power supply, but may be adapted for providing such a control that, when the imaging subsection 14 is controlled to its one-output channel, the power to be supplied to the output channel not operated is rendered much lower than the power supplied to the output channel made operative so as to actually operate accordingly.
Note that, although not specifically shown, if the camera 10 is adapted not to have the drive mode control 32 included in the illustrative embodiment described earlier is not provided, then the system control 30 will be adapted for supplying, as shown in
The operation of the digital camera 10 of the alternative embodiment will be described below. Referring to
The power control 142 then sets the power to be supplied to the entire output amplifiers in the image sensor 44 and the preprocessor 16 (step S40). For the one-output power control, correspondingly to this control, the power control 142 provides control such as to restrict the power supply to the output amplifiers in the image sensor 44 and the preprocessor 16 to the one-output channel, and disconnect the power supply from the unused output amplifier in the image sensor 44 and the other output channel in the preprocessor 16 (step S42). Subsequently, the same operations as in the previous illustrative embodiment will be performed. This may decrease power consumption than in the preprocessor 16 which would otherwise be constantly supplied with the electric power.
The digital camera 10 may include in addition to the configuration shown in
The power saving control functional block 110 generates the control signal 154 in such a way that the drive voltage of 16V or 5V is applied for the two-output or one-output mode, respectively.
The power control 142 then sets the power supply to the entire output amplifiers in the image sensor 44 and the preprocessor 16 (step S40). For the one-output power control, correspondingly to this control, the power control 142 controls the power supply to restrict the output amplifier in the image sensor 44 and the preprocessor 16 to the one-output channel, and disconnect the power supply from the unused output amplifier in the image sensor 44 and the other output channel in the preprocessor 16 (step S42).
After having controlled the power supply in that way, in the two-output mode, the drive voltage of the image sensor 44 is further set to 15V (step S44), whereas, in the one-output mode, the drive voltage of the image sensor 44 is set to 5V (step S46). Subsequently, the same operations as in the previous embodiments will be performed. These operations may further decrease the power consumption, and also prevent electric charges from flowing back in the image sensor 44.
The power supply to the digital camera 10 is not limited to the configuration example in the alternative embodiment, but may also be controlled by connecting or disconnecting the clock signal to the CDS circuit and A/D converter in the preprocessor 16. The CDS circuit and A/D converter stop their operations in response to the clock-signal disconnection, and the stoppage of the operation terminates the power consumption. In this case, the digital camera 10 is preferably configured as shown in
The clock supply control 156 has a function of controlling the connection and disconnection of the sampling clock signal supplied to the CDS circuit and A/D converter in the preprocessor 16. The clock supply control 156 is supplied with clock signals 158 and 160 from the clock generator 24 or timing signal generator 26. The clock supply control 156 operates in response to the control signal 144 generated by the power saving control functional block 110. Particularly, the clock supply control 156 has its clock supply lines 162 and 164 connected to the CDS circuit and A/D converter, even when not in use. The clock supply control 156 has a selector switch, not shown, which turns on and off the clock supply in response to the control signal 144.
The operation of the digital camera 10 will be described below. Referring to
In the two-output mode, the preprocessor 16 is supplied with the clock signals 162 and 164 for the two output channels (step S48). In the one-output mode, the one output channel is supplied with the power, and the other output channel has the supply of the clock signal disconnected (step S50).
The power control 142 then sets all the output amplifiers in the image sensor 44 to be supplied with the power (step S40). For the one-output power control, correspondingly to this control, the power control 142 provides control in such a way that the output amplifier in the image sensor 44 is limited to the one-output channel and is supplied with the power, and the power supply to the unused output amplifier in the image sensor 44 is disconnected (step S42).
After the power supply control thus performed, the same operations will be carried out as in the illustrative embodiments previously described. The operations described above may also further decrease the power consumption.
The digital camera 10 may be adapted for, in addition to controlling the power consumption during the imaging operation, controlling the power supply depending on the capacity of the power supply.
The digital camera 10 shown in
The digital camera 10 may preferably be adapted to notify the user of the current processing to keep the battery life longer. Such a notice preferably allows, in response to the control from the system control 30, a specific symbol or character to be displayed on the monitor 40.
Referring to
The digital camera 10 is not limited to that operates to prioritize the situation of the digital camera 10 as described above, but may perform an operation that prioritizes the user's intention.
To control the digital camera 10 in its one-output mode, the system control 30 notifies the monitor 40 of the change to the power saving mode, and displays on the monitor 40 an inquiry on whether or not the change is approved (step S56).
The monitor 40 displays “YES” for approval and “NO” for disapproval. In response to the indications, the user moves the cursor and uses the decision key 132,
The operation described above may prioritize the user's intention in the processings, and hence increase the degree of freedom in selection to provide flexibly responsive processing.
The digital camera 10 is structured to be supplied with the power from, as shown in
When the digital camera 10 is used considering the power supply capacity, the knowledge on whether the battery 168 or AC adapter 170 is used is effective in selecting the two-output or one-output mode. The digital camera 10 shown in
The operation of the digital camera 10 will be described below.
That operation stated above may confirm the connection of the AC adapter 170 to always be controlled in its two-output operation, thereby providing more rapid processing than in the one-output operation.
The present invention has been disclosed with respect to the digital camera 10 having its through-picture mode, i.e. a motion picture being displayed on the monitor 40. The motion picture display is for the application not recording images, and the digital camera 10 is configured to select the two-output or one-output processing mainly depending on the image quality, read-out speed (of the continuous shooting), power supply control and the like.
The digital camera 10 may also be adapted to select the two-output or one-output processing based on whether to record or not. The operation will be described with reference to
According to the control flow shown in the figure, the digital camera 10 first acquires the set condition (step S10). After acquiring the set condition, the digital camera 10 determines recording or non-recording depending on the set condition and the pressing operation of the shutter release button 138 (step S62). If the set condition is the motion-picture display, or the pressing operation is the half-stroke depressing condition, or the set condition is the motion-picture shooting mode (YES), then the control passes to the two-output drive setting step S14. If the setting condition is the still-image shooting mode and the pressing operation is the full-stroke depressing condition (NO), then the control passes to the one-output drive setting step S16. Subsequently, the same operations as shown in
The two-output drive may be set for the through-image mode, automatic exposure, and automatic focusing, or may be set for the through-image mode and automatic exposure. Particularly, referring to
That drive stated above may attain the operation in the appropriate operational environment depending on the processing speed requested in a specific mode of operation, and the higher image quality of the appropriately obtained image depending on the operation.
The entire disclosure of Japanese patent application Nos. 2005-299297, 2005-299298 and 2005-299306 all filed on Oct. 13, 2005, including the specification, claims, accompanying drawings and abstract of the disclosure is incorporated herein by reference in its entirety.
While the present invention has been described with reference to the particular illustrative embodiments, it is not to be restricted by the embodiments. It is to be appreciated that those skilled in the art can change or modify the embodiments without departing from the scope and spirit of the present invention.
Number | Date | Country | Kind |
---|---|---|---|
2005-299297 | Oct 2005 | JP | national |
2005-299298 | Oct 2005 | JP | national |
2005-299306 | Oct 2005 | JP | national |