Patent Application
20150070588
1. Field of the Invention
The present invention relates to an image sensor, and more particularly, to an imaging processing circuit capable of reducing shot noise.
2. Description of the Prior Art
In image sensor application, signal-to-noise ratio (SNR) is usually a good indicator for still image quality. In small pixel design, however, because fewer photons can actually hit a pixel sensor due to smaller pixel size, shot noise will become dominant and greatly affect the SNR.
Therefore, there is a need for an imaging processing circuit that can boost SNR by reducing the undesired effect caused by shot noise.
In accordance with exemplary embodiments of the present invention, an imaging processing circuit capable of reducing shot noise is proposed to solve the above-mentioned problem.
According to an aspect of the present invention, an exemplary imaging processing circuit is disclosed. The exemplary imaging processing circuit includes at least a pixel sensor and a processing unit. The pixel sensor includes a photo detector and a storage capacitor. The photo detector is arranged for generating a first pixel signal. The storage capacitor is arranged for storing a second pixel signal. The processing unit is coupled to the pixel sensor, and arranged for generating an updated second pixel signal during a current operating cycle of the imaging processing circuit according to the first pixel signal and the second pixel signal. The updated second pixel signal is stored in the storage capacitor before a next operating cycle of the imaging processing circuit.
These and other objectives of the present invention will no doubt become obvious to those of ordinary skill in the art after reading the following detailed description of the preferred embodiment that is illustrated in the various figures and drawings.
Certain terms are used throughout the description and following claims to refer to particular components. As one skilled in the art will appreciate, manufacturers may refer to a component by different names. This document does not intend to distinguish between components that differ in name but not function. In the following description and in the claims, the terms “include” and “comprise” are used in an open-ended fashion, and thus should be interpreted to mean “include, but not limited to . . . ”. Also, the term “couple” is intended to mean either an indirect or direct electrical connection. Accordingly, if one device is electrically connected to another device, that connection may be through a direct electrical connection, or through an indirect electrical connection via other devices and connections.
Please refer to
The readout circuit 160 is coupled between the pixel sensor 120 and the processing unit 140, and includes, but is not limited to, a power amplifier 162, a reset gate 164, a capacitor 166, a first switch 168, and a second switch 169. The power amplifier 162 is arranged for outputting the first pixel signal S_P1 and the second pixel signal S_P2 to the processing unit 140. The reset gate 164 is arranged for resetting the power amplifier 162. The first switch 168 is arranged for selectively coupling the capacitor 166 and the reset gate 164. The second switch 169 is arranged for selectively coupling the capacitor 166 and the processing unit 140. Please note that, the storage capacitor 124 is utilized for storing the second pixel signal S_P2 from a previous operating cycle of the imaging processing circuit 100, i.e. the updated second pixel signal S_P2′ generated by the processing unit 140 during the previous operating cycle of the imaging processing circuit 100, however, this is for illustrative purposes only, and not meant to be a limitation of the present invention.
In this embodiment, during a current operating cycle of the imaging processing circuit 100, the readout circuit 160 first reads out the second pixel signal S_P2 stored in the storage capacitor 124 via the second transfer gate 128, and the power amplifier 162 outputs the second pixel signal S_P2 to the processing unit 140. Next, the photo detector 122 generates the first pixel signal S_P1 by converting a photonic signal into the first pixel signal S_P1. The first transfer gate 126 transfers the first pixel signal S_P1 from the photo detector 122 to the storage capacitor 124. The readout circuit 160 then reads out the first pixel signal S_P1 stored in the storage capacitor 124 via the second transfer gate 128, and the power amplifier 162 outputs the first pixel signal S_P1 to the processing unit 140. The processing unit 140 generates the updated second pixel signal S_P2′ by dividing the first pixel signal S_P1 with a predetermined mixed ratio M and combining a divided first pixel signal S_P1′ with the second pixel signal S_P2. The updated second pixel signal S_P2′ is written back to the storage capacitor 124 by the readout circuit 160. The updated second pixel signal S_P2′ stored in the storage capacitor 124 is then used as a second pixel signal S_P2 during the next operating cycle of the imaging processing circuit 100.
Please note that, the reset gate 164 should reset the power amplifier 162 before the first pixel signal S_P1 or the second pixel signal S_P2 is transferred via the first transfer gate 126 and the second transfer gate 128 during the current operating cycle of the imaging processing circuit 100. For example, the reset gate 164 may reset the power amplifier 162 before the second transfer gate 128 transfers the first pixel signal S_P1 and the second pixel signal S_P2 during the current operating cycle of the imaging processing circuit 100, or the reset gate 164 may reset the power amplifier 162 before the first transfer gate 126 and the second transfer gate 128 transfer the first pixel signal S_P1 during the current operating cycle of the imaging processing circuit 100. The reset gate 164 should also reset the power amplifier 162 before the readout circuit 160 writes back the updated second pixel signal S_P2′ to the storage capacitor 124. Please also note that, a magnitude of the updated second pixel signal S_P2′ stored in the storage capacitor 124 should be smaller than a magnitude of the updated second pixel signal S_P2′ generated by the processing unit 140 due to signal losses during signal transfer.
The abovementioned embodiment is presented merely for describing technical features of the present invention, and in no way should be considered as limiting of the scope of the present invention. People skilled in the art will readily appreciate that other designs for implementing the pixel sensor are feasible. For example, the imaging processing circuit 100 may include a pixel sensor array comprising a plurality of pixel sensors, and each of the pixel sensors has the same features possessed by the pixel sensor 120. In this alternative design, during the same operating cycle of the imaging processing circuit 100, all the first pixel signals S_P1 can collectively be viewed as a first frame data F1, all the second pixel signals S_P2 can collectively be viewed as a second frame data F2, and all the updated second pixel signals S_P2′ can collectively be viewed as an updated frame data F2′. In addition, the processing unit 140 generates the updated frame data F2′ by dividing the first frame data F1 with the mixed ratio M and combining a divided first frame data F1′ with the second frame data F2. In this way, the updated second frame data F2′ can be expressed as F2′=F2*G+F1/M. The restore ratio G is used to elaborate the effect of signal losses during signal transfer, and is therefore smaller than 1. Since the updated second frame data F2′ is later used as the second frame data F2 during the next operating cycle of the imaging processing circuit 100, this process continues, iteratively. As those skilled in the art should readily know, the resultant second frame data F2 should converge to a constant when the process goes on given that the restore ratio G is smaller than 1. In other words, the imaging processing circuit 100 can utilize this process to attenuate the shot noise and therefore acquire a boosted signal-to-noise ration (SNR).
Please refer to
Those skilled in the art will readily observe that numerous modifications and alterations of the device and method may be made while retaining the teachings of the invention. Accordingly, the above disclosure should be construed as limited only by the metes and bounds of the appended claims.
