Implantable Nerve Transducer with Solid-State Battery

Abstract

Implantable nerve transducers are provided herein, along with methods of fabricated such implantable nerve transducers. In one embodiment, an implantable nerve transducer includes a first housing including a first material, the first housing defining a first chamber; a stimulator circuit positioned within the first chamber and being disposed on a first substrate including the first material, the first material being a non-metallic biocompatible material; a second housing including the first material, the second housing defining a second chamber; and a solid-state battery disposed on a second substrate including the first material, the solid-state battery being positioned within the second chamber, the second housing being mounted to the first housing, the implantable nerve transducer being configured to be implantable and configured to stimulate or sense signals from a nerve of a living organism.

Description

TECHNICAL FIELD

The present disclosure relates to neuromodulation and, more particularly, to devices, systems, and methods for electrically stimulating nerve(s), blocking nerve signaling, and/or monitoring/recording nerve activity and to methods of fabricating such devices and systems.

BACKGROUND

Neuromodulation continues to increase as an adopted technique for treating of a wide variety of medical conditions. For example, neuromodulation devices for spinal cord stimulation have been utilized for the management of pain. Similarly, neuromodulation devices for deep brain stimulation have been utilized for the treatment of Parkinson's, essential tremor, dystonia, and other disorders. Neuromodulation devices for vagus nerve stimulation have been utilized to control seizures, such as those associated with epilepsy. Also, neuromodulation devices for renal nerve stimulation have been utilized to control blood pressure.

Neuromodulation devices typically require a surgical procedure to for implantation at a desired location within a patient. Because such devices are implanted, making the devices small is a concern. The use of microelectromechanical systems (MEMS) technology can aid in the production of devices that are small enough for implantation. Advances in fabrication of increasingly miniscule integrated circuit (IC) devices have coincided with advances in the use of semiconductors to form mechanical and electromechanical structures.

One promising application of MEMS devices includes the use of nano-scale and micro-scale electrodes formed on an IC substrate to measure and stimulate living tissue. The MEMS electrodes may be used to provide electrical stimulation and to measure electrical activity. These electrical potentials may represent sensory perception, muscular control, and other neural signals, and the electrodes may provide an avenue to restore lost neural function by stimulating targeted neurons. MEMS devices may also permit multiple components to be packages together to decrease the overall size of a device. However, the promised benefits have not yet been fully achieved. Accordingly, existing MEMS devices have been generally adequate but have not been entirely satisfactory in all respects.

As a result, there is a need for improved devices, systems, and methods for electrically stimulating nerves and/or monitoring nerve activity.

SUMMARY

The present disclosure relates to neuromodulation and, more particularly, to devices, systems, and methods for electrically stimulating nerve(s), blocking nerve signaling, and/or monitoring/recording (i.e., sensing) nerve activity and to methods of fabricating such devices and systems.

One exemplary aspect includes a method of fabricating an implantable device. An embodiment of the method includes forming at least one opening through a first substrate, bonding the first substrate to a second substrate, removing a portion of the second substrate, patterning a semiconductor layer of the second substrate to define a semiconductor structure over each opening of the first substrate, depositing a first conductive material over each semiconductor structure, and depositing a second conductive material within each opening of the first substrate such that the second conductive material is electrically coupled to the semiconductor structure. Other embodiments of this aspect include corresponding computer systems, apparatus, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the method or cause one or more machines to perform the actions of the method.

Another exemplary aspect includes a method of fabricating a plurality of implantable devices. An embodiment of the method includes bonding a first wafer to a second wafer, the first wafer having a plurality of through-wafer features formed therethrough. The method further includes removing a portion of the second wafer, patterning a semiconductor layer of the second wafer to define a semiconductor structure over each of the plurality of through-wafer features in the first wafer, and depositing a first conductive material over each semiconductor structure. Other embodiments of this aspect include corresponding computer systems, apparatus, and computer programs recorded on one or more computer storage devices, each configured to perform the actions of the method or cause one or more machines to perform the actions of the method.

Yet another exemplary aspect includes an implantable nerve transducer. An embodiment of the implantable nerve transducer includes a plurality of semiconductor structures protruding from an exterior surface provided by a substrate and a plurality of conductors extending from the exterior surface of the substrate to an interior surface of the substrate and within a plurality of openings in the substrate. Each conductor electrically is coupled to one of the semiconductor structures. The embodiment of the implantable nerve transducer further including one or more electronic components electrically coupled to the semiconductor structures by the conductors and a cap bonded to the substrate to provide a sealed chamber. The sealed chamber contains the one or more electronic components. Other embodiments of this aspect include methods of forming an individual implantable nerve transducer and forming a plurality of implantable nerve transducers.

In one embodiments, an implantable nerve transducer includes: a first housing comprising a first material, the first housing defining a first chamber; a stimulator circuit positioned within the first chamber, wherein the stimulator circuit is disposed on a first substrate comprising the first material; a second housing comprising the first material, the second housing defining a second chamber; and a solid-state battery formed on a second substrate comprising the first material. The solid-state battery is positioned within the second chamber, and the second housing is mounted to the first housing. The first material is a non-metallic biocompatible material.

In some embodiments, the first material comprises glass. In some embodiments, the first housing is welded to the second housing. In some embodiments, the stimulator circuit comprises a controller and a coil, wherein the coil is configured to wireless receive electromagnetic energy and provide electrical power to the solid-state battery and the controller. In some embodiments, the solid-state battery is configured to provide electrical power to the stimulator circuit when the coil is not receiving electromagnetic energy. In some embodiments, the coil is configured to provide electrical power to the controller when the battery is discharged. In some embodiments, the solid-state battery comprises a cathode and an anode, and wherein at least one of the cathode or the anode comprises gold. In some embodiments, the stimulator circuit and the solid-state battery are formed by a glass wafer fabrication process. In some embodiments, the implantable nerve transducer further comprises a separator positioned between the first housing and the second housing and partially defining the first chamber and the second chamber, wherein the separator comprises a first aperture configured to align with a battery contact of the stimulator circuit, and a second aperture configured to align with a lead contact of the stimulator circuit. In some embodiments, the first housing comprises a first length and the second housing comprises a second length, wherein the second length is smaller than the first length, and wherein the first housing is coupled to the second housing such that the second aperture is accessible.

Additional aspects, features, and advantages of the present disclosure will become apparent from the following detailed description.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a flowchart of a method of fabricating an implantable nerve transducer according to embodiments of the present disclosure.

FIGS. 2A, 2B, 2C, 2D, 2E, 2F, and 2G are a series of cross-sectional side views of an implantable nerve transducer during fabrication according to the flowchart of FIG. 1 and according to embodiments of the present disclosure.

FIGS. 2H and 2I cross-sectional side views of alternative embodiments of the implantable nerve transducer of FIGS. 2A-G according to embodiments of the present disclosure.

FIG. 2J is a diagrammatic, partial cross-sectional top view of an implantable nerve transducer according to embodiments of the present disclosure.

FIG. 2K is a diagrammatic, partial cross-sectional bottom view of an implantable nerve transducer according to embodiments of the present disclosure.

FIG. 2L is a cross-sectional side view of the implantable nerve transducer of FIGS. 2A-G according to embodiments of the present disclosure.

FIGS. 2M, 2N, and 2O are bottom views of a substrate includes vias/hermetic electrical feedthroughs according to embodiments of the present disclosure.

FIG. 3 is a flowchart of a method of wafer-level fabrication of a plurality of implantable nerve transducers according to embodiments of the present disclosure.

FIGS. 4A, 4B, 4C, 4D, 4E, 4F, 4G, 4H, 4I, 4J, 4K, and 4L are a series of cross-sectional side views of a plurality of implantable nerve transducers as fabricated according to the flowchart of FIG. 3 and according to embodiments of the present disclosure.

FIGS. 5A and 5B are cross-sectional side views of exemplary implantable nerve transducers having varying electrodes according to embodiments of the present disclosure.

FIG. 6A is a cross-sectional side view of an exemplary implantable nerve transducer having a solid-state battery according to embodiments of the present disclosure.

FIG. 6B is an elevation view of an exemplary implantable nerve transducer having a solid-state battery according to embodiments of the present disclosure.

FIG. 7A is an exploded of an exemplary implantable nerve transducer having a solid-state battery according to embodiments of the present disclosure.

FIG. 7B is a perspective view of an exemplary implantable nerve transducer having a solid-state battery according to embodiments of the present disclosure.

FIG. 8 is an elevation view of an interfacing surface of a wafer-fabricated stimulator circuit of an exemplary implantable nerve transducer having a solid-state battery according to embodiments of the present disclosure.

FIG. 9 is a cross-sectional side view of a solid-state battery according to embodiments of the present disclosure.

FIG. 10 is a perspective view of a stack of solid-state batteries according to embodiment of the present disclosure.

FIGS. 11A and 11B are perspective views of an exemplary implantable nerve transducer having a cylindrical profile according to embodiments of the present disclosure.

FIG. 11C is an exploded view of an exemplary implantable nerve transducer having a cylindrical profile according to embodiments of the present disclosure.

Theses drawings may be better understood by reference to the following detailed description.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

For the purposes of promoting an understanding of the principles of the present disclosure, reference will now be made to the embodiments illustrated in the drawings, and specific language will be used to describe the same. It is nevertheless understood that no limitation to the scope of the disclosure is intended. Any alterations and further modifications to the described methods, devices, and systems, and any further application of the principles of the present disclosure are fully contemplated and included within the present disclosure as would normally occur to one of ordinary skill in the art to which the disclosure relates. In particular, it is fully contemplated that the steps, features, and/or components described with respect to one embodiment may be combined with the steps, features, and/or components described with respect to other embodiments of the present disclosure. For the sake of brevity, however, the numerous iterations of these combinations will not be described separately.

Further, spatially relative terms, such as “beneath,” “below,” “lower,” “above,” “upper” and the like, may be used herein for ease of description to describe one element or feature's relationship to another element(s) or feature(s) as illustrated in the figures. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientation depicted in the figures. For example, if the device in the figures is turned over, elements described as being “below” or “beneath” other elements or features would then be oriented “above” the other elements or features. Thus, the exemplary term “below” can encompass both an orientation of above and below. The apparatus may be otherwise oriented (rotated 90 degrees or at other orientations) and the spatially relative descriptors used herein may likewise be interpreted accordingly.

FIG. 1 is a flowchart of a method 100 for fabricating an electrode for an implantable nerve transducer. The method 100 is illustrated as a series of enumerated steps or operations. Embodiments of the method 100 may include additional or alternative operations before, after, in between, or as part of the enumerated operations. Furthermore, some embodiments may not include all of the operations depicted in FIG. 1. In describing the method 100, reference is made to FIGS. 2A, 2B, 2C, 2D, 2E, 2F, and 2G.

Accordingly, some embodiments of the method boo may begin at operation 102, in which at least one through-wafer feature is formed in a first substrate. As shown in FIG. 2A, the first substrate 200 has a first hole or opening 202 formed therein as the at least one through-wafer feature. An additional opening 204 is also shown in FIG. 2A. Some embodiments of the first substrate 200 may include fewer or more openings formed therein. As illustrated, the openings 202 and 204 are tapered openings, such that the openings are larger on one side of the substrate 200 than on the other side. The openings 202 may be formed by mechanical drilling, etching, laser ablation, or another suitable process.

At operation 104, the first substrate is bonded to a second substrate. As shown in FIG. 2A, the second substrate 210 may include multiple layers of different materials. As shown in FIG. 2A, the second substrate 210 includes a handling layer 212, an intermediate layer 214, and a semiconductor layer 216. The handling layer 212 may be a silicon layer and the intermediate layer 214 may be a silicon oxide layer, such as a buried oxide layer. The semiconductor layer 216 may be a silicon layer as well. Accordingly, the second substrate 210 may be a semiconductor-on-insulator substrate or a silicon-on-insulator substrate. In some embodiments, the semiconductor layer 216 may be a doped semiconductor layer having dopants activated there so that the layer has a conductivity that is greater than the bulk material of the handling layer 212. The semiconductor layer 216 may range in size from about 10 μm to more than 100 μm. In the depicted embodiment, the semiconductor layer 216 is about 20 μm thick.

As shown in FIG. 2B, the second substrate 210 may be positioned in direct contact with the first substrate 200 so that the substrates 200 and 210 may be bonded together at operation 104. In order to bond the substrates 200 and 210, anodic bonding may be performed. To perform the anodic bonding, a first electrode may be coupled to the first substrate 200, while a second electrode is coupled to the second substrate 210. The substrates 200 and 210 may be heated and an electrostatic field may be applied using the first and second electrodes. The process seals the semiconductor layer 216 of the second substrate 210 to the first substrate 200 with a hermetic seal that may prevent bodily fluids from passing between the semiconductor layer 216 and the first substrate 200. In some embodiments, the first and second substrates 200 and 210 may be laser welded to form a hermetic seal between them. When the substrates 200 and 210 are laser welded, they may first be heated to about 100° C. and then annealed with a laser weld.

At operation 106, some of the material of the second substrate 210 may be removed. For example, a chemical-mechanical planarization (CMP) process may be performed to remove the handling layer 212 and the intermediate layer 214. In some embodiments, the handling layer 212 may be removed by a CMP process, while a chemical etch is used to remove the intermediate layer 214. The removal of material from the second substrate 210 may expose the unbonded surface of the semiconductor layer 216, as shown in FIG. 2C.

At operation 108, the semiconductor layer of the second substrate may be patterned to define a semiconductor structure over each opening in the first substrate. As shown in FIG. 2C, an etch mask 220 may be formed over the semiconductor layer 216. For example, a photoactive polymeric layer may be dispersed over the semiconductor layer 216 and patterned with a photolithographic process to produce mask features 222 and 224 in the etch mask 220. The mask features 222 and 224 may be positioned over the openings 202 and 204 formed in the first substrate 200. The openings 202 and 204 may be formed by a deep reactive ion etch process. For example, the ZERO-CROSSTALK™ DRIE process employed by Silex Microsystems, Inc. of Palo Alto, Calif. may be used to generate the openings 202 and 204, which may have tapered or straight profiles. Patterning the mask features 222 and 224 may include soft baking, mask aligning, exposure, post-exposure baking, developing the photoresist, rinsing, drying (e.g., hard baking), and/or other suitable photolithographic steps. Alternatively, the photolithographic process may be implemented, supplemented, or replaced by other methods such as maskless photolithography, electron-beam writing, and ion-beam writing. Thereafter, an etch process may be performed to remove the exposed portions of the semiconductor layer 216. For example, a deep reactive ion etching (DRIE) process may be performed on the exposed portions of the semiconductor layer 216. In other embodiments, another dry etch process or a wet etch process may be used to remove the exposed portions of the semiconductor layer 216.

The etch process may be a chemically selective etch process, such that etching stops when the surface of the first substrate 200 is exposed. As shown in FIG. 2D, the mask features 222 and 224 may be removed from the remaining portions of the semiconductor layer 216. These remaining portions of the semiconductor layer 216 may be referred to as semiconductor structures. As shown in FIG. 2D, two semiconductor structures 230 and 232 remain on the surface of the first substrate 200. The patterning process performed at operation 108 may produce rounded edges on the upper surface of the semiconductor structures 230 and 232. As described, the semiconductor structures 230 and 232 are bonded to the first substrate 200 by the bonding process performed at operation 104. Accordingly, fluids, such as bodily fluids, are not able to pass between the semiconductor structures 230 and 232 and the underlying first substrate 200. The semiconductor structures 230 and 232 may be aligned with the openings 202 and 204, respectively. While two semiconductor structures 230 and 232 are shown in FIG. 2D, other embodiments may include more or fewer semiconductor structures.

At operation 110, a first conductive material layer is formed over the exposed surfaces of each of the semiconductor structures 230 and 232, resulting in a conductive material layer 234 over the semiconductor structure 230 and a conductive material layer 236 formed over the semiconductor structure 232. The conductive material layers 234 and 236 may be produced by a shadow mask lithography process. The shadow mask lithography process may utilize a stencil or mask 240 as shown in FIG. 2E. The mask 240 may include windows 242 and 244 that correspond to the semiconductor structures 230 and 232 in size, shape, and position. A conductive material may be deposited over the substrate 200, being prevented by the mask 240 from being deposited in locations other than on the semiconductor structures 230 and 232 to form the conductive material layers 234 and 236. The conductive material contacts and adheres to the exposed surface of the semiconductor structures 230 and 232, and may seal the semiconductor structures 230 and 232 from exposure to bodily fluids when a device having the semiconductor structures 230 and 232 is implanted.

The conductive material may include biocompatible conductors including metals, metal nitrides, and conductive polymers. For example the conductive material layers 234 and 236 may be formed from materials such as copper, aluminum, tungsten, aluminum/silicon/copper alloy, titanium, titanium nitride, nickel, polysilicon, metal silicide, other metallic and nonmetallic conductive materials, and/or combinations thereof and may have a multilayer composition. In some embodiments, a layer may be deposited over the semiconductor structures 230 and 232 and the exposed surface of the first substrate 200. The layer may be patterned by an etch process, leaving the layer over the semiconductor structures 230 and 232 as the first conductive material layers 234 and 236. The materials of the conductive material of the conductive material layers 234 and 236 may be deposited by one or more processes including sputtering, PVD, CVD, thermal annealing (commonly used to form metal silicides), photolithography, etching, and/or combinations thereof. In some embodiments, the conductive material layers 234 and 236 are made of titanium nitride (TiN). Other embodiments may include gold and/or platinum. For example, some embodiments may use an alloy of platinum and iridium as the material of the conductive material layers 234 and 236, while some other embodiments use an alloy of titanium, platinum, and gold.

At operation 112, a second conductive material is deposited over the opposite side of the first substrate 200, such that the second conductive material is deposited within each of the openings 202 and 204 and forms conductors or conductive vias/feedthroughs 250 and 252. In some embodiments, the conductive material of the vias 250 and 252 is the same conductive material of the conductive material layers 234 and 236. In other embodiments, different conductive materials may be used instead. As shown in FIG. 2F, the vias 250 and 252 may entirely fill the space defined by the openings 202 and 204. However, in other embodiments the vias 250 and 252 are provided by a layer of conductive material that coats the walls of the openings 202 and 204 and coats the exposed portion of the semiconductor structures 230 and 232. The vias 250 and 252 may be formed using a shadow mask metallization process, similar to the process depicted in FIG. 2E, or by another appropriate fabrication process.

The vias 250 and 252 may be formed from materials such as copper, aluminum, aluminum/silicon/copper alloy, titanium, titanium nitride, tungsten, nickel, polysilicon, metal silicide, other metallic and non-metallic conductive materials, and/or combinations thereof and may have a multilayer composition. In an exemplary embodiment, the bonding pads 120 include a nickel/aluminum alloy. The materials of the conductive material of the vias 250 and 252 may be deposited by one or more processes including sputtering, PVD, CVD, thermal annealing (commonly used to form metal silicides), photolithography, etching, and/or combinations thereof. In some embodiments, the vias 250 and 252 are made of titanium nitride. Other embodiments may include gold and/or platinum. For example, some embodiments may use an alloy of platinum and iridium as the material of the conductive material layers 234 and 236, while others use an alloy of titanium, platinum, and gold.

The vias 250 and 252 may be in direct physical contact with the semiconductor structures 230 and 232. Alternatively, another conductive material layer may be interposed therebetween. While a top surface of the vias 250 and 252 is illustrated as flush with the top surface of the first substrate 200, in FIG. 2F, some embodiments may include portions of the second conductive material protruding up from the surface of the first substrate 200, forming a lip thereon. In some embodiments, a brief chemical etch may be performed to remove any naturally occurring oxide on the exposed surface of the semiconductor structures 230 and 232 prior to depositing the material of vias 250 and 252 into the openings 202 and 204.

At operation 114, a cap may be bonded to the first substrate. As shown in FIG. 2G, a cap 260 is bonded to the first substrate 200 at surfaces 262 of the cap 260. The cap 260 may be made from glass, in some embodiments. Bonding may be accomplished by an anodic bonding process or by a laser welding process. As part of either bonding process, the cap 260 and the substrate 200 may be preheated, as in other bonding operations described herein. For example, the cap 260 and the substrate 200 may be preheated to a temperature of about 75° C. to about 150° C. Thereafter, an electrostatic charge may be placed across the cap 260 and the substrate 200, or the cap 260 and the substrate 200 may be exposed to laser activation or welding in a region corresponding to the surfaces 262. The bonding may hermetically seal a chamber 264, defined by a recess 266 and by an upper surface of the first substrate 200.

Prior to bonding the cap 260 to the first substrate 200, one or more electronic components may be positioned within the chamber 264 and electrically coupled to the vias 250 and 252 by leads 268. The electronic components may include a printed circuit board (PCB) 270, a microcontroller 272, a communication module 274, and other components 276. The printed circuit board 270 may route signals among and between the vias 250 and 252 (and the semiconductor structures 230 and 232), the microcontroller 272, the communication module 274, and/or the other components 176.

In some embodiments, the printed circuit board 270 may also support a coil structure 278. The coil structure 278 may be a coil of conductive material that is configured to wirelessly receive electromagnetic energy from a remote power source, such as a power source that is disposed outside of a patient's body. For example, when the implantable device 280, which includes the first substrate 200 and at least all of the features described as coupled thereto, electrically or mechanically, is implanted within a patient, the coil structure 278 may receive electromagnetic energy from a source disposed in proximity to the implantable device 280 but outside the patient's body. The other components 276 include resistors, capacitors, inductors, and may include one or more energy storage capacitors. The energy received by the coil structure 278 may charge an energy storage capacitor to provide power when the coil structure 278 is not receiving electromagnetic energy from an outside source.

As shown in FIG. 2G, the coil structure 278 may be a planar coil structure disposed on a surface of, or in a layer of, the printed circuit board 270. In other embodiments, the coil structure 278 may be disposed within the chamber 264 surrounding the printed circuit board 270 and the electronic components there on. As shown in FIG. 2H, the coil structure 278 is provided by a coiled wire 282 that wraps around the printed circuit board 270 repeatedly. While the coil structure 278 is shown as surrounding the printed circuit board 270, other embodiments of the coil structure 278 may be disposed above the printed circuit board 270 such that a lateral distance between the printed circuit board 270 and the walls of the recess 266 may be minimized.

Before the implantable device 280 is positioned within a patient during a surgical procedure, the exterior corners or edges of the implantable device 280 may be smoothed or rounded. As shown in FIG. 2I, the exterior edges 284 of the cap 260 are rounded and the exterior edges 286 of the first substrate 200 are also rounded. The rounded edges 284 and 286 may be produced during a fabrication process used to individuate implantable devices that are formed in parallel, such as by wafer-level fabrication. The rounded edges 284 and 286 may be produced by a dicing process and/or an etching process, to reduce any impact the implantable device 280 may have on surrounding tissues at the site of implantation.

FIGS. 2J and 2K depict the implantable device 280 and partial cross section and a top view and a bottom view, respectively. FIG. 2J shows the microcontroller 272, the communication module 274, and other components 276 positioned on the printed circuit board 270. The top surface of the printed circuit board 270 may include leads 268. Additional leads may be included within the layers of the printed circuit board 270. The microcontroller 272 may include processing circuitry and radiofrequency communication circuitry to process information for transmission via the communication module 274 and to process information received via the communication module 274. In some embodiments, the communication module 274 is a near-field communication (NFC) module. In other embodiments, the communication module 274 may be configured to communicate in one or more other wireless protocols and associated frequencies, e.g., WLAN, Bluetooth, ZigBee, WiFi, etc. In some instances, both power and data are transmitted using radiofrequency (RF) communication. When both power and data are transmitted using RF communication, the RF communications for the power and data may be at different wavelengths. Additionally, in some embodiments, the power and/or data are transmitted using infrared (IR) communication and the communication module 274 may be an optical transceiver. In yet other embodiments, the power and data are transmitted using different communication techniques (e.g., RF communication for one and infrared (IR) communication for the other).

The microcontroller 272 may include a processor, a memory, a transceiver, and an antenna. These elements may be in direct or indirect communication with each other, for example via one or more buses. The processor of the microcontroller 272 may include a CPU, a DSP, an ASIC, a controller, a FPGA device, another hardware device, a firmware device, or any combination thereof. The microcontroller 272 may also be implemented as a combination of computing devices, e.g., a combination of a DSP and a microprocessor, a plurality of microprocessors, one or more microprocessors in conjunction with a DSP core, or any other such configuration.

The memory of the microcontroller 272 may include a cache memory (e.g., a cache memory of the processor), RAM, MRAM, ROM, PROM, EPROM, EEPROM, flash memory, a solid state memory device, one or more hard disk drives, other forms of volatile and non-volatile memory, or a combination of different types of memory. In an embodiment, the memory includes a non-transitory computer readable medium. The memory may store instructions. The instructions may include instructions that, when executed by the processor, cause the processor to perform operations to receive instructions and commands and to transmit data including status information and physiological data. Instructions may also be referred to as code, which may be interpreted broadly to include any type of computer-readable statement(s).

For example, the microcontroller 272 may receive and process signals from the semiconductor structures 230 and 232 to generate physiological data based on contact with nerves or nerve bundles. The microcontroller 272 may encode the physiological data for transmission by the communication module 274. Additionally, the communication module 274 may receive programming instructions and wireless signals and provide those programming instructions to the microcontroller 272 for reprogramming. The microcontroller 272 may include one or more memories for storing instructions and for storing physiological data.

FIG. 2K depicts a partially cross-sectioned bottom view of the implantable device 280. As shown in FIG. 2K, the coil structure 278 is disposed on a bottom surface of the printed circuit board 270. The semiconductor structures 230 and 232 are shown as enclosed in the conductive material layers 234 and 236, respectively. The semiconductor structures 230 and 232 are connected by planar conductors 290 to the leads 268. When implanted within a patient, the implantable device 280 is positioned so that electrodes (e.g., the semiconductor structures 230 and 232 and the conductive material layers 234 and 236) are in contact with one or more nerves or nerve bundles within the patient. Such nerves or nerve bundle include the spinal cord, the deep brain, vagus nerves, renal nerves, peripheral nerves, etc. Electrical impulses may be transmitted via the electrodes to the nerves and electrical impulses being transmitted via the nerves may be read using the electrodes.

Referring now to FIG. 2L, shown therein is an embodiment of the implantable device 280 that includes an alternative first substrate 200A. The substrate 200A may be similar to the substrate 200 in many respects. For example, the bulk of the substrate 200A may include or be formed from a non-conductive material, such as an insulator. Additionally, the substrate 200A includes at least one through-wafer structure. The substrate 200A further includes alternative vias 250A and 252A as through-wafer structures. Accordingly, as used herein, a through-wafer structure may be an opening made in preparation for a conductive material to be formed therein to create a via or a through-wafer structure may be a formed via, including an opening filled with a conductive material. Rather than the tapered configuration of the vias 250 and 252 as shown in FIG. 2A, the vias 250A and 252A may be substantially straight through the bulk of the substrate 200A by being formed in openings that are substantially straight. The vias 250A and 252A may have a rectangular cross-sectional area, as shown in FIG. 2M, or a circular cross-sectional area, as shown in FIG. 2N. Both FIGS. 2M and 2N depict embodiments of the alternative substrate 200A from a bottom view. As illustrated, the substrate 200A has already been diced from a larger wafer. FIG. 2O depicts yet another embodiment of the alternative substrate 200A. The substrate 200A shown in FIG. 2O includes the alternative vias 250A and 252A and further includes isolation regions 254A and 254B. While the vias 250A and 252A are conductive, the isolation regions 254A and 254B provide for isolation between the vias 250A and 252A and the bulk material of the substrate 200A.

For example, the alternative substrate 200A may be made from bulk silicon, while the isolation regions 254A and 254B are formed from silicon oxide and the vias 250A and 252A are formed from doped polysilicon. Other materials may be used, however the vias 250A and 252A are more conductive than the bulk material of the substrate 200A, which is more conductive than the material of the isolation regions 254A and 254B. Additionally, the isolation regions 254A and 254B may have a different shape depending on, or independent of, the shape of the vias 250A and 252A.

When one of the alternative substrate 200A is used in fabrication of the implantable device 280, the method boo of fabrication may omit operation 102. The operations involved with forming the vias 250 and 252 may also be omitted in the method, as the vias 250A and 252A may be formed before the electronic components (including the printed circuit board (PCB) 270, the microcontroller 272, the communication module 274, and other components 276) are bonded to the substrate 200A and before the alternative substrate 200A is bonded to the cap 260.

Some suitable embodiments of the substrate 200A may be SCHOTT HermeS® products from SCHOTT AG of Landshut, Germany, through glass via products made by Tecnisco, LTD. of Tokyo, Japan, and through glass via products made by Plan Optik AG of Elsoff, Germany.

Referring now to FIG. 3, shown therein is a flowchart of a method 300 of fabricating a plurality of implantable devices, like the implantable device 280 of FIGS. 2G-2K. Like the method 100 of FIG. 1, method 300 is illustrated as a series of enumerated steps or operations. Embodiments of the method 300 may include additional operations before, after, in between, or as part of the enumerated operations. Additionally, some embodiments of the method 300 may omit one or more of the enumerated operations.

Accordingly, some embodiments of the method 300 may begin at operation 302, in which a plurality of through-wafer features is formed in a first wafer. FIG. 4A depicts a portion of a first wafer 400. The first wafer 400 may be machined, etched, or drilled to produce through-wafer features like the openings 402, which include individual openings 402A-F. The openings 402 may be tapered or straight. In the depicted embodiment of FIG. 4A, the openings 402 are tapered toward one end. FIG. 4A further illustrates an alternative first wafer 400A, which may take the place of the first wafer 400 in some embodiments of method 300. As discussed in connection with the substrate 200A of FIGS. 2L-2O, the first wafer 400 includes vias that differ from the vias formed in the openings 403A-F of first wafer 400 as shown in FIG. 4E, as discussed in further detail below. The vias 403A-F include a conductive material, such as a doped semiconductor or a metal, for conducting power and/or signals through the bulk material of the wafer 400A.

At operation 304, the first wafer may be bonded to a second wafer. As shown in FIG. 4A, the second wafer 410 may include a plurality of different material layers. In some embodiments, the second wafer 410 includes a handling layer 412, an intermediate layer 414, and a semiconductor layer 416 that separated from the handling layer 412 by the intermediate layer 414. In some embodiments, the handling layer 412 is silicon and the intermediate layer 414 is a buried oxide layer. Accordingly, the second wafer 410 may be referred to as a semiconductor-on-insulator wafer or a silicon-on-insulator wafer. While the individual thicknesses of the different material layers of the second wafer 410 may vary between embodiments, in some embodiments the semiconductor layer 416 may range from about 10 μm to about 100 μm. In some embodiments, the semiconductor layer is about 20 μm in thickness. Other embodiments of the method 300 may include a second wafer that has fewer material layers. For example, the second wafer 410 may be a silicon wafer without a buried oxide layer in some embodiments.

Bonding the first wafer 400 to the semiconductor layer 416 may produce the structure shown in FIG. 4B, which shows the combination of the bonded wafers 400 and 410. The first wafer 400 and the second wafer 410 may be bonded by anodic bonding or by laser welding as described herein to produce a hermetic seal between the first wafer 400 and the second wafer 410, more specifically between the first wafer 400 and the semiconductor layer 416.

At operation 306, a portion of the second wafer is removed. As shown in FIG. 4C, the handling layer 412 and the intermediate layer 414 have been removed, exposing the semiconductor layer 416 which is bonded to the first wafer 400 with a hermetically sealed bond. Material may be removed from the second wafer 410 by chemical and/or physical processing steps, to provide a desired thickness for the semiconductor layer 416. As depicted in FIG. 4C, the semiconductor layer 416 has a generally constant thickness. In some embodiments of the operation 306, different thicknesses of material may be removed from the second wafer 410 in different locations, such that the thickness of the semiconductor layer 416 is different in different locations. Such embodiments may facilitate semiconductor structures with varying shapes and configurations, such as flat pads and needles of various heights and thicknesses.

At operation 308, the semiconductor layer of the second wafer is patterned to define a plurality of semiconductor structures. This patterning may be performed using photolithographic techniques, such as the application and patterning of a layer of photoreactive material, such as photoresist, and subsequent etching of the exposed portions of the semiconductor layer 416. For example, the photoresist may be spun over the semiconductor layer 416 and exposed to produce mask features positioned over each of the openings 402 and the first wafer 400. For example, mask features like the mask features 222 and 224 of FIG. 2C may be formed over the openings 402, or another through-wafer feature in another embodiment. The exposed portions of the semiconductor layer 416 may be etched away, by a chemical etch that selectively etches the material of the semiconductor layer 416 faster than the material of the first wafer 400. The semiconductor layer 416 may be etched by a deep reactive ion etch process, in some embodiments. Alternatively or additionally, the physical etch may be used to pattern the semiconductor layer 416 into a plurality of semiconductor structures 430. FIG. 4D depicts six such semiconductor structures 430, labeled individually as semiconductor structures 430A-F. While all of the semiconductor structures 430 are depicted as being substantially planar, other embodiments of the operation 308 may include semiconductor structures 430 of varying configurations.

At operation 310, a first conductive material may be deposited over each semiconductor structure, the result of which is shown in FIG. 4D. Processes including formed by chemical vapor deposition (CVD), physical vapor deposition (PVD), atomic layer deposition (ALD), other suitable processes, and/or combinations thereof. In some embodiments, shadow mask lithography (depicted in FIG. 2E in connection with operation no of method 100) is used to selectively deposit the first conductive material in layers 434 (individual layers 434A-F) over each of the semiconductor structures 430. The first conductive material layers 434 may cover some, or all, of the exposed surface of the semiconductor structures 430. Accordingly, in some embodiments, the first conductive material layers 434 may provide an additional seal between the layers 434 and the first wafer 400, further preventing fluid from passing through the openings 402.

At operation 312, a second conductive material is deposited within the openings 402 in the first wafer. This may be done as shown in FIG. 2F and as described in connection with operation 112 of the method 100, to form vias 450 extending through the first wafer 400. The vias 450 are electrically coupled to the semiconductor structures 430 to transmit signals from a nerve or nerve bundle to one or more electronic components. The vias 450 may be in direct contact with a surface of each of the semiconductor structures 430 that is exposed by the openings 402. Chips 460 (individually, 460A-C) may be electrically and physically coupled to the vias 450 and the first wafer 400. The chips 460 may include a microprocessor, a communication module, a coil structure, and other components such as those depicted in FIG. 2G and 2G, which are described therewith and, more generally, in connection with method 100 of FIG. 1. The chips 460 may be positioned by an automated pick-and-place machine to ensure proper placement and proper physical and electrical connection. Embodiments of the method 300 that including bonding the alternative wafer 400A to the second wafer 410 may omit operation 312. Alternatively, such embodiments may include operation 312 before operation 304.

At operation 314, a third wafer is bonded to the first wafer, such that a plurality of chambers is defined between the third wafer on the first wafer. As shown in FIG. 4F, a portion of a third wafer 470 is shown while being positioned over the first wafer 400. The third wafer 470 includes a plurality of recesses 472, individually recesses 472A-C. When the wafer 400 and the third wafer 470 are in contact, a bonding process may be performed. As shown in FIG. 4G, a voltage source 480 may be coupled by electrodes 482 to the third wafer 470 and the first wafer 400. In some embodiments the voltage source 480 may be coupled to only one of the third wafer 470 and the first wafer 400, with the other connected to ground. Using the voltage source 480, an anodic bond may be formed between the wafers 400 and 470. The anodic bond seals chambers 474, defined by the recesses 472 and the upper surface of the first wafer 400, which include the chips 460.

Alternatively, operation 314 may be performed by a laser welding process as depicted in FIG. 4H. As shown in FIG. 4H, the first wafer 400 and the third wafer 470 are brought into contact. The first wafer 400 and the third wafer for 70 may be heated or preheated to a temperature around 100° C. Thereafter, the wafers 400 and 470 may be exposed to a laser beam depicted by the arrows 484. The laser beam may be focused at the areas where the third wafer 470 contacts the first wafer 400. The laser beam may provide localized heat to the desired location of a bond. The laser beam may be directed across the wafer in a grid-like pattern to provide a seal that surrounds each of the chambers 474. Whether anodic bonding or laser beam welding is used, operation 314 results in hermetically sealed chambers 474.

Embodiments of the method 300 may further include one or more operations to divide the bonded wafers 400 and 470 into individual implantable devices, like the implantable device 280 described herein. Dicing the bonded wafers may be done using a dicing saw after attaching the wafer 400 or the wafer 470 to an adhesive carrier. Alternatively, a rotating bit may be used to separate the wafers into individual devices. FIG. 4I illustrates a dicing saw blade 492 that is separating an implantable device 490B from another implantable device 490C, which were produced in parallel by the wafer-level processing of method 300. After dicing, the walls of one of the implantable devices 490 may have a thickness T₁ in a range from about 200 μm to about 600 μm. In some embodiments, the thickness T₁ is about 500 μm. While the saw blade 492 has a uniform profile, other embodiments may include a saw blade 494 as illustrated in FIG. 4J. A rotating, dicing bit having the profile of the blade 494 may be used in some embodiments. The surface of the saw blade ₄₉₄ includes a curve 496 on either side. These curves 496 operate to round the edges of the caps formed by the dicing of the third wafer 470, while the individual implantable devices 490 are being diced. As shown in FIG. 4J, the edges of the implantable device 490A have been rounded during the dicing process. The top edges between the implantable devices 490B and 490C are being rounded by the curves 496 while these devices are being separated by the dicing saw 494. In some embodiments, the dicing may be performed in two stages: once from a top surface and again from the bottom surface, with the blade not extending fully through both the wafers 400 and 470. While the illustrated examples in FIGS. 4I and 4J depict the saw blade as penetrating from the third wafer 470 to the first wafer 400, the saw blade 492 or 494 may also individuate the implantable devices 490 from the first wafer 400 to the third wafer 470.

Alternatively or additionally, an etching process may be performed to round the corners of the implantable devices 490. For example, as shown in FIG. 4K, and etch process 497 may be performed to round the corners 498 to produce rounded corners 499 as depicted in FIG. 4L. In some embodiments of the method 300, a first etch process may be performed to round the top corners of the implantable devices 490 and a second etch process may be performed to round the bottom corners of the implantable devices.

Referring now to FIGS. 5A and 5B, shown therein are implantable devices 500A and 500B, respectively. The implantable devices 500A and 500B may be formed by embodiments of the methods 100 and 300. This may be done by adding additional steps as part of the operation 108 of method 100 and operation 308 of method 300. These additional steps may be described in more detail in U.S. Pat. No. 9,329,201, filed on Mar. 13, 2014, and entitled “Methods, Devices, and Systems for Forming Atomically Precise Structures,” the entire disclosure of which is incorporated herein by reference. As shown in FIG. 5A, the implantable device 500A includes a first electrode 502 and a second electrode 512. The first electrode 502 has a needle-like shape and may be referred to as a penetrating needle. The second electrode 512 has a generally planar shape and may be referred to as an electrode pad. Both of the electrodes 502 and 512 include a semiconductor structure, referred to as semiconductor structures 504 and 514, respectively. The semiconductor structures 504 and 514 may be formed from a single semiconductor layer that was bonded to the substrate 520. As noted herein, the semiconductor layer may have different heights or thicknesses at different locations. The electrodes 502 and 512 may also include a conductive coating thereon. As illustrated, the electrode 502 includes a coating provided by a conductive material layer 506. The electrode 512 includes a conductive material layer 516. In some embodiments, either or both of the electrodes 502 and 512 may include an insulating coating or layer having an opening to more precisely control where an electrical connection or connections may be made with the electrodes 502 and 512 by nerves or bundles of nerves.

FIG. 5B depicts an implantable device 500B that includes more than two electrodes. As described herein, the implantable devices made by the methods 100 and/or 300 may include one electrode, two electrodes, or more electrodes. The implantable device 500B includes the electrode 502 and the electrode 512, and further includes an electrode 522. Like the electrodes 502 and 512, the electrode 522 includes a semiconductor structure 524 and a conductive material layer 526 deposited thereon. As shown, the electrode 522 is shorter than the electrode 502 and taller than the electrode 512. Additionally, the electrode 522 is wider than the electrode 502.

In general, the implantable devices disclosed herein may include configured in a linear array, a two-dimensional array, or other suitable spatial distribution. The electrodes can be of various type, including penetrating electrodes, self-embedding electrodes (e.g., electrodes with a structural profile, such as an hourglass profile, that allows insertion into a nerve or nerve bundle, but resists or prevents unwanted removal without requiring a separate securing device, such as a tack), flat or surface electrodes, flexible electrodes, and/or combinations thereof. Further, in some instances each electrode may include a plurality of discrete stimulation and/or monitoring/recording sites. In this regard, a penetrating needle with a plurality of discrete stimulation and/or monitoring sites at various positions along the length of the electrode can be utilized to precisely target stimulation and/or monitoring at a desired depth or combination of different depths of a nerve or nerve bundle. Such varied configurations of the exemplary electrodes 502, 512, and 522 may be employed to contact a nerve bundle at different depths or to contact different nerves using a single implantable device 500A or 500B.

Additional embodiments of implantable devices described herein may include electrodes with yet other different shapes and dimensions, as described in U.S. Pat. No. 9,329,201. The methods described herein produce implantable nerve transducers that are hermetically sealed to prevent any fluid from accessing electronic components encased within the implantable devices. The implantable devices may have biocompatible exterior materials to prevent complications during use of the devices. These devices may receive power wirelessly and may record neural activity and communicate recorded data wirelessly to a receiver outside the patient's body, through skin and other tissue.

In some instances, it may be desirable for an implantable device to include a battery to provide power to the electrical components of the implantable device, including the electrodes, without using an external powering device. In this way, the device can operate without externally worn devices, which increase comfort and convenience. An internal power source may also improve patient compliance with the treatment schedules and provide for greater flexibility in use cases and treatment procedures. However, an internal power source or battery may bring a variety of undesirable aspects to the treatment procedure. In that regard, batteries are typically replaceable or rechargeable. When a replaceable battery is depleted of charge, the battery is removed and replaced. Replacing the battery involves another surgery, which may be undesirable and/or impractical.

Further, rechargeable batteries may comprise materials such as lithium that are not biocompatible or are otherwise problematic for implantable devices. For example, some metallic materials or enclosures may generate excessive heat during a magnetic resonance imaging (MRI) procedure. Rechargeable batteries such as lithium ion batteries can also increase in cost exponentially with reduction in size below a certain threshold. Additionally, rechargeable batteries using standard liquid or gel electrolytes may be prone to generate dendrites, leading to reduced life span, and battery failure. For these reasons, it may be difficult to obtain regulatory approval for devices that include such rechargeable batteries. Additionally, if the rechargeable battery fails or runs out, power to the electrodes may cease, resulting in less effective treatment and/or a return of adverse symptoms.

The present disclosure provides implantable devices for nerve therapy and stimulation with rechargeable solid-state batteries. In particular, the present disclosure provides implantable devices that include solid state batteries disposed on a glass substrate using a wafer construction, where the solid-state batteries are configured to power an implantable nerve transducer circuit disposed within a glass housing. In some embodiments, the transducer circuit is also disposed on a glass substrate. In another aspect of the present disclosure, the implantable nerve transducer circuit includes a coil for harnessing wireless power. The coil can be used to recharge the battery and/or directly power the electronic components of the implantable nerve transducer circuit, including the electrodes.

In that regard, FIGS. 6A and 6B illustrate an implantable device boo that includes a battery module 630 coupled to an encapsulated stimulator module 610. In the illustrated embodiment, encapsulated stimulator module 610 includes a stimulator circuit 612 that is positioned within and encapsulated by a housing 614. The housing 614 comprises a glass body. The housing 614 comprises a glass base plate 624. A glass separator 620 is positioned between the stimulator module 610 and the battery module 630, and comprises passthroughs 616, 618 to provide for electrical connections to the circuit 612. A first passthrough 616 is provided to allow for an electrical connection between the battery module 630 and the circuit 612 such that electrical energy can be exchanged between the battery module 630 and the circuit 610. The separator 620 and the base plate 624 may be attached to the housing 614 to provide a sealed enclosure for the circuit 612. In this regard, it will be understood that one or both of the openings 616, 618 can be sealed using adhesive, potting material, epoxy, etc., once an electrical conductor (e.g., 622) has been attached to the circuit 612 and positioned through the corresponding passthrough 616, 618. The components of the housing 614 and the separator 620 may be attached using adhesive, glass welding (e.g., laser welding), and/or any other suitable type of coupling. In some embodiments, the passthroughs 616, 618 are filled with a conductive material, forming a bi-directional conductive pad or contact. Accordingly, the circuit 612 may be coupled to the battery 630 via the bi-directional conductive contact.

The battery module 630 comprises a stack of solid-state batteries 632 positioned within a glass housing 634. The glass housing 634 comprises a glass plate or cover 636 forming a sealed enclosure for the batteries 632 with the lateral faces of the housing 634. The components of the housing 634 and the separator 620 may be attached using adhesive, room temperature welding (e.g., laser welding), and/or any other suitable type of coupling. The batteries 632 are stacked and electrically coupled to one another, and at least one of the batteries is electrically coupled to the circuit 612 by a conductor extending through the passthrough 616. In some embodiments, the batteries 632 are connected to one another in series. In other embodiments, the batteries 632 are connected to one another in parallel. In some embodiments, the batteries 632 are connected to one another using a combination of series and parallel. The batteries may be coupled to one another by conductive pads or connection interfaces as explained further below. The stack of batteries 632 includes at least one battery, and may include several batteries, such as two, three, four, five, seven, ten, fifteen, twenty, thirty, or any other suitable number of batteries, both greater or smaller.

Each of the batteries is fabricated using a wafer-based parallel processing manufacturing process whereby the components of the battery are deposited or formed on a glass wafer or substrate. In an exemplary embodiment, the various surfaces and components of the batteries 632 comprise biocompatible materials such as gold. A suitable battery is the Stereax® battery manufactured by ILIKA. In an exemplary embodiment, each battery in the stack 632 has a capacity of between 5 uAh and 500 uAh and with an output of between 1-5 V. For example, in one embodiment, each battery in the stack comprises a capacity of approximately 50 uAh, and has an output voltage of approximately 3.4 V, with a peak current of 1 mA. In some aspects, the battery may be capable of recharging in approximately 10 min, and may have a lifespan of between 1,000 and 5,000 recharge cycles.

FIG. 6B shows a top elevation view of the implantable device 600. As shown, the housing 634 of the battery module 630 extends across only a portion of the length of the housing 614 such that the passthroughs 618 are not covered by the battery module 630. A lead or conductor 622 extends through each of the passthroughs 618 is connected to a corresponding conductive pad or connector of the circuit 612. The circuit 612 may comprise any suitable number of channels or connections, including one, two, three, four, five, seven, ten, fifteen, twenty, thirty, 50, 75, 100, or any other suitable number, both greater or smaller. When the leads are connected to the circuit 612 via the passthroughs 618, the passthroughs 618 can be covered and/or sealed using a potting material, adhesive, epoxy, sealant, or any other suitable material to provide for a hermetically sealed enclosure within the housing 614 and the housing 634. Sealing the circuit 612 and the batteries 632 within their respective housings 614, 634 protects the electrical components from damage to the electronic components when the device 600 is implanted in the patient. In some embodiments, cylindrical percutaneous leads are coupled to the circuit 612. In some embodiments, paddle-style leads are coupled to the circuit 612. In one embodiment, a flexible folding paddle lead can be used such that the lead can be inserted percutaneously while functioning similarly to a paddle lead. An exemplary folding paddle lead is the EXPERT lead manufactured by Wiseneuro. In some embodiments, the conductors connecting the electrodes of the leads to the implantable device 600 comprise stretchable conductors that comprise conductive particles implanted in an elastomeric substrate.

It will be understood that the glass, wafer-based circuit 612 and batteries 632 may provide for smaller electronic components and circuitry that are biocompatible and MRI compatible. In some aspects, wafer-based solid state batteries may be manufactured at a very small size at a lower cost than conventional lithium ion batteries. In some embodiments, each battery in the stack 632 comprises a length of less than 2 cm, a width of less than 1 cm, and a thickness of less than 0.2 cm. In one embodiment, each battery is approximately 11 mm×4 mm×0.6 mm. In some embodiments, the device 600, including the battery module 630, has a total volume of less than 1 cm3. For example, in one embodiment, the device 600 comprises a volume of approximately (+/−10%) 0.5 cm3.

FIGS. 7A and 7B provide perspective views of the device 600 shown in FIGS. 6A and 6B. In particular, FIG. 7A shows an exploded view of the various components of the device 600. A plate 624, a housing 614, and a separator 620 form an enclosure for the circuit 612. As described above, the plate 624, housing 614, and separator 620 may comprise glass components welded, fused, adhered, or otherwise attached to one another to provide a sealing enclosure. In the illustrated embodiment, to chambers or enclosures are formed by the glass components. A first chamber is formed for the circuit 612 and is defined by the lateral housing body 614, the plate 624, and the separator 620. A second chamber is formed for the battery stack 632 and is defined by the lateral housing body 634, the separator 620, and the top plate 636. FIG. 7B is a perspective view of the assembled device 600. As shown, the battery module 630 is coupled to a surface of the circuit module 610 that is parallel to the surface of the circuit 612 on which the electronic components are mounted. In some aspects, the surface to which the battery module 630 is mounted in the embodiment of FIG. 7B may be referred to as a top surface or a bottom surface. Accordingly, the larger surfaces of the battery module 630 and circuit module 610 are coupled. In this way, the profile of the device may be reduced, which may improve the comfort and fit of the device 600 within the patient, and may allow for more location options for implantation. The length of the housing 634 is less than the length of the housing 614 such that, when the housing 614 is coupled to the housing 634, a portion of the separator 620 is exposed and accessible. As shown in FIG. 7B, leads 635 are connected to the circuit 612 through the passthroughs 618 in the separator 620. The leads 635 may be directly connected to the circuit 612, or may be connected via a separate connector cable such that the leads 635 can be more easily disconnected from the circuit 612. The leads 635 comprise electrodes for administering the neurotherapy. The leads 635 may comprise paddle-style leads, percutaneous cylindrical leads, folding paddle-style leads, or any other suitable type of lead.

It will be understood that, in other embodiments, the battery module 630 may be coupled or attached to a different side or surface of the circuit module 610. For example, the battery module 630 may be coupled to a lateral side or surface of the circuit module 610. In some embodiments, the chambers can be sealed independently of one another such that, for example, a fluid that leaks into the battery module 630 does not leak into the circuit module 610, and vice versa. In some embodiments, the glass components provide a single enclosure for the circuit 612 and the battery stack 632. For example, in some embodiments, there is no separator between the circuit 612 and the battery stack 632, and a single housing body surrounds the lateral sides of the circuit 612 and the battery stack 632, which caps or plates 624, 636 enclosing the assembly. In some aspects, separate chambers or enclosures may provide for improved hermetic sealing for the battery, which may increase the lifespan of the battery. Additionally, using separate housings and enclosures for the battery module 630 and the circuit module 610 may provide a modular design in which different battery modules can be used according to the type of circuit module 610 and/or treatment regimen prescribed for the patient. In some embodiments, the entire glass enclosure of the device 600 is covered with a potting material, such as silicone.

FIG. 8 is a diagrammatic view of an interfacing surface of the circuit 612. The circuit 612 includes a number of electronic components mounted on a substrate 642. In an exemplary embodiment, the substrate 642 comprises a glass substrate whereon the electronics are formed using a parallel wafer fabrication process. However, other materials may be used for the substrate 642, including silicon, ceramic, resin, polymer, or any other suitable material. A first set of electrical contacts 644 or batter contacts is provided to receive power from the battery stack 632. A second set of electrical contacts 646 or lead contacts is provided to interface with the therapeutic electrical leads. in that regard, the leads receive electrical power from the circuit 612 via the set of electrical contacts 646. In the illustrated embodiment, two sets of six electrodes are shown. However, in another exemplary embodiment, the set of electrodes 646 includes two sets of eight electrodes. Any suitable number of electrodes may be used, such as two, four, six, eight, ten, twelve, fifteen, sixteen, twenty, or another other suitable number, both larger or smaller. A coil 648 surrounds the circuit 612 and is in electrical communication with the electronic components of the circuit 612 and the first set of electrical contacts 644. The coil 648 is configured to receive electrical power wirelessly from a recharging module. In some embodiments, the coil 648 is configured to receive electrical power in accordance with the Qi wireless power protocol, NFC wireless power protocol, or any other suitable wireless power protocol. As mentioned above, because the length of the housing 634 is less than the length of the housing 614, the contact leads 646 can be accessible through passthroughs 618 when the housing 614 is coupled to the housing 634. The lead contacts 646 are aligned with the passthroughs 618 to allow for electrical connection to the circuit 612 through the passthroughs 618. In other embodiments, the battery stack 632 is positioned in the larger housing 614 and the circuit 612 is positioned in the smaller housing 634.

In an exemplary embodiment, the circuit 612 comprises a redundant power supply architecture whereby the electrical components including surface mount technology (SMT) components of the circuit 612 can receive power from the battery stack 632 via the contacts 644, or directly from the wireless recharging module via the coil 648, or both. In one embodiment, a controller of the circuit 612 is configured to detect a battery failure so that power can be routed directly to the electronic components of the circuit 612 and the electrical leads so that neurotherapy can continue in the event of the battery failure. Accordingly, the recharging module can be used to recharge the battery stack 632 via the coil 648 and/or directly power the circuit 612 to facilitate the neurotherapy. In other embodiments, wireless electrical power harnessed by the coil 648 is simultaneously directed to both the electronic components of the circuit 612 and the battery stack 632 to recharge the batteries 632 and power the circuit 612. Accordingly, in the event the battery stack 632 fails and no longer holds an acceptable amount of charge to independently power the circuit 612, the electrical power received from the coil 648 may still be used to power the circuit 612 and therefore continue the neurotherapy procedure. Embodiments of the present invention, therefore, also include a bypass circuit, e.g., a switch, for example, a transistor, that is designed to cut off the battery stack 632 to prevent charging the battery stack 632 so that all received power is directed to power the circuit 612.

A communications antenna 650 is also disposed on the interfacing surface of the circuit 612. The communications antenna 650 is configured to wireless receive commands from and provide information to a patient interface device. In some embodiments, the patient interface device comprises a mobile computing device, such as a smartphone, tablet, laptop, smart watch, or any other suitable computing device. In some embodiments, the antenna 650 is configured to receive and transmit information using a standard wireless protocol such as Bluetooth®, NFC, Wi-Fi, 5G, ultra-wide band (UWB), or any other suitable wireless protocol. In some embodiments, the antenna 650 may be used to provide status information of the device 600, remaining battery life, battery health, treatment times, diagnostic information, and any other relevant information. The antenna 650 may also be configured to receive and distribute command signals to control the therapy protocol, including pulse strength, current, duration, pulse pattern, or any other suitable command.

FIG. 9 is a cross-sectional, diagrammatic view of a solid-state, wafer-based battery, according to an embodiment of the present disclosure. The battery 700 includes a substrate layer 710, which may be formed from a wafer. In an exemplary embodiment, the substrate 710 comprises glass. However, any suitable substrate material may be used, including ceramic, silicon, polymer, or any other suitable material. A first charge collecting layer 720 is deposited on the substrate 710. In some embodiments, the first charge collecting layer 720 comprises a conductive material that can be used as an interface or electrical connection with a conductive wire or other connector to provide power to the circuit 612 and/or receive power from the coil 648. A cathode 730 is deposited over the first charge collecting layer 720. A solid electrolyte layer 740 is provided over the cathode 730, such that it separates the cathode 730 from an anode 750. A second charge collecting layer 760 is deposited over the anode 750. As with the first charge collecting layer 730, the second charge collecting layer may comprise a conductive material that can be used as an interface or electrical connection with a conductive wire or other connector to provide power to the circuit 612 and/or receive power from the coil 648. An insulating cap layer 770 is provided over the second charge collecting layer 760. In an exemplary embodiment, the layers of the battery 700 are formed by a wafer fabrication process using, e.g., chemical vapor deposition, DC magnetron sputtering, or any other suitable fabrication process. In some embodiments, the battery 700 includes biocompatible materials such as gold, and materials such as lithium cobalt oxide, lithium phosphate, or any other suitable material. In that regard, the battery 700 may be fabricated with no free-lithium materials, in some embodiments. Compared to liquid or gel electrolyte batteries such as lithium-ion batteries, solid state batteries may have an increased live span of thousands of recharge cycles. By increasing the lifespan of the batteries, fewer surgeries may be needed to maintain the device 600.

FIG. 10 is a perspective view of a battery stack 632 that comprises a plurality of individual batteries or cells having the construction described above with respect to FIG. 9. The batteries of the stack 632 are electrically coupled to the circuit 612. Each battery of the stack includes positive and negative contacts that are coupled to respective charge collecting layers of the battery. In some embodiments, the contacts of the batteries are sized, shaped, and structurally arranged to provide for a stackable configuration in which a contact of a first battery couples to a corresponding contact of a second battery when stacked on top of one another such that the stacked batteries are connected in series. In other embodiments, electrical connectors are used to couple the batteries to one another and/or to the circuit module 610.

FIGS. 11A-11C provide various views of a circuit module 900 of an implantable nerve transducer device having a cylindrical construction. The module 900 includes an annular housing body 914 surrounding a circular circuit 912. The circuit may comprise components similar or identical to those described below, including a communications antenna 928 and a coil 926. The circuit 912 is encapsulated by the annular housing 914, a first plate 924, and a second plate 920. In an exemplary embodiment, the housing 914, first plate 924, and second plate 920 comprise glass. In some embodiments, the module 900 shown in FIGS. 11A-11C may be coupled to a battery module as similarly shown in FIGS. 6A-7B. The battery module may comprise a cylindrical shape or profile matching the shape or profile of the module 900.

Example embodiments of the invention are summarized here. Other embodiments can also be understood from the entirety of the specification as well as the claims filed herein.

Example 1. An implantable nerve transducer includes a first housing including a first material, the first housing defining a first chamber; a stimulator circuit positioned within the first chamber and being disposed on a first substrate including the first material, the first material being a non-metallic biocompatible material; a second housing including the first material, the second housing defining a second chamber; and a solid-state battery disposed on a second substrate including the first material, the solid-state battery being positioned within the second chamber, the second housing being mounted to the first housing, the implantable nerve transducer being configured to be implantable and configured to stimulate or sense signals from a nerve of a living organism.

Example 2. The implantable nerve transducer of example 1, where the first material includes glass.

Example 3. The implantable nerve transducer of one of examples 1 or 2, where the first housing is welded to the second housing.

Example 4. The implantable nerve transducer of one of examples 1 to 3, where the stimulator circuit includes a controller and a coil, where the coil is configured to wirelessly receive electromagnetic energy and provide electrical power to the solid-state battery to recharge the solid-state battery.

Example 5. The implantable nerve transducer of one of examples 1 to 4, where the solid-state battery is configured to provide electrical power to the stimulator circuit when the coil is not receiving electromagnetic energy.

Example 6. The implantable nerve transducer of one of examples 1 to 5, where the coil is configured to provide electrical power to the controller when the solid-state battery is discharged.

Example 7. The implantable nerve transducer of one of examples 1 to 6, where the solid-state battery includes a cathode and an anode, and where the cathode or the anode includes a noble metal.

Example 8. The implantable nerve transducer of one of examples 1 to 7, further including a separator positioned between the first housing and the second housing and partially defining the first chamber and the second chamber, where the separator includes a first aperture configured to align with a battery contact of the stimulator circuit, and a second aperture configured to align with a lead contact of the stimulator circuit.

Example 9. The implantable nerve transducer of one of examples 1 to 8, where the stimulator circuit includes a controller, a coil, and a bypass circuit, where the coil and circuitry is configured to wirelessly receive electromagnetic energy and provide electrical power directly to the controller bypassing the solid-state battery with the bypass circuit.

Example 10. The implantable nerve transducer of one of examples 1 to 9, where each of the first substrate and the second substrate includes a glass wafer substrate.

Example 11. The implantable nerve transducer of one of examples 1 to 10, where the solid-state battery includes a plurality of batteries stacked to form an integrated battery.

Example 12. The implantable nerve transducer of one of examples 1 to 11, where the solid-state battery includes a surface mount technology package including a ceramic substrate.

Example 13. The implantable nerve transducer of one of examples 1 to 12, where the solid-state battery includes a stacked battery module, the stacked battery module including a plurality of substrates stacked over each other, each of the plurality of substrates including a rigid glass substrate, a rigid silicon substrate, or a flexible substrate that are stackable.

Example 14. The implantable nerve transducer of one of examples 1 to 13, where the first chamber is configured to hold the solid-state battery in place of the stimulator circuit and the second chamber is configured to hold the stimulator circuit in place of the solid-state battery.

Example 15. The implantable nerve transducer of one of examples 1 to 14, where the solid-state battery includes a plurality of battery modules assembled inside the second chamber.

Example 16. The implantable nerve transducer of one of examples 1 to 15, where the solid-state battery includes a combination of SSBs in the second chamber and surface mount technology batteries.

Example 17. The implantable nerve transducer of one of examples 1 to 16, further including a wireless antenna placed in the second chamber and configured to avoid electrical interference with the stimulator circuit in the first chamber.

Example 18. An implantable nerve transducer including: a housing defining a chamber and including a non-metallic biocompatible material; a stimulator circuit positioned within the housing and being disposed on a first substrate including the non-metallic biocompatible material; and a solid-state battery disposed on a second substrate including the non-metallic biocompatible material, the solid-state battery being positioned within the housing, the implantable nerve transducer being configured to be implantable and configured to stimulate a nerve, block a neural signal, or sense nerve signals of a living organism.

Example 19. The implantable nerve transducer of example 18, where the first substrate and the second substrate are the same substrate including a printed circuit board, and where the solid-state battery includes a plurality of surface mount technology batteries mounted on the printed circuit board.

Example 20. The implantable nerve transducer of one of examples 18 or 19, further including vias to transfer signal from inside the implant housing to an external electrode outside the implant housing without located on a top wall or a bottom wall of the single chamber.

Example 21. A method includes forming a implantable nerve transducer. The method includes forming a first housing comprising a first material, the first housing defining a first chamber, mounting a stimulator circuit within the first chamber, the stimulator circuit being formed on a first substrate comprising the first material, the first material being a non-metallic biocompatible material, forming a second housing comprising the first material, the second housing defining a second chamber, and mounting a solid-state battery within the second chamber, the solid-state battery being formed on a second substrate comprising the first material, the second housing being mounted to the first housing.

Example 22. The method of claim 21, further includes implanting the implantable nerve transducer within the living organism, and powering the implantable nerve transducer to stimulate or sense signals from a nerve of a living organism.

As those of some skill in this art will by now appreciate and depending on the particular application at hand, many modifications, substitutions and variations can be made in and to the materials, apparatus, configurations and methods of fabrication of the devices of the present disclosure without departing from the spirit and scope thereof. In light of this, the scope of the present disclosure should not be limited to that of the particular embodiments illustrated and described herein, as they are merely by way of some examples thereof, but rather, should be fully commensurate with that of the claims appended hereafter and their functional equivalents.

Claims

1. An implantable nerve transducer comprising: a first housing comprising a first material, the first housing defining a first chamber;a stimulator circuit positioned within the first chamber and being disposed on a first substrate comprising the first material, the first material being a non-metallic biocompatible material;a second housing comprising the first material, the second housing defining a second chamber; anda solid-state battery disposed on a second substrate comprising the first material, the solid-state battery being positioned within the second chamber, the second housing being mounted to the first housing, the implantable nerve transducer being configured to be implantable and configured to stimulate or sense signals from a nerve of a living organism.

2. The implantable nerve transducer of claim 1, wherein the first material comprises glass.

3. The implantable nerve transducer of claim 1, wherein the first housing is welded to the second housing.

4. The implantable nerve transducer of claim 1, wherein the stimulator circuit comprises a controller and a coil, wherein the coil is configured to wirelessly receive electromagnetic energy and provide electrical power to the solid-state battery to recharge the solid-state battery.

5. The implantable nerve transducer of claim 4, wherein the solid-state battery is configured to provide electrical power to the stimulator circuit when the coil is not receiving electromagnetic energy.

6. The implantable nerve transducer of claim 5, wherein the coil is configured to provide electrical power to the controller when the solid-state battery is discharged.

7. The implantable nerve transducer of claim 1, wherein the solid-state battery comprises a cathode and an anode, and wherein the cathode or the anode comprises a noble metal.

8. The implantable nerve transducer of claim 1, further comprising a separator positioned between the first housing and the second housing and partially defining the first chamber and the second chamber, wherein the separator comprises a first aperture configured to align with a battery contact of the stimulator circuit, and a second aperture configured to align with a lead contact of the stimulator circuit.

9. The implantable nerve transducer of claim 1, wherein the stimulator circuit comprises a controller, a coil, and a bypass circuit, wherein the coil and circuitry is configured to wirelessly receive electromagnetic energy and provide electrical power directly to the controller bypassing the solid-state battery with the bypass circuit.

10. The implantable nerve transducer of claim 1, wherein each of the first substrate and the second substrate comprises a glass wafer substrate.

11. The implantable nerve transducer of claim 1, wherein the solid-state battery comprises a plurality of batteries stacked to form an integrated battery.

12. The implantable nerve transducer of claim 1, wherein the solid-state battery comprises a surface mount technology package comprising a ceramic substrate.

13. The implantable nerve transducer of claim 1, wherein the solid-state battery comprises a stacked battery module, the stacked battery module comprising a plurality of substrates stacked over each other, each of the plurality of substrates comprising a rigid glass substrate, a rigid silicon substrate, or a flexible substrate that are stackable.

14. The implantable nerve transducer of claim 1, wherein the first chamber is configured to hold the solid-state battery in place of the stimulator circuit and the second chamber is configured to hold the stimulator circuit in place of the solid-state battery.

15. The implantable nerve transducer of claim 1, further comprising a wireless antenna placed in the second chamber and configured to avoid electrical interference with the stimulator circuit in the first chamber.

16. An implantable nerve transducer comprising: a housing defining a chamber and comprising a non-metallic biocompatible material;a stimulator circuit positioned within the housing and being disposed on a first substrate comprising the non-metallic biocompatible material; anda solid-state battery disposed on a second substrate comprising the non-metallic biocompatible material, the solid-state battery being positioned within the housing, the implantable nerve transducer being configured to be implantable and configured to stimulate a nerve, block a neural signal, or sense nerve signals of a living organism.

17. The implantable nerve transducer of claim 16, wherein the first substrate and the second substrate are the same substrate comprising a printed circuit board, and wherein the solid-state battery comprises a plurality of surface mount technology batteries mounted on the printed circuit board.

18. The implantable nerve transducer of claim 16, further comprising vias to transfer signal from inside the implant housing to an external electrode outside the implant housing without located on a top wall or a bottom wall of the single chamber.

19. A method comprising: forming a implantable nerve transducer byforming a first housing comprising a first material, the first housing defining a first chamber,mounting a stimulator circuit within the first chamber, the stimulator circuit being formed on a first substrate comprising the first material, the first material being a non-metallic biocompatible material,forming a second housing comprising the first material, the second housing defining a second chamber, andmounting a solid-state battery within the second chamber, the solid-state battery being formed on a second substrate comprising the first material, the second housing being mounted to the first housing.

20. The method of claim 19, further comprising implanting the implantable nerve transducer within the living organism, and powering the implantable nerve transducer to stimulate or sense signals from a nerve of a living organism.