BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 shows functional elements of a generic implanted electronic system.
FIG. 2 shows functional elements of a supply system according to one embodiment of the present invention.
FIG. 3 shows various signals associated with the system in FIG. 2.
FIG. 4 shows the general configuration of one specific embodiment of a single chip processor.
FIG. 5 shows an example of a full wave rectifier composed of MOS-transistors switched as diodes.
FIG. 6 shows an example of a full wave rectifier composed of active MOS-transistors.
FIG. 7 shows one example of a system for stimulus generation within a single chip processor.
DETAILED DESCRIPTION OF SPECIFIC EMBODIMENTS
Embodiments of the present invention are directed to an implantable electronic system which does not develop a dc potential between its ports. For example, the implantable electronic system may be a supply system and single chip processor as shown in FIG. 1 with dc free input and output contacts. The supply system and/or the single chip processor may be contained within a non-hermetic, humidity resistant package, which is gas permeable when implanted, but resists being affected by the humid biologically active implanted environment. In other specific embodiments, the humidity resistant package may be hermetically sealed.
FIG. 2 shows an embodiment in of an implantable power supply which has dc-free input and output contacts. Supply input contacts 201 and 202, supply output contacts 203 and 204, and supply input coil 205 are outside the humidity resistant package 200. Implanted supply input coil 205 (having an inductance L2) and supply input capacitor 206 (having a capacitance C2) represent a parallel tuned circuit to receive an externally generated radio-frequency (rf) power signal u2(t). Assuming that the supply input coil 205 is ideal, there is no dc potential developed between the input contacts 201 and 202. Signal u2(t) is full-wave rectified and smoothed by a rectifier circuit 207 which includes two diodes and two capacitors (capacitances C0). For sufficiently large capacitances C0, the resulting voltages VCC and VSS are dc-like potentials. The supply system also contains a clock generator 209 which generates non-overlapping clock signals φ1(t) and φ2(t). These clock signals φ1(t) and φ2(t) control switches within a switching matrix 208.
As shown in FIG. 3, during the periods when φ1(t)=VCC and φ2(t)=VSS, voltages VCC and VSS respectively are connected to the supply output contacts 203 and 204 such that up(t)=VCC−VSS. Vice versa, during φ1(t)=VSS and φ2(t)=VCC, it follows that up(t)=VSS−VCC. For φ1(t)=VSS, and φ2(t)=VSS, the supply output contacts 203 and 204 are floating, i.e., they have no defined electrical potential. If the mean duration of state φ1(t)=VCC is equal to the mean duration of state φ2(t)=VCC, then supply output contacts 203 and 204 have no dc-potential between each other. In addition, there is no dc-voltage with respect to the supply input contacts 201 and 202, despite the diode voltage drops in rectifier 207. In the case where voltage up(t) has no floating phase and states φ1(t)=VCC and φ2(t)=VCC for equal durations, an almost glitch-free dc-supply voltage for the signal processing stage of the chip is generated. In specific embodiments, the developed signal may contain both energy and information.
An example of a single chip implantable electronic system is shown in FIG. 4. The single processor chip 400 is protected against humidity such as body fluids by one or more passivation layers. Processor chip 400 includes an integrated rectifier 403 and a subsequent processing stage 404 implementing functionality for signal processing and/or stimulation pulse generation. Proper operation of processing stage 404 relies on a power supply voltage with one particular polarity such as is produced by the integrated rectifier 403. For an ideal rectifier if the input signal is defined, then the rectifier output signal is equal in magnitude to that of the input signal, i.e., uR(t)=|uP(t)|. If the input signal up(t) is generated by a supply system such as the one shown in FIG. 2, then uR(t)=VCC−VSS during the periods when uP(t) is non-floating.
Examples of integrated rectifiers are shown in FIGS. 5 and 6. The rectifier depicted in FIG. 5 represents a textbook approach where MOS-transistors 501, 502, 503, and 504 are switched as diodes, i.e., the gates are connected to the drains, respectively. While this approach is very well suited for integration, one disadvantage is that the voltage drops between sources and drains across the MOS-transistors, USD≈1-2V, occur respectively. Thus the output voltage is diminished by 2USD, i.e., uR(t)=|uP(t)|−2USD. For low voltage applications, this reduction might be a significant consideration.
The approach shown in FIG. 6 also utilizes MOS-transistors and thus is well suited for integration, but it avoids large voltage drops across transistors as described in U.S. provisional patent application 60/697,624, filed Jul. 8, 2005, incorporated herein by reference. There are two PMOS-transistors 601 and 603, and two NMOS transistors 602 and 604, which are operated as ON/OFF-switches. Standard CMOS-technology can be used. The gates of the transistors are directly connected to the input voltage rails. For sufficient magnitude of the input voltage difference, it is ensured that uR(t)≈|uP(t)|. The four transistors should be sufficiently large so that there is only a small voltage drop during the switch ON-states. If the voltage drops are too large (typically, larger than about 0.7V), then parasitic substrate PN-diodes tend to get conductive.
FIG. 7 shows an example of a system for stimulus generation within a single-chip system 700. For convenience, only one stimulation electrode pair 708 and 709 is shown, with the impedance between these electrodes is represented by a resistive element, load resistor 710. The goal is for there to be no dc voltage potential developed between input contacts 701 and 702, or between the stimulation electrode pair 708 and 709. Assuming a dc-free input voltage uP(t) composed of segments of constant voltages such as the ones shown in FIG. 3, and an integrated rectifier 703 such as the one shown in FIG. 6, then the rectified voltage is uR(t)≈VCC−VSS, if uP(t) is non-floating. Stimulation can be achieved with charge-balanced pulses, for example, by generating a symmetrical biphasic pulse. For the first phase, a current amplitude iP(t) is applied in first current source 704 (e.g., PMOS transistors) and first switch 706 (e.g., an NMOS transistor) is closed. For the second phase, a current amplitude iN(t) is applied in second current source 705 (e.g., NMOS transistors) and second switch 707 (e.g., a PMOS transistor) is closed. With such a switching procedure, the mean potentials at the electrodes 707 and 708 are
respectively. Besides it is ensured that the mean potentials at 708/709 are equal to the mean potentials at 701/702, even if the insulation at 701/702 provided, e.g., by some non-hermetic organic material, is not perfect.
In further embodiments, the power supply and the prosthetic processing circuit may be integrated onto one single chip, this chip being encapsulated by some non-hermetic material. The chip itself is protected from body fluids by oxide or nitride layers or some similar material, exposing just the input and output pads, which consequentially consist of some non-corrosive biocompatible metal, such as platinum, iridium, gold, niobium, titanium or tantalum. Thus the whole system consists of a non-hermetically encapsulated single chip, one or more receiver coils to receive power and information signals via some rf-carrier and a set of electrodes.
A number of well known rectification circuits may be used. The capacitors C0 (like the ones in FIG. 2) are integrated chip capacitors, which are somewhat limited in size. To obtain a sufficiently smooth dc-supply, this requires either rf-carriers of sufficiently high frequency or a rectangular-shaped input signal. In the latter case, the inductive transcutaneous transmission system needs to be sufficiently broadband.
Although various exemplary embodiments of the invention have been disclosed, various changes and modifications can be made which will achieve some of the advantages of the invention without departing from the true scope of the invention.
Patent Application
20070270922
