This patent document relates to image and video coding and decoding.
Digital video accounts for the largest bandwidth use on the internet and other digital communication networks. As the number of connected user devices capable of receiving and displaying video increases, it is expected that the bandwidth demand for digital video usage will continue to grow.
The present document discloses techniques that can be used by video encoders and decoders for processing coded representation of video using control information useful for decoding of the coded representation.
In one example aspect, a video processing method is disclosed. The method includes determining, for a conversion between a current video block of a video and a bitstream of the video, a usage of an identity transform mode for the conversion of the current video block according to a rule specifying that the usage is based on representative coefficients of one or more representative blocks of the video. The method also includes performing the conversion based on the determining.
In another example aspect, a video processing method is disclosed. The method includes determining, for a conversion between a current video block of a video and a bitstream of the video, a default transform that is applicable to the current video block according to a rule specifying that an identity transform is not used for the conversion of the current video block. The method also includes performing the conversion based on the determining.
In another example aspect, a video processing method is disclosed. The method includes performing a conversion between a video and a bitstream of the video according to a rule. The rule specifies that an indication is included at a video region level. The indication indicates whether a zero-out operation in which some residual coefficients are set to zero is applied to a transform block of a video block in the video region.
In another example aspect, a video processing method is disclosed. The method includes performing a conversion between a current video block of a video and a bitstream of the video according to a rule. An identity transform mode is applied to the current video block during the conversion, and the rule specifies that a zero-out operation during which non-zero coefficients are restricted to be within a sub-region of the current video block is enabled.
In another example aspect, a video processing method is disclosed. The method includes determining, for a conversion between a current video block of a video and a bitstream of the video, a zero-out type of the current video block of a zero-out operation. The method also includes performing the conversion according to the determining. The current video block is coded by applying an identity transform to the current video block. The zero-out type of the video block defines a sub-region of the video block within which non-zero coefficients are restricted to be for the zero-out operation.
In another example aspect, a video processing method is disclosed. The method includes performing a conversion between a current video block of a video and a bitstream of the video according to a rule. The rule specifies that a usage of an identity transform mode for the conversion of the current video block is disabled in case at least one non-zero coefficient is located outside of a zero-out region determined by the identity transform mode. The zero-out region comprises a region within which non-zero coefficients are restricted to be for a zero-out operation.
In another example aspect, a video processing method is disclosed. The method includes making a determination, for a conversion between a video block of a video and a coded representation of the video, whether a horizontal or a vertical identity transform is applied to the video block, based on a rule; and performing the conversion based on the determination. The rule specifies a relationship between the determination and representative coefficients from decoded coefficients of one or more representative blocks of the video.
In another example aspect, another video processing method is disclosed. The method includes making a determination, for a conversion between a video block of a video and a coded representation of the video, whether a horizontal or a vertical identity transform is applied to the video block, based on a rule; and performing the conversion based on the determination. The rule specifies a relationship between the determination and decoded luma coefficients of the video block.
In another example aspect, another video processing method is disclosed. The method includes making a determination, for a conversion between a video block of a video and a coded representation of the video, whether a horizontal or a vertical identity transform is applied to the video block, based on a rule; and performing the conversion based on the determination. The rule specifies a relationship between the determination and a value V associates with representative coefficients of decoded coefficients or a representative block.
In another example aspect, another video processing method is disclosed. The method includes determining that one or more syntax fields are present in a coded representation of a video where the video contains one or more video blocks; making a determination, based on the one or more syntax fields, whether a horizontal or a vertical identity transform is enabled for video blocks in the video.
In another example aspect, another video processing method is disclosed. The method includes making a first determination regarding whether use of an identity transform is enabled for a conversion between a video block of a video and a coded representation of the video; making a second determination regarding whether a zero-out operation is enabled during the conversion; and performing the conversion based on the first determination and the second determination.
In another example aspect, another video processing method is disclosed. The method includes performing a conversion between a video block of a video and a coded representation of the video; where the video block is represented in the coded representation as a coded block, where non-zero coefficients of the coded block are restricted to be within one or more sub-regions; and where an identity transform is applied for generating the coded block.
In yet another example aspect, a video encoder apparatus is disclosed. The video encoder comprises a processor configured to implement above-described methods.
In yet another example aspect, a video decoder apparatus is disclosed. The video decoder comprises a processor configured to implement above-described methods.
In yet another example aspect, a computer readable medium having code stored thereon is disclose. The code embodies one of the methods described herein in the form of processor-executable code.
These, and other, features are described throughout the present document.
Section headings are used in the present document for ease of understanding and do not limit the applicability of techniques and embodiments disclosed in each section only to that section. Furthermore, H.266 terminology is used in some description only for ease of understanding and not for limiting scope of the disclosed techniques. As such, the techniques described herein are applicable to other video codec protocols and designs also.
This document is related to video coding technologies. Specifically, it is related to transform skip mode and transform types (e.g., including identity transform) in video coding. It may be applied to the existing video coding standard like High Efficiency Video Coding (HEVC), or the standard Versatile Video Coding (VVC) to be finalized. It may be also applicable to future video coding standards or video codec.
Video coding standards have evolved primarily through the development of the well-known International Telecommunication Union Telecommunication Standardization Sector (ITU-T) and International Organization for Standardization (ISO)/International Electrotechnical Commission (IEC) standards. The ITU-T produced H.261 and H.263, ISO/IEC produced Moving Picture Experts Group (MPEG)-1 and MPEG-4 Visual, and the two organizations jointly produced the H.262/MPEG-2 Video and H.264/MPEG-4 Advanced Video Coding (AVC) and H.265/High Efficiency Video Coding (HEVC) standards. Since H.262, the video coding standards are based on the hybrid video coding structure where temporal prediction plus transform coding are utilized. To explore the future video coding technologies beyond HEVC, Joint Video Exploration Team (JVET) was founded by VCEG and MPEG jointly in 2015. Since then, many new methods have been adopted by JVET and put into the reference software named Joint Exploration Model (JEM). In April 2018, the Joint Video Expert Team (JVET) between VCEG (Q6/16) and ISO/IEC JTC1 SC29/WG11 (MPEG) was created to work on the VVC standard targeting at 50% bitrate reduction compared to HEVC.
2.2. Intra Mode Coding with 67 Intra Prediction Modes
To capture the arbitrary edge directions presented in natural video, the number of directional intra modes is extended from 33, as used in HEVC, to 65. The additional directional modes are depicted as red dotted arrows in
Conventional angular intra prediction directions are defined from 45 degrees to −135 degrees in clockwise direction as shown in
In the HEVC, every intra-coded block has a square shape and the length of each of its side is a power of 2. Thus, no division operations are required to generate an intra-predictor using DC mode. In VVV2, blocks can have a rectangular shape that necessitates the use of a division operation per block in the general case. To avoid division operations for DC prediction, only the longer side is used to compute the average for non-square blocks.
Conventional angular intra prediction directions are defined from 45 degrees to −135 degrees in clockwise direction. In VTM2, several conventional angular intra prediction modes are adaptively replaced with wide-angle intra prediction modes for non-square blocks. The replaced modes are signaled using the original method and remapped to the indexes of wide angular modes after parsing. The total number of intra prediction modes for a certain block is unchanged, e.g., 67, and the intra mode coding is unchanged.
To support these prediction directions, the top reference with length 2 W+1, and the left reference with length 2H+1, are defined as shown in
As shown in
In the VTM2, the results of intra prediction of planar mode are further modified by a position dependent intra prediction combination (PDPC) method. PDPC is an intra prediction method which invokes a combination of the un-filtered boundary reference samples and HEVC style intra prediction with filtered boundary reference samples. PDPC is applied to the following intra modes without signaling: planar, DC, horizontal, vertical, bottom-left angular mode and its eight adjacent angular modes, and top-right angular mode and its eight adjacent angular modes.
The prediction sample pred(x,y) is predicted using an intra prediction mode (DC, planar, angular) and a linear combination of reference samples according to the Equation as follows:
pred(x,y)=(wL×R−1,y+wT×Rx,−1−wTL×R−1,−1+(64−wL−wT+wTL)×pred(x,y)+32)>>6
where Rx,−1, R−1,y represent the reference samples located at the top and left of current sample (x, y), respectively, and R−1,−1 represents the reference sample located at the top-left corner of the current block.
If PDPC is applied to DC, planar, horizontal, and vertical intra modes, additional boundary filters are not needed, as required in the case of HEVC DC mode boundary filter or horizontal/vertical mode edge filters.
The PDPC weights are dependent on prediction modes and are shown in Table 2.
In some embodiments, ISP is proposed, which divides luma intra-predicted blocks vertically or horizontally into 2 or 4 sub-partitions depending on the block size dimensions, as shown in Table 3.
For each of these sub-partitions, a residual signal is generated by entropy decoding the coefficients sent by the encoder and then invert quantizing and invert transforming them. Then, the sub-partition is intra predicted and finally the corresponding reconstructed samples are obtained by adding the residual signal to the prediction signal. Therefore, the reconstructed values of each sub-partition will be available to generate the prediction of the next one, which will repeat the process and so on. All sub-partitions share the same intra mode.
Based on the intra mode and the split utilized, two different classes of processing orders are used, which are referred to as normal and reversed order. In the normal order, the first sub-partition to be processed is the one containing the top-left sample of the Coding Unit (CU) and then continuing downwards (horizontal split) or rightwards (vertical split). As a result, reference samples used to generate the sub-partitions prediction signals are only located at the left and above sides of the lines. On the other hand, the reverse processing order either starts with the sub-partition containing the bottom-left sample of the CU and continues upwards or starts with sub-partition containing the top-right sample of the CU and continues leftwards.
In addition to DCT-II which has been employed in HEVC, a Multiple Transform Selection (MTS) scheme is used for residual coding both inter and intra coded blocks. It uses multiple selected transforms from the DCT8/DST7. The newly introduced transform matrices are DST-VII and DCT-VIII. Table 4 shows the basis functions of the selected DST/DCT.
There are two ways to enable MTS, one is explicit MTS; and the other is implicit MTS.
Implicit MTS is a recent tool in VVC. The variable implicitMtsEnabled is derived as follows:
Whether to enable implicit MTS is dependent on the value of a variable implicitMtsEnabled. The variable implicitMtsEnabled is derived as follows:
trTypeHor=(nTbW>=4&& nTbW<=16)?1:0 (1188)
trTypeVer=(nTbH>=4&&nTbH<=16)?1:0 (1189)
nonZeroW=(nTbW==4∥nTbH==4)?4:8 (1190)
nonZeroH=(nTbW==4∥nTbH==4)?4:8 (1191)
nonZeroW=Min(nTbW,(trTypeHor>0)?16:32) (1192)
nonZeroH=Min(nTbH,(trTypeVer>0)?16:32) (1193)
In order to control MTS scheme, one flag is used to specify whether explicit MTS for intra/inter is present in a bitstream. In addition, two separate enabling flags are specified at Sequence Parameter Set (SPS) level for intra and inter, respectively to indicate whether explicit MTS is enabled. When MTS is enabled at SPS, a CU level transform index may be signaled to indicate whether MTS is applied or not. Here, MTS is applied only for luma. The MTS CU level index (denoted by mts_idx) is signaled when the following conditions are satisfied.
If 1st bin of mts_idx is equal to zero, then DCT2 is applied in both directions. However, if 1st bin of the mts_idx is equal to one, then two more bins are additionally signaled to indicate the transform type for the horizontal and vertical directions, respectively. Transform and signaling mapping table as shown in Table 5. When it comes to transform matrix precision, 8-bit primary transform cores are used. Therefore, all the transform cores used in HEVC are kept as the same, including 4-point DCT-2 and Discrete Sine Transform (DST)-7, 8-point, 16-point and 32-point DCT-2. Also, other transform cores including 64-point DCT-2, 4-point DCT-8, 8-point, 16-point, 32-point DST-7 and DCT-8, use 8-bit primary transform cores.
To reduce the complexity of large size DST-7 and DCT-8, High frequency transform coefficients are zeroed out for the DST-7 and DCT-8 blocks with size (width or height, or both width and height) equal to 32. Only the coefficients within the 16×16 lower-frequency region are retained.
As in HEVC, the residual of a block can be coded with transform skip mode. To avoid the redundancy of syntax coding, the transform skip flag is not signaled when the CU level MTS CU flag is not equal to zero. The block size limitation for transform skip is the same to that for MTS in JEM4, which indicate that transform skip is applicable for a CU when both block width and height are equal to or less than 32.
In VTM8, large block-size transforms, up to 64×64 in size, are enabled, which is primarily useful for higher resolution video, e.g., 1080p and 4K sequences. High frequency transform coefficients of blocks with DCT2 transform applied are zeroed out for the transform blocks with size (width or height, or both width and height) no smaller than 64, so that only the lower-frequency coefficients are retained, all other coefficients are forced to be zeros without being signaled. For example, for an M×N transform block, with M as the block width and N as the block height, when M is no smaller than 64, only the left 32 columns of transform coefficients are kept. Similarly, when N is no smaller than 64, only the top 32 rows of transform coefficients are kept.
High frequency transform coefficients of blocks with DCT8 or DST7 transform applied are zeroed out for the transform blocks with size (width or height, or both width and height) no smaller than 32, so that only the lower-frequency coefficients are retained, all other coefficients are forced to be zeros without being signaled. For example, for an M×N transform block, with M as the block width and N as the block height, when M is no smaller than 32, only the left 16 columns of transform coefficients are kept. Similarly, when N is no smaller than 32, only the top 16 rows of transform coefficients are kept.
In JEM, secondary transform is applied between forward primary transform and quantization (at encoder) and between de-quantization and invert primary transform (at decoder side). As shown in
Application of a non-separable transform is described as follows using input as an example. To apply the non-separable transform, the 4×4 input block X
is first represented as a vector {right arrow over (X)}:
{right arrow over (X)}=[X00 X01 X02 X03 X10 X11 X12 X13 X20 X21 X22 X23 X30 X31 X32 X33]T
The non-separable transform is calculated as {right arrow over (F)}=T·{right arrow over (X)}, where {right arrow over (F)} indicates the transform coefficient vector, and T is a 16×16 transform matrix. The 16×1 coefficient vector {right arrow over (F)} is subsequently re-organized as 4×4 block using the scanning order for that block (horizontal, vertical or diagonal). The coefficients with smaller index will be placed with the smaller scanning index in the 4×4 coefficient block. There are totally 35 transform sets and 3 non-separable transform matrices (kernels) per transform set are used. The mapping from the intra prediction mode to the transform set is pre-defined. For each transform set, the selected non-separable secondary transform candidate is further specified by the explicitly signaled secondary transform index. The index is signaled in a bit-stream once per Intra CU after transform coefficients.
The LFNST was introduced and 4 transform set (instead of 35 transform sets) mapping has been used in some embodiments. In some implementations, 16×64 (may further be reduced to 16×48) and 16×16 matrices are employed for 8×8 and 4×4 blocks, respectively. For notational convenience, the 16×64 (may further be reduced to 16×48) transform is denoted as LFNST8×8 and the 16×16 one as LFNST4×4.
The main idea of a Reduced Transform (RT) is to map an N dimensional vector to an R dimensional vector in a different space, where R/N (R<N) is the reduction factor.
The RT matrix is an R×N matrix as follows:
where the R rows of the transform are R bases of the N dimensional space. The invert transform matrix for RT is the transpose of its forward transform. The forward and invert RT are depicted in
In this contribution, the LFNST8×8 with a reduction factor of 4 (¼ size) is applied. Hence, instead of 64×64, which is conventional 8×8 non-separable transform matrix size, 16×64 direct matrix is used. In other words, the 64×16 invert LFNST matrix is used at the decoder side to generate core (primary) transform coefficients in 8×8 top-left regions. The forward LFNST8×8 uses 16×64 (or 8×64 for 8×8 block) matrices so that it produces non-zero coefficients only in the top-left 4×4 region within the given 8×8 region. In other words, if LFNST is applied then the 8×8 region except the top-left 4×4 region will have only zero coefficients. For LFNST4×4, 16×16 (or 8×16 for 4×4 block) direct matrix multiplication is applied.
An invert LFNST is conditionally applied when the following two conditions are satisfied:
If both width (W) and height (H) of a transform coefficient block is greater than 4, then the LFNST8×8 is applied to the top-left 8×8 region of the transform coefficient block. Otherwise, the LFNST4×4 is applied on the top-left min(8, W)×min(8, H) region of the transform coefficient block.
If LFNST index is equal to 0, LFNST is not applied. Otherwise, LFNST is applied, of which kernel is chosen with the LFNST index. The LFNST selection method and coding of the LFNST index are explained later.
Furthermore, LFNST is applied for intra CU in both intra and inter slices, and for both Luma and Chroma. If a dual tree is enabled, LFNST indices for Luma and Chroma are signaled separately. For inter slice (the dual tree is disabled), a single LFNST index is signaled and used for both Luma and Chroma.
In 13th JVET meeting, Intra Sub-Partitions (ISP), as a new intra prediction mode, was adopted. When ISP mode is selected, LFNST is disabled and LFNST index is not signaled, because performance improvement was marginal even if LFNST is applied to every feasible partition block. Furthermore, disabling LFNST for ISP-predicted residual could reduce encoding complexity.
A LFNST matrix is chosen from four transform sets, each of which consists of two transforms. Which transform set is applied is determined from intra prediction mode as the following:
The index to access the Table, denoted as IntraPredMode, have a range of [−14, 83], which is a transformed mode index used for wide angle intra prediction.
As a further simplification, 16×48 matrices are applied instead of 16×64 with the same transform set configuration, each of which takes 48 input data from three 4×4 blocks in a top-left 8×8 block excluding right-bottom 4×4 block (
The forward LFNST8×8 with R=16 uses 16×64 matrices so that it produces non-zero coefficients only in the top-left 4×4 region within the given 8×8 region. In other words, if LFNST is applied then the 8×8 region except the top-left 4×4 region generates only zero coefficients. As a result, LFNST index is not coded when any non-zero element is detected within 8×8 block region other than top-left 4×4 (which is depicted in
Usually, before applying the invert LFNST on a 4×4 sub-block, any coefficient in the 4×4 sub-block may be non-zero. However, it is constrained that in some cases, some coefficients in the 4×4 sub-block must be zero before invert LFNST is applied on the sub-block.
Let nonZeroSize be a variable. It is required that any coefficient with the index no smaller than nonZeroSize when it is rearranged into a 1-D array before the invert LFNST must be zero.
When nonZeroSize is equal to 16, there is no zero-out constrain on the coefficients in the top-left 4×4 sub-block.
In some embodiments, when the current block size is 4×4 or 8×8, nonZeroSize is set equal to 8. For other block dimensions, nonZeroSize is set equal to 16.
2.8. Affine Linear Weighted Intra Prediction (ALWIP, a.k.a. Matrix Based Intra Prediction)
Affine linear weighted intra prediction (ALWIP, a.k.a. Matrix based intra prediction (MIP)) is used in some embodiments.
In some embodiments, two tests are conducted. In test 1, ALWIP is designed with a memory restriction of 8K bytes and at most 4 multiplications per sample. Test 2 is similar to test 1, but further simplifies the design in terms of memory requirement and model architecture.
For an inter-predicted CU with cu_cbf equal to 1, cu_sbt_flag may be signaled to indicate whether the whole residual block or a sub-part of the residual block is decoded. In the former case, inter MTS information is further parsed to determine the transform type of the CU. In the latter case, a part of the residual block is coded with inferred adaptive transform and the other part of the residual block is zeroed out. The SBT is not applied to the combined inter-intra mode.
In sub-block transform, position-dependent transform is applied on luma transform blocks in SBT-V and SBT-H (chroma transform block (TB) always using DCT-2). The two positions of SBT-H and SBT-V are associated with different core transforms. More specifically, the horizontal and vertical transforms for each SBT position is specified in
Scan Region Based Coefficient Coding (SRCC) has been adopted into AVS-3. With SRCC, a bottom-right position (SRx, SRy) as shown in
As disclosed in PCT/CN2019/090261 (incorporated herein by reference), an implicit selection of transform solution is given where the selection of transform matrices (either DCT2 for both horizontal and vertical transform or DST7 for both) is determined by the parity of non-zero coefficients in the transform block.
The proposed method is applied to luma component of intra coded blocks excluding those blocks coded with DT, and the allowed block sizes are from 4×4 to 32×32. The transform type is hidden in the transform coefficients. Specifically, the parity of the number of significant coefficients (e.g., non-zero coefficients) in one block is employed to represent the transform types. Odd number indicates DST-VII is applied, while even number indicates DCT-II is applied.
To remove the 32-point DST-7 introduced by IST, it is proposed to restrict the usage of IST based on the range of residual scanning region when SRCC is used. As shown in
For another case when run-length coefficient coding is used, each non-zero coefficient needs checking. IST is disallowed when either x- or y-coordinate of one non-zero coefficient position is no smaller than 16.
The corresponding syntax changes are indicated using bold italicized and underlined texts as follows:
The current design of IST and MTS has the following problems:
The items listed below should be considered as examples to explain general concepts. These items should not be interpreted in a narrow way. Furthermore, these items can be combined in any manner.
min(x, y) returns the smaller one of x and y.
It is proposed to determine whether horizontal and/or vertical identity transform (IT) (e.g., the transform skip mode) is applied to a current first block according to decoded coefficients of one or multiple representative blocks. Such a method is called ‘implicit determination of IT’. When horizontal and vertical transforms are both ITs, transform skip (TS) mode is used for the current first block.
The ‘block’ may be a transform unit (TU)/prediction unit (PU)/coding unit (CU)/transform block (TB)/prediction block (PB)/coding block (CB). The TU/PU/CU may include one or multiple color components, such as only luma component for the dual tree partitioning and current coded color component is luma; and two chroma components for the dual tree partitioning and current coded color component is chroma; or three color components for the single tree case.
The system 1700 may include a coding component 1704 that may implement the various coding or encoding methods described in the present document. The coding component 1704 may reduce the average bitrate of video from the input 1702 to the output of the coding component 1704 to produce a coded representation of the video. The coding techniques are therefore sometimes called video compression or video transcoding techniques. The output of the coding component 1704 may be either stored, or transmitted via a communication connected, as represented by the component 1706. The stored or communicated bitstream (or coded) representation of the video received at the input 1702 may be used by the component 1708 for generating pixel values or displayable video that is sent to a display interface 1710. The process of generating user-viewable video from the bitstream representation is sometimes called video decompression. Furthermore, while certain video processing operations are referred to as “coding” operations or tools, it will be appreciated that the coding tools or operations are used at an encoder and corresponding decoding tools or operations that reverse the results of the coding will be performed by a decoder.
Examples of a peripheral bus interface or a display interface may include universal serial bus (USB) or high definition multimedia interface (HDMI) or Displayport, and so on. Examples of storage interfaces include SATA (serial advanced technology attachment), peripheral component interconnect (PCI), integrated drive electronics (IDE) interface, and the like. The techniques described in the present document may be embodied in various electronic devices such as mobile phones, laptops, smartphones or other devices that are capable of performing digital data processing and/or video display.
As shown in
Source device 110 may include a video source 112, a video encoder 114, and an input/output (I/O) interface 116.
Video source 112 may include a source such as a video capture device, an interface to receive video data from a video content provider, and/or a computer graphics system for generating video data, or a combination of such sources. The video data may comprise one or more pictures. Video encoder 114 encodes the video data from video source 112 to generate a bitstream. The bitstream may include a sequence of bits that form a coded representation of the video data. The bitstream may include coded pictures and associated data. The coded picture is a coded representation of a picture. The associated data may include sequence parameter sets, picture parameter sets, and other syntax structures. I/O interface 116 may include a modulator/demodulator (modem) and/or a transmitter. The encoded video data may be transmitted directly to destination device 120 via I/O interface 116 through network 130a. The encoded video data may also be stored onto a storage medium/server 130b for access by destination device 120.
Destination device 120 may include an I/O interface 126, a video decoder 124, and a display device 122.
I/O interface 126 may include a receiver and/or a modem. I/O interface 126 may acquire encoded video data from the source device 110 or the storage medium/server 130b. Video decoder 124 may decode the encoded video data. Display device 122 may display the decoded video data to a user. Display device 122 may be integrated with the destination device 120, or may be external to destination device 120 which be configured to interface with an external display device.
Video encoder 114 and video decoder 124 may operate according to a video compression standard, such as the High Efficiency Video Coding (HEVC) standard, Versatile Video Coding (VVC) standard and other current and/or further standards.
Video encoder 200 may be configured to perform any or all of the techniques of this disclosure. In the example of
The functional components of video encoder 200 may include a partition unit 201, a prediction unit 202 which may include a mode select unit 203, a motion estimation unit 204, a motion compensation unit 205 and an intra prediction unit 206, a residual generation unit 207, a transform unit 208, a quantization unit 209, an inverse quantization unit 210, an inverse transform unit 211, a reconstruction unit 212, a buffer 213, and an entropy encoding unit 214.
In other examples, video encoder 200 may include more, fewer, or different functional components. In an example, prediction unit 202 may include an intra block copy (IBC) unit. The IBC unit may perform predication in an IBC mode in which at least one reference picture is a picture where the current video block is located.
Furthermore, some components, such as motion estimation unit 204 and motion compensation unit 205 may be highly integrated, but are represented in the example of
Partition unit 201 may partition a picture into one or more video blocks. Video encoder 200 and video decoder 300 may support various video block sizes.
Mode select unit 203 may select one of the coding modes, intra or inter, e.g., based on error results, and provide the resulting intra- or inter-coded block to a residual generation unit 207 to generate residual block data and to a reconstruction unit 212 to reconstruct the encoded block for use as a reference picture. In some example, Mode select unit 203 may select a combination of intra and inter predication (CIIP) mode in which the predication is based on an inter predication signal and an intra predication signal. Mode select unit 203 may also select a resolution for a motion vector (e.g., a sub-pixel or integer pixel precision) for the block in the case of inter-predication.
To perform inter prediction on a current video block, motion estimation unit 204 may generate motion information for the current video block by comparing one or more reference frames from buffer 213 to the current video block. Motion compensation unit 205 may determine a predicted video block for the current video block based on the motion information and decoded samples of pictures from buffer 213 other than the picture associated with the current video block.
Motion estimation unit 204 and motion compensation unit 205 may perform different operations for a current video block, for example, depending on whether the current video block is in an I slice, a P slice, or a B slice.
In some examples, motion estimation unit 204 may perform uni-directional prediction for the current video block, and motion estimation unit 204 may search reference pictures of list 0 or list 1 for a reference video block for the current video block. Motion estimation unit 204 may then generate a reference index that indicates the reference picture in list 0 or list 1 that contains the reference video block and a motion vector that indicates a spatial displacement between the current video block and the reference video block. Motion estimation unit 204 may output the reference index, a prediction direction indicator, and the motion vector as the motion information of the current video block. Motion compensation unit 205 may generate the predicted video block of the current block based on the reference video block indicated by the motion information of the current video block.
In other examples, motion estimation unit 204 may perform bi-directional prediction for the current video block, motion estimation unit 204 may search the reference pictures in list 0 for a reference video block for the current video block and may also search the reference pictures in list 1 for another reference video block for the current video block. Motion estimation unit 204 may then generate reference indexes that indicate the reference pictures in list 0 and list 1 containing the reference video blocks and motion vectors that indicate spatial displacements between the reference video blocks and the current video block. Motion estimation unit 204 may output the reference indexes and the motion vectors of the current video block as the motion information of the current video block. Motion compensation unit 205 may generate the predicted video block of the current video block based on the reference video blocks indicated by the motion information of the current video block.
In some examples, motion estimation unit 204 may output a full set of motion information for decoding processing of a decoder.
In some examples, motion estimation unit 204 may do not output a full set of motion information for the current video. Rather, motion estimation unit 204 may signal the motion information of the current video block with reference to the motion information of another video block. For example, motion estimation unit 204 may determine that the motion information of the current video block is sufficiently similar to the motion information of a neighboring video block.
In one example, motion estimation unit 204 may indicate, in a syntax structure associated with the current video block, a value that indicates to the video decoder 300 that the current video block has the same motion information as another video block.
In another example, motion estimation unit 204 may identify, in a syntax structure associated with the current video block, another video block and a motion vector difference (MVD). The motion vector difference indicates a difference between the motion vector of the current video block and the motion vector of the indicated video block. The video decoder 300 may use the motion vector of the indicated video block and the motion vector difference to determine the motion vector of the current video block.
As discussed above, video encoder 200 may predictively signal the motion vector. Two examples of predictive signaling techniques that may be implemented by video encoder 200 include advanced motion vector prediction (AMVP) and merge mode signaling.
Intra prediction unit 206 may perform intra prediction on the current video block. When intra prediction unit 206 performs intra prediction on the current video block, intra prediction unit 206 may generate prediction data for the current video block based on decoded samples of other video blocks in the same picture. The prediction data for the current video block may include a predicted video block and various syntax elements.
Residual generation unit 207 may generate residual data for the current video block by subtracting (e.g., indicated by the minus sign) the predicted video block(s) of the current video block from the current video block. The residual data of the current video block may include residual video blocks that correspond to different sample components of the samples in the current video block.
In other examples, there may be no residual data for the current video block for the current video block, for example in a skip mode, and residual generation unit 207 may not perform the subtracting operation.
Transform processing unit 208 may generate one or more transform coefficient video blocks for the current video block by applying one or more transforms to a residual video block associated with the current video block.
After transform processing unit 208 generates a transform coefficient video block associated with the current video block, quantization unit 209 may quantize the transform coefficient video block associated with the current video block based on one or more quantization parameter (QP) values associated with the current video block.
Inverse quantization unit 210 and inverse transform unit 211 may apply inverse quantization and inverse transforms to the transform coefficient video block, respectively, to reconstruct a residual video block from the transform coefficient video block. Reconstruction unit 212 may add the reconstructed residual video block to corresponding samples from one or more predicted video blocks generated by the prediction unit 202 to produce a reconstructed video block associated with the current block for storage in the buffer 213.
After reconstruction unit 212 reconstructs the video block, loop filtering operation may be performed reduce video blocking artifacts in the video block.
Entropy encoding unit 214 may receive data from other functional components of the video encoder 200. When entropy encoding unit 214 receives the data, entropy encoding unit 214 may perform one or more entropy encoding operations to generate entropy encoded data and output a bitstream that includes the entropy encoded data.
The video decoder 300 may be configured to perform any or all of the techniques of this disclosure. In the example of
In the example of
Entropy decoding unit 301 may retrieve an encoded bitstream. The encoded bitstream may include entropy coded video data (e.g., encoded blocks of video data). Entropy decoding unit 301 may decode the entropy coded video data, and from the entropy decoded video data, motion compensation unit 302 may determine motion information including motion vectors, motion vector precision, reference picture list indexes, and other motion information. Motion compensation unit 302 may, for example, determine such information by performing the AMVP and merge mode.
Motion compensation unit 302 may produce motion compensated blocks, possibly performing interpolation based on interpolation filters. Identifiers for interpolation filters to be used with sub-pixel precision may be included in the syntax elements.
Motion compensation unit 302 may use interpolation filters as used by video encoder 20 during encoding of the video block to calculate interpolated values for sub-integer pixels of a reference block. Motion compensation unit 302 may determine the interpolation filters used by video encoder 200 according to received syntax information and use the interpolation filters to produce predictive blocks.
Motion compensation unit 302 may uses some of the syntax information to determine sizes of blocks used to encode frame(s) and/or slice(s) of the encoded video sequence, partition information that describes how each macroblock of a picture of the encoded video sequence is partitioned, modes indicating how each partition is encoded, one or more reference frames (and reference frame lists) for each inter-encoded block, and other information to decode the encoded video sequence.
Intra prediction unit 303 may use intra prediction modes for example received in the bitstream to form a prediction block from spatially adjacent blocks. Inverse quantization unit 304 inverse quantizes, e.g., de-quantizes, the quantized video block coefficients provided in the bitstream and decoded by entropy decoding unit 301. Inverse transform unit 305 applies an inverse transform.
Reconstruction unit 306 may sum the residual blocks with the corresponding prediction blocks generated by motion compensation unit 302 or intra-prediction unit 303 to form decoded blocks. If desired, a deblocking filter may also be applied to filter the decoded blocks in order to remove blockiness artifacts. The decoded video blocks are then stored in buffer 307, which provides reference blocks for subsequent motion compensation/intra predication and also produces decoded video for presentation on a display device.
A listing of solutions preferred by some embodiments is provided next.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., item 1).
1. A video processing method (e.g., method 2200 depicted in
2. The method of solution 1, wherein the one or more representative blocks belong to a color component to which the video block belongs.
3. The method of solution 1, wherein the one or more representative blocks belong to a different color component than that of the video block.
4. The method of any of solutions 1-3, wherein the one or more representative blocks correspond to the video block.
5. The method of any of solutions 1-3, wherein the one or more representative blocks exclude the video block.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., items 1 and 2).
6. The method of any of solutions 1-5, wherein the representative coefficients comprise decoded coefficients having non-zero values.
7. The method of any of solutions 1-6, wherein the relationship specifies to use the representative coefficients based on modified coefficients that are determined by modifying the representative coefficients.
8. The method of any of solutions 1-7, wherein the representative coefficients correspond to significant coefficients of the decoded coefficients.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., item 3).
9. A video processing method, comprising: making a determination, for a conversion between a video block of a video and a coded representation of the video, whether a horizontal or a vertical identity transform is applied to the video block, based on a rule; and performing the conversion based on the determination, wherein the rule specifies a relationship between the determination and decoded luma coefficients of the video block.
10. The method of solution 1, wherein performing the conversion comprises applying the horizontal or the vertical identity transform luma component of the video block and applying DCT2 to chroma components of the video block.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., items 1 and 4).
11. A video processing method, comprising: making a determination, for a conversion between a video block of a video and a coded representation of the video, whether a horizontal or a vertical identity transform is applied to the video block, based on a rule; and performing the conversion based on the determination, wherein the rule specifies a relationship between the determination and a value V associates with representative coefficients of decoded coefficients or a representative block.
12. The method of solution 11, wherein V is equal to a number of representative coefficients.
13. The method of solution 11, wherein V is equal to a sum of values of the representative coefficients.
14. The method of solution 11, wherein Visa function of residual energy distribution of the representative coefficients.
15. The method of any of solutions 11-14, wherein the relationship is defined with respect to a parity of the value V.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., item 5).
16. The method of any of above solutions, wherein the rule specifies that the relationship is further dependent on a coded information of the video block.
17. The method of solution 16, wherein the coded information is a coding mode of the video block.
18. The method of solution 16, wherein the coded information includes a smallest rectangular region that covers all significant coefficients of the video block.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., item 6).
19. The method of any of above solutions, wherein the determination is performed due to the video block having a mode or a constraint on coefficients.
20. The method of solution 19, wherein the type corresponds to an intra-block copy (IBC) mode.
21. The method of solution 19, wherein the constraint on coefficients is such that coefficients outside a rectangular interior of the current block are zero.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., item 7).
22. The method of any of solutions 1-21, wherein, in case that the determination is not to use the horizontal and the vertical identity transform, the conversion is performed using a DCT-2 or a DST-7 transform.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., items 9).
23. The method of any of solutions 1-22, wherein one or more syntax fields in the coded representation is indicative of whether the method is enabled for the video block.
24. The method of solution 23, wherein the one or more syntax fields are included at a sequence level or a picture level or a slice level or a tile group level or a tile level or subpicture level.
25. The method of any of solutions 23-24, wherein the one or more syntax fields are included in a slice header or a picture header.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., items 1 and 8).
26. A video processing method, comprising: determining that one or more syntax fields are present in a coded representation of a video wherein the video contains one or more video blocks; making a determination, based on the one or more syntax fields, whether a horizontal or a vertical identity transform is enabled for video blocks in the video.
27. The method of solution 1, wherein in response that the one or more syntax fields indications implicit determination of transform skip mode is enabled, making a determination, for a conversion between a first video block of the video and the coded representation of the video, whether a horizontal or a vertical identity transform is applied to the video block, based on a rule; and performing the conversion based on the determination, wherein the rule specifies a relationship between the determination and representative coefficients from decoded coefficients of one or more representative blocks of the video.
28. The method of solution 27, the first video block is coded with an intra block copy mode.
29. The method of solution 27, the first video block is coded with an intra mode.
30. The method of solution 27, the first video block is coded with intra mode but not a derived tree (DT) mode.
31. The method of solution 27, the determination is based on the parity of number of non-zero coefficients in the first video block.
32. The method of solution 27, when the parity of number of non-zero coefficients in the first video block is even, horizontal and vertical identity transform is applied to the first video block.
33. The method of solution 27, when the parity of number of non-zero coefficients in the first video block is even, horizontal and vertical identity transform is not applied to the first video block.
34. The method of solution 33, DCT-2 is applied to the first video block.
35. The method of solution 32, further including in response that the one or more syntax fields indications implicit determination of transform skip mode is disabled, horizontal and vertical identity transform is not applied to the first video block.
36. The method of solution 32, wherein DCT-2 is applied to the first video block.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., items 9, 10).
37. A method of video processing, comprising: making a first determination regarding whether use of an identity transform is enabled for a conversion between a video block of a video and a coded representation of the video; making a second determination regarding whether a zero-out operation is enabled during the conversion; and performing the conversion based on the first determination and the second determination.
38. The method of solution 37, wherein one or more syntax fields at a first level in the coded representation are indicative of the first determination.
39. The method of any of solutions 37-38, wherein one or more syntax fields at a second level in the coded representation are indicative of the second determination.
40. The method of any of solutions 38-39, wherein the first level and the second level correspond to a header field at sequence or picture level or a parameter set at a sequence level or a picture level or an adaptation parameter set.
41. The method of any of solutions 37-40, wherein the conversion uses either the identify transform or the zero-out operation but not both.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., items 12 and 13).
42. A video processing method, comprising: performing a conversion between a video block of a video and a coded representation of the video; wherein the video block is represented in the coded representation as a coded block, wherein non-zero coefficients of the coded block are restricted to be within one or more sub-regions; and wherein an identity transform is applied for generating the coded block.
43. The method of solution 1, wherein the one or more sub-regions comprises a top-right sub-region of the video block having a dimension K×L, where K and L are integers, and K is min(T1, W) and L is min(T2, H) wherein W and H are width and height of the video block, respectively and T1 and T2 are thresholds.
44. The method of any of solutions 42-43, wherein the coded representation indicates the one or more sub-regions.
The following solutions show example embodiments of techniques discussed in the previous section (e.g., items 16 and 17).
45. The method of any of solutions 1-44, wherein the video region comprises a video coding unit.
46. The method of solutions 1-45, wherein the video region is a prediction unit or a transform unit.
47. The method of any of solutions 1-46, wherein the video block meets a certain dimension condition.
48. The method of any of solutions 1-47, wherein the video block is coded using a pre-specified quantization parameter range.
49. The method of any of solutions 1-48, wherein the video region comprises a video picture.
50. The method of any of solutions 1 to 49, wherein the conversion comprises encoding the video into the coded representation.
51. The method of any of solutions 1 to 49, wherein the conversion comprises decoding the coded representation to generate pixel values of the video.
52. A video decoding apparatus comprising a processor configured to implement a method recited in one or more of solutions 1 to 51.
53. A video encoding apparatus comprising a processor configured to implement a method recited in one or more of solutions 1 to 51.
54. A computer program product having computer code stored thereon, the code, when executed by a processor, causes the processor to implement a method recited in any of solutions 1 to 51.
55. A method, apparatus or system described in the present document.
In some embodiments, the identity transform mode comprises a transform skip mode. In the transform skip mode, a residual of a prediction error between the current video block and a reference video block is represented in the bitstream without applying a transformation. In some embodiments, the transform skip mode comprises a horizontal transform mode and/or a vertical transform mode in response to the transform skip mode being applied for the conversion of the current video block.
In some embodiments, determining the usage of the identity transform mode comprises an implicit determination of an identity transform. In some embodiments, the one or more representative blocks belong to a same color component. In some embodiments, the color component comprises a luma component. In some embodiments, the one or more representative blocks belong to different color components. In some embodiments, the video block belongs to a luma component of the video, and the one or more representative blocks belong to a chroma component of the video. In some embodiments, the one or more representative blocks and the video block are in a same coding unit. In some embodiments, the one or more representative blocks are positioned at collocated locations of a picture of the video block.
In some embodiments, the one or more representative blocks include the current video block, and the usage of the identity transform mode on the current video block is based on representative coefficients associated with the current video block. In some embodiments, the usage of the identity transform mode for the current video block is based on representative coefficients of the one or more representative blocks in which at least one representative block is not identical to the video block. In some embodiments, the one or more representative blocks include the current video block. In some embodiments, the one or more representative blocks include a neighboring block of the current video block. In some embodiments, the one or more representative blocks include at least N blocks that satisfy a condition with respect to the video block, where N is an integer greater than 1. In some embodiments, the condition is satisfied in case the at least N blocks are coded using a same prediction mode as the video block. In some embodiments, the condition is satisfied in case the at least N blocks have a same dimension as the video block. In some embodiments, the representative coefficients used for determining the usage of the identity transform mode for the current video block include decoded coefficients.
In some embodiments, the representative coefficients only include non-zero coefficients. In some embodiments, the non-zero coefficients are denoted as significant coefficients. In some embodiments, the representative coefficients are modified before being used to determine the usage of the identity transform mode for the current video block. In some embodiments, at least one of the representative coefficients is modified based on (1) clipping the at least one of the representative coefficients, (2) scaling the at least one of the representative coefficients, (3) adding an offset to the at least one of the representative coefficients, (4) filtering the at least one of the representative coefficients, or (5) mapping the at least one of the representative coefficients to another value.
In some embodiments, the representative coefficients include all the non-zero coefficients in the one or more representative blocks. In some embodiments, the representative coefficients include part of the non-zero coefficients in the one or more representative blocks. In some embodiments, the representative coefficients include even non-zero coefficients in the one or more representative blocks. In some embodiments, the representative coefficients include odd non-zero coefficients in the one or more representative blocks. In some embodiments, the representative coefficients include part of the non-zero coefficients whose absolute values are greater than or equal to a threshold. In some embodiments, the representative coefficients include part of the non-zero coefficients whose absolute values are smaller than or equal to a threshold. In some embodiments, the representative coefficients include first or last K of the non-zero coefficients in a decoding order, where K is greater than or equal to 1. In some embodiments, the representative coefficients include coefficients at a predefined location in the one or more representative blocks. In some embodiments, the representative coefficients include only one coefficient located at position (xPos, yPos) relative to a representative block, where xPos and yPos satisfy a condition. In some embodiments, the condition specifies that xPos is smaller than or equal to a first threshold. In some embodiments, the condition specifies that yPos is greater than a second threshold. In some embodiments, xPos=0 and yPos=0. In some embodiments, the position (xPos, yPos) is based on a dimension of the video block. In some embodiments, the representative coefficients include coefficients before a last non-zero coefficient. In some embodiments, the representative coefficients include coefficients before a last non-zero coefficient and the last non-zero coefficient.
In some embodiments, the representative coefficients include both zero coefficients and non-zero coefficients. In some embodiments, the representative coefficients are derived based on modifying decoded coefficients. In some embodiments, the representative coefficients comprise representative coefficients associated with a luma component of the current video block. In some embodiments, the usage of the identity transform mode for the current video block is only applied to the luma component of the current video block. In some embodiments, discrete cosine transform 2 (DCT-2) is applied to one or more chroma components of the current video block. In some embodiments, the usage of the identity transform mode for the current video block is applied to all color components of the current video block.
In some embodiments, the usage of the identity transform mode for the current video block is determined based on a function of the representative coefficients that outputs a value V. In some embodiments, the value V is derived based on a number of the representative coefficients. In some embodiments, the value V is derived based on a number of the representative coefficients whose levels are event numbers. In some embodiments, the value V is derived based on (1) a sum of levels of the representative coefficients, (2) one level of a representative coefficient, or (3) a number of the representative coefficients whose levels are odd numbers. In some embodiments, the function of the representative coefficients defines residual energy distribution. In some embodiments, the function returns a ratio of (1) a sum of absolute values of part of the representative coefficients to (2) an absolute value of all of the representative coefficients. In some embodiments, the function returns a ratio of (1) a sum of square of absolute values of part of the representative coefficients to (2) a sum of square of absolute values of all of the representative coefficients. In some embodiments, the value V is determined based on whether at least on representative coefficient is located outside of a subregion of a representative block. In some embodiments, the usage of the identity transform mode for the current video block is based on a parity of the value V. In some embodiments, the identity transform mode is used in case the value V is an even value, and the identity transform mode is not used in case the value V is an odd value. In some embodiments, the identity transform mode is used in case the value V is smaller than a first threshold, and the identity transform mode is not used in case the value V is greater than a second threshold. In some embodiments, the identity transform mode is used in case the value V is smaller than a third threshold, and the identity transform mode is not used in case the value V is greater than a fourth threshold.
In some embodiments, the usage of the identity transform mode is further based on coding information of the current video block. In some embodiments, the coding information comprises at least one of a prediction mode, a slice type, a picture type, block dimension, a flag at a sequence level indicating whether the identity transform mode is enabled, or a flag at a picture header indicating whether the identity transform mode is enabled. In some embodiments, the coding information comprises information about a coding mode of the current video block. In some embodiments, the coding information comprises information of a scan region that is a smallest rectangular area covering all of the representative coefficients. In some embodiments, a default transform is used in case a dimension of the scan region is larger than a threshold. In some embodiments, the dimension comprises a width, a height, or a size that is equal to the width multiplied by the height.
In some embodiments, whether the rule is applicable to the current video block is based on a coding characteristic of the current video block. In some embodiments, the coding characteristic of the current video block comprises a coding mode of the block, the coding mode comprising at least an intra-block-copy coding mode or an intra coding mode. In some embodiments, the coding characteristic of the current video block comprises a constraint on coefficients of the block. In some embodiments, the constraint is satisfied in case all coefficients of a rectangular area of the current video block are zero. In some embodiments, the constraint is satisfied in case a last non-zero coefficient is smaller or equal to threshold. In some embodiments, the coding characteristic of the current video block comprises a dimension of the coding block.
In some embodiments, the identity transform mode comprises a transform skip mode. In the transform skip mode, a residual of a prediction error between the current video block and a reference video block is represented in the bitstream without applying a transformation. In some embodiments, the default transform comprises discrete cosine transform 2 (DCT-2) or discrete sine transform 7 (DST-7). In some embodiments, the default transform is selected from multiple default transform candidates. In some embodiments, whether the determining is applicable is indicated at a video region level. In some embodiments, the video region comprises a sequence, a picture, a slice, a tile group, or a tile. In some embodiments, whether the determining is applicable to the video block is indicated in a sequence header, a picture header, a sequence parameter set, a video parameter set, a decoder parameter set, a picture parameter set, an adaptation parameter set, a slice header, or a tile group header.
In some embodiments, one or more syntax elements are used to indicate whether the determining is applicable to the video block. In some embodiments, a first syntax element is used in the video region level for blocks that are coded in an intra-block-copy coding mode. In some embodiments, a second syntax element is used in the video region level for blocks that are coded in an intra coding mode. In some embodiments, a second syntax element is used in the video region level for blocks that are coded in an inter coding mode. In some embodiments, a second syntax element is used in the video region level for blocks that are coded in an intra coding mode and blocks that are coded in an inter coding mode. In some embodiments, a second syntax element is used in the video region level for blocks that are coded in an intra-block-copy coding mode and blocks that are coded in an inter coding mode.
In some embodiments, in case an identity transform is used for a block that is coded using an intra-block-copy coding mode or an intra coding mode, the transform-skip mode is applied to the block. In some embodiments, in case an identify transform is disable for the block, DCT-2 or DST-7 is determined for the conversion.
In some embodiments, the video region comprises a sequence, a picture, a slice, a tile group, or a tile. In some embodiments, the video region level comprises a sequence header, a picture header, a sequence parameter set, a video parameter set, a decoder parameter set, a picture parameter set, an adaptation parameter set, a slice header, or a tile group header. In some embodiments, only identity transforms are allowed in case the zero-out operation is enabled, and only non-identity transforms are allowed in case the zero-out operation is disabled. In some embodiments, information for scan region based coefficient coding tool is based on the indication.
In some embodiments, the conversion is performed according to a second rule specifying whether a transform type for the video block, where the transform type excludes the identify transform. In some embodiments, the rule is defined as a residual energy distribution rule, and the second rule is defined as a parity of the representative coefficients.
In some embodiments, a determination of a transform matrix is made at a coding unit level, a coding block level, or a transform unit level. In some embodiments, the determination is made at the coding unit level in case all transform units share a same transform matrix. In some embodiments, whether the determination is made at the coding unit level or the transform unit level is based on coding information of the video block.
In some embodiments, applicability of one of the above methods is based on coding information of the current video block. In some embodiments, the coding information comprises a dimension of the video block. In some embodiments, the method is applicable in case a width and/or a height of the current video block is smaller than or equal to a threshold. In some embodiments, the method is applicable in case a width and/or a height of the current video block is smaller than a threshold. In some embodiments, the threshold is equal to 32. In some embodiments, the coding information comprises partitioning method applied to the current video block. In some embodiments, the partitioning method includes a single tree and/or a dual tree. In some embodiments, the coding information comprises a coding mode of the video block. In some embodiments, the coding mode includes an inter prediction mode, an intra prediction mode or an intra block copy prediction mode. In some embodiments, the coding information comprises a quantization parameter, a picture or a slice type, a coding method, a color component, an intra-prediction mode, or motion information associated with the video block. In some embodiments, the coding information comprises a profile, a level, or a tier of a video coding standard.
In some embodiments, the identity transform mode comprises a transform skip mode. In the transform skip mode, a residual of a prediction error between the current video block and a reference video block is represented in the bitstream without applying a transformation. In some embodiments, the current video block is a prediction residual block.
In some embodiments, during the zero-out operation, the sub-region is set to a top-right region of size K×L. K is equal to min(T1, 2) and L is equal to min (T2, H), W represents a width of the video block, H represents a height of the video block, and T1 and T2 represent two thresholds. In some embodiments, T1 is equal to 16 or 32, and T2 is equal to 16 or 32.
In some embodiments, a last non-zero coefficient of the current video block is located within the sub-region. In some embodiments, a bottom-right position denoted as (SRx, SRy) used in a scan region based coefficient coding tool is located within the sub-region.
In some embodiments, the zero-out type comprises a first type of a video block that includes a top-left subregion of size K0×L0. In some embodiments, the zero-out type comprises a second type of a video block that includes a top-right subregion of size K1×L1. In some embodiments, the zero-out type comprises a third type of a video block that includes a bottom-left subregion of size K2×L2. In some embodiments, the zero-out type comprises a fourth type of a video block that includes a bottom-right subregion of size K3×L3. In some embodiments, a position of the sub-region is indicated in the bitstream. In some embodiments, the zero-out type of the video block is determined during the conversion.
In some embodiments, the transform matrix comprises discrete sine transform 7 (DST7), discrete cosine transform 2 (DCT2), or discrete cosine transform 8 (DCT8). In some embodiments, a transform-skip mode is used in the video block.
In some embodiments, the conversion comprises encoding the video into the bitstream. In some embodiments, the conversion comprises decoding the bitstream to generate the video.
In the present document, the term “video processing” may refer to video encoding, video decoding, video compression or video decompression. For example, video compression algorithms may be applied during conversion from pixel representation of a video to a corresponding bitstream representation or vice versa. The bitstream representation of a current video block may, for example, correspond to bits that are either co-located or spread in different places within the bitstream, as is defined by the syntax. For example, a macroblock may be encoded in terms of transformed and coded error residual values and also using bits in headers and other fields in the bitstream. Furthermore, during conversion, a decoder may parse a bitstream with the knowledge that some fields may be present, or absent, based on the determination, as is described in the above solutions. Similarly, an encoder may determine that certain syntax fields are or are not to be included and generate the coded representation accordingly by including or excluding the syntax fields from the coded representation.
The disclosed and other solutions, examples, embodiments, modules and the functional operations described in this document can be implemented in digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this document and their structural equivalents, or in combinations of one or more of them. The disclosed and other embodiments can be implemented as one or more computer program products, e.g., one or more modules of computer program instructions encoded on a computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more them. The term “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them. A propagated signal is an artificially generated signal, e.g., a machine-generated electrical, optical, or electromagnetic signal, that is generated to encode information for transmission to suitable receiver apparatus.
A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.
The processes and logic flows described in this document can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., a field programmable gate array (FPGA) or an application specific integrated circuit (ASIC).
Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random-access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of non-volatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., erasable programmable read-only memory (EPROM), electrically erasable programmable read-only memory (EEPROM), and flash memory devices; magnetic disks, e.g., internal hard disks or removable disks; magneto optical disks; and compact disc, read-only memory (CD ROM) and digital versatile disc read-only memory (DVD-ROM) disks. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
While this patent document contains many specifics, these should not be construed as limitations on the scope of any subject matter or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of particular techniques. Certain features that are described in this patent document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described in this patent document should not be understood as requiring such separation in all embodiments.
Only a few implementations and examples are described and other implementations, enhancements and variations can be made based on what is described and illustrated in this patent document.
Number | Date | Country | Kind |
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PCT/CN2020/078334 | Mar 2020 | CN | national |
This application is a continuation of International Application No. PCT/CN2021/079495, filed on Mar. 8, 2021, which claims the priority to and benefits of International Patent Application No. PCT/CN2020/078334, filed on Mar. 7, 2020. All the aforementioned patent applications are hereby incorporated by reference in their entireties.
Number | Date | Country | |
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Parent | PCT/CN2021/079495 | Mar 2021 | US |
Child | 17939717 | US |