In-plane switching mode liquid crystal display and fabrication method thereof

Abstract

An in-plane switching (IPS) mode liquid crystal display (LCD) includes: a plurality of gate lines and data lines arranged vertically and horizontally to define a plurality of pixel regions on a first substrate; thin film transistors (TFTs) at each crossing of the gate and data lines and including an active layer, a source electrode and a drain electrode, respectively; a common electrode line substantially parallel to the gate lines; a plurality of first pixel electrodes and first common electrodes and a plurality of second pixel electrodes and second common electrodes having a tilt angle with respect to the gate lines and alternately disposed on upper and lower portions of the pixel regions to generate an in-plane electric field; and a second substrate attached with the first substrate.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

The accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.

In the drawings:

FIG. 1 is an exploded perspective view showing a related art liquid crystal display (LCD);

FIG. 2 is a plan view showing a portion of an array substrate according to a first embodiment of the present invention;

FIG. 3 is a sectional view taken along line IIa-IIa′ of the array substrate of FIG. 2;

FIG. 4 is sectional view taken along line IIb-IIb′ of the array substrate of FIG. 2;

FIG. 5 is a plan view showing a portion of an array substrate according to a second embodiment of the present invention;

FIG. 6 is an enlarged view of a portion ‘A’ of the array substrate of FIG. 5;

FIG. 7 is a plan view showing a portion of an array substrate according to a third embodiment of the present invention; and

FIG. 8 is a plan view showing a portion of an array substrate according to a fourth embodiment of the present invention.

Claims

1. An in-plane switching (IPS) mode liquid crystal display (LCD) device comprising: a plurality of gate lines and a plurality of data lines arranged vertically and horizontally to define a plurality of pixel regions on a first substrate;thin film transistors (TFTs) at each crossing of the gate lines and the data lines and including an active layer, a source electrode and a drain electrode, respectively;a common electrode line arranged substantially parallel to the gate lines;a plurality of first pixel electrodes and first common electrodes and a plurality of second pixel electrodes and second common electrodes having a tilt angle with respect to the gate lines and arranged in an alternating pattern on upper and lower portions of the pixel regions to generate an in-plane electric field; anda second substrate attached with the first substrate.

2. The device of claim 1, further comprising: a pixel electrode line electrically connected with the drain electrode via a first contact hole; anda common electrode pattern electrically connected with the common electrode line via a second contact hole.

3. The device of claim 1, wherein the first and second common electrodes and the first and second pixel electrodes are made of a transparent conductive material of indium-tin-oxide (ITO) or indium-zinc-oxide (IZO).

4. The device of claim 1, wherein the first pixel electrode and the first common electrode and the second pixel electrode and the second common electrode are sloped in different directions at upper and lower portions of the pixel region, and wherein the different directions divide the pixel region into two domains of the upper and lower portions.

5. The device of claim 2, further comprising: a first connection line connecting the pixel electrode line and the first and second pixel electrodes; anda second connection line connecting the common electrode line and the first and second common electrodes.

6. The device of claim 1, wherein the common electrode line is disposed at upper and lower portions of the pixel region and the upper and lower common electrode lines are connected by a branch substantially parallel to the data lines.

7. The device of claim 6, wherein the branch includes a protrusion that protrudes toward the first or second common electrodes and the protrusion of the branch overlaps with an end portion of the first or second common electrodes.

8. The device of claim 1, wherein the first and second common electrodes each extend in a different direction, and the first and second pixel electrodes each extend in different directions.

9. The device of claim 8, further comprising: a pixel electrode line electrically connected with the drain electrode line via the first contact hole.

10. The device of claim 8, wherein the common electrode line comprises a first common electrode line electrically connected with the first common electrode via the second contact hole and a second common electrode line electrically connected with the second common electrode via a third contact hole.

11. The device of claim 10, further comprising: first connection lines at left and right portions of the pixel region, the first connection lines connecting the pixel electrode line and the first and second pixel electrodes; andsecond connection lines formed at the left and right portions of the pixel region, the second connection lines connecting the first common electrode line and the first common electrode and the second common electrode line and the second common electrode.

12. The device of claim 8, wherein the common electrode line is arranged at upper and lower portions of the pixel region, and are connected by a branch disposed substantially parallel to the data lines.

13. The device of claim 12, wherein the branch includes a protrusion protruding toward the first or second common electrodes and the protrusion of the branch overlaps with an end portion of the first or second common electrodes, wherein the overlap between the branch and the first or second common electrodes is divided to left and right directions with respect to the upper and lower portions of the pixel region.

14. The device of claim 10, further comprising: a first branch disposed to be substantially parallel to the data lines and connected with the first common electrode line; anda second branch disposed to be substantially parallel to the data lines and connected with the second common electrode line.

15. The device of claim 14, wherein the first branch includes a first protrusion protruding toward the first common electrode and the first protrusion of the first branch overlaps with an end portion of the first common electrode.

16. The device of claim 14, wherein the second branch includes a second protrusion protruding toward the second common electrode and the second protrusion of the second branch overlaps with an end portion of the second common electrode.

17. A method for fabricating an in-plane switching (IPS) mode liquid crystal (LCD) device comprising: forming a plurality of gate lines and data lines vertically and horizontally to define a plurality of pixel regions on a first substrate;forming thin film transistors (TFTs) having an active layer and source and drain electrodes at each crossing of the gate lines and the data lines;forming a common electrode line substantially parallel to the gate lines;forming a plurality of first pixel electrodes and first common electrodes and a plurality of second pixel electrodes and second common electrodes having a tilt angle with respect to the gate lines and arranged in an alternating pattern on upper and lower portions of the pixel regions to generate an in-plane electric field; andattaching the first and second substrates together.

18. The method of claim 17, wherein the first and second common electrodes each extend in different directions, and the first and second pixel electrodes each extend in different directions.

19. The method of claim 17 or 18, further comprising: forming a pixel electrode line electrically connected with the drain electrode line via the first contact hole.

20. The method of claim 17, further comprising forming a common electrode pattern electrically connected with the common electrode line via a second contact hole.

21. The method of claim 18, wherein the common electrode line includes a first common electrode line electrically connected with the first common electrode via the second contact hole and a second common electrode line electrically connected with the second common electrode via a third contact hole.

22. The method of claim 19, further comprising forming a first connecting line that connects the pixel electrode line and the first and second pixel electrodes and a second connection line that connects the common electrode line and the first and second common electrodes.

23. The method of claim 18, further comprising: forming first connection lines at left and right portions of the pixel region and connecting the pixel electrode line and the first and second pixel electrodes; andforming second connection lines positioned at left and right portions of the pixel region and connecting the first common electrode line and the first common electrode and the second common electrode line and the second common electrode.

24. The method of claim 17 or 18, wherein the common electrode line is formed at upper and lower portions of the pixel region.

25. The method of claim 24, further comprising: forming a branch substantially parallel to the data lines and connecting the upper and lower common electrode lines.

26. The method of claim 25, wherein the branch includes a protrusion protruding toward the first or second common electrode and the protrusion of the branch overlaps with an end portion of the first or second common electrodes, wherein the overlap between the branch and the first or second common electrodes occurs in an area left and right with respect to the upper and lower portions of the pixel region.

27. The method of claim 25, further comprising: forming a first branch substantially parallel to the data lines and connected with the first common electrode line; andforming a second branch substantially parallel to the data lines and connected with the second common electrode line.

28. The method of claim 27, wherein the first branch comprises a first protrusion protruding toward the first common electrode and the first protrusion of the first branch overlaps with an end portion of the first common electrode.

29. The method of claim 27, wherein the second branch comprises a second protrusion protruding toward the second common electrode and the second protrusion of the second branch overlaps with an end portion of the second common electrode.