Information processing apparatus and information processing method

Abstract

According to one embodiment, there is provided an information processing apparatus that includes a frame buffer to store graphics data, a control section to perform control to alternately store in a plurality of buffers data of even-numbered lines and data of odd-numbered lines in picture data based on a progressive mode and to perform control to stop and restart supply of data, thereby generating pulled-down picture data, and a field assembling processing section to execute field assembling processing of graphics data having a resolution appropriate for an image size of the frame buffer based on the picture data generated by the control section.

Description

BRIEF DESCRIPTION OF THE SEVERAL VIEWS OF THE DRAWINGS

A general architecture that implements the various feature of the invention will now be described with reference to the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the invention and not to limit the scope of the invention.

FIG. 1 is an exemplary block diagram showing a structure of a reproduction apparatus according to an embodiment of the invention;

FIG. 2 is an exemplary view showing a structure of a player application used in the reproduction apparatus depicted in FIG. 1;

FIG. 3 is an exemplary view explaining a functional structure of a software decoder realized by the player application depicted in FIG. 2;

FIG. 4 is an exemplary view explaining blend processing executed by a blend processing section provided in the reproduction apparatus depicted in FIG. 1;

FIG. 5 is an exemplary view explaining blend processing executed by a GPU provided in the reproduction apparatus depicted in FIG. 1;

FIG. 6 is an exemplary view showing how sub video data is superimposed on main video data and displayed in the reproduction apparatus depicted in FIG. 1;

FIG. 7 is an exemplary view showing how main video data is displayed in a partial region on sub video data in the reproduction apparatus depicted in FIG. 1;

FIG. 8 is an exemplary conceptual view showing a procedure of superimposing each of a plurality of sets of image data in AV contents based on an HD standard in the reproduction apparatus depicted in FIG. 1;

FIG. 9 is an exemplary block diagram showing constituent parts concerning control which realizes reproduction of a picture quality comparable to that of a commercial-off-the-shelf device by using a function of the GPU;

FIG. 10 is an exemplary view explaining a double buffer mode using frame buffers;

FIG. 11 is an exemplary view explaining a structure of data stored in one frame buffer;

FIG. 12 is an exemplary view explaining a method of writing data depicted in FIG. 11 as a data for an interlace mode;

FIG. 13 is an exemplary view explaining processing realized by a field composer;

FIG. 14 is an exemplary view showing an example of an internal structure of a scaling processing section depicted in FIG. 13;

FIG. 15 is an exemplary view explaining a procedure of controlling buffers by an S/W decoder depicted in FIG. 13;

FIG. 16 is an exemplary view showing how a progressive image is pulldown-converted into an interlace image by control depicted in FIG. 15; and

FIG. 17 is an exemplary view showing an example of a specific technique in scaling processing.

Claims

1. An information processing apparatus comprising: a frame buffer to store graphics data;a control section to perform control to alternately store in a plurality of buffers data of even-numbered lines and data of odd-numbered lines in picture data based on a progressive mode and to perform control to stop and restart supply of data, thereby generating pulled-down picture data; anda field assembling processing section to execute field assembling processing of graphics data having a resolution appropriate for an image size of the frame buffer based on the picture data generated by the control section.

2. The apparatus according to claim 1, further comprising a scaling processing section to perform scaling processing of increasing a resolution of image data generated by the control section as pre-processing of the field assembling processing by the field assembling processing section.

3. The apparatus according to claim 1, wherein the field assembling processing section forms graphics data appropriate for picture reproduction in an interlace mode.

4. The apparatus according to claim 1, wherein the control section is realized by a decoder of software.

5. The apparatus according to claim 1, wherein the frame buffer stores graphics data appropriate for picture reproduction in the interlace mode.

6. The apparatus according to claim 1, wherein the frame buffer is configured to store both graphics data appropriate for picture reproduction in the interlace mode and graphics data appropriate for picture reproduction in the progressive mode.

7. An information processing method comprising: performing control to alternately store in a plurality of buffers data of even-numbered lines and data of odd-numbered lines in picture data based on a progressive mode and performing control to stop and restart supply of data, thereby generating pulled-down picture data; andeffecting field assembling processing of graphics data having a resolution appropriate for an image size of a frame buffer configured to store the graphics data based on the generated picture data.

8. The method according to claim 7, further comprising executing scaling processing of increasing a resolution of the generated image data as pre-processing of the field assembling processing.

9. The method according to claim 7, wherein the field assembling processing includes forming graphics data appropriate for picture reproduction in an interlace mode.

10. The information processing method according to claim 7, wherein the control is realized by a decoder of software.