BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a block diagram showing an example of a configuration of an information processing system according to an embodiment of the present invention;
FIG. 2 is a diagrammatic view illustrating an example of a communication schedule used in the information processing system of FIG. 1;
FIGS. 3, 4, and 5 are block diagrams showing different examples of a configuration of the information processing system according to an embodiment of the present invention;
FIG. 6 is a block diagram showing an example of a functional configuration of a data communication apparatus of the information processing system of FIG. 1;
FIG. 7 is a block diagram showing an example of a detailed functional configuration of the data communication apparatus of FIG. 6;
FIGS. 8 to 13 are diagrammatic views showing different examples of a structure of a timing packet used in the data communication apparatus of FIG. 6;
FIG. 14 is a flow chart illustrating an example of a timing packet transmission process from within a process executed by the data communication apparatus of FIG. 7;
FIG. 15 is a flow chart illustrating an example of a timing packet reception process from within the process executed by the data communication apparatus of FIG. 7;
FIGS. 16 to 18 are block diagrams showing further different examples of the configuration of the information processing system according to an embodiment of the present invention;
FIG. 19 is a block diagram showing an example of a functional configuration of a time synchronizing information transmission apparatus of the information processing system of FIG. 17 or 18;
FIG. 20 is a block diagram showing an example of a hardware configuration of the entirety or part of an information processing apparatus according to an embodiment of the present invention; and
FIG. 21 is a block diagram showing an example of a detailed hardware configuration of a communication section of the information processing apparatus of FIG. 20.