Claims
- 1. A video capture operatively connected to a bus which is coupled to a processor, a main memory and a video RAM coupled to a display device and, which executes a data transfer between the video capture and the processor, the video capture comprising:an input terminal which receives video data representing a plurality of frames from an external device to be displayed by the display device; and a controller which is capable of outputting a part of the video data in a color format to the bus for storing the part of the video data in the main memory and which is capable of outputting another part of the video data in another color format being different from the color format to the bus for displaying the other part of video data by the display device.
- 2. A video capture according to claim 1, wherein the color format is a YUV format, and wherein the other color format is a RGB format.
- 3. A video capture according to claim 1, wherein the part of the video data is either one of odd field data or even field data, and wherein the other part of video data is another of the odd field data or even field data.
- 4. A video capture according to claim 1, wherein the video capture further comprises a scaling unit which scales the part of the video data and the other part of the video data independently.
- 5. A video capture according to claim 2, wherein the video capture further comprises a scaling unit which scales the part of the video data and the other part of the video data independently.
- 6. A video capture according to claim 1, wherein the controller executes a direct memory access transfer.
- 7. A video capture according to claim 1, wherein the part of the video data is compressed data, and the other part of the video data is uncompressed data.
- 8. A video capture according to claim 7, wherein the compressed data is MPEG data.
Parent Case Info
This is a continuation of U.S. patent application Ser. No. 09/260,498, filed Mar. 2, 1999 now U.S. Pat. No. 6,094,521; which is a continuation of U.S. patent application Ser. No. 08/750,826 Dec. 13, 1996 which issued as U.S. Pat. No. 5,899,575 which is a 371 of PCT/JP96/02499 filed Sep. 4, 1996.
US Referenced Citations (6)
Foreign Referenced Citations (3)
Number |
Date |
Country |
5-344495 |
Dec 1993 |
JP |
6-133305 |
May 1994 |
JP |
6-162116 |
Jun 1994 |
JP |
Non-Patent Literature Citations (5)
Entry |
Illustrated Up-to-date MPEG Textbook, pp. 28-29, Multimedia Communications Research Group, ASCI Corp. |
Illustrated Up-to-date MPEG Textbook, pp. 89-165, Multimedia Communications Research Group, ASCI Corp. |
Interface, pp. 102-109, Apr. 1996, CQ Publishing Co. |
“Enhanced PCI Bus Multimedia Controller” Zoran, ZR36057 (Data Sheets), 08/96. |
“JPEG Image Compression Processor” Zoran, ZR36050 (Data Sheets), 08/96. |
Continuations (2)
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Number |
Date |
Country |
Parent |
09/260498 |
Mar 1999 |
US |
Child |
09/526739 |
|
US |
Parent |
08/750826 |
|
US |
Child |
09/260498 |
|
US |