Integrated active integrator filter with compensated unity gain bandwidth

Abstract

An active RC integrator filter with finite operational amplifier bandwidth can be compensated by biasing the operational amplifier input stage such that its transconductance becomes a function of the resistance. Thereafter, by inserting another resistance of the same material in series with the integrating capacitor, a zero results in the overall transfer function of the filter according to the present invention. In this manner, the passband peaking of the active RC integrator filter resulting from the integrator phase shift can be avoided.

Description

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to integrated active RC or MOSFET-Channel filters using operational amplifiers. More particularly, the present invention relates to a process independent technique which allows for gain bandwidth product of the operational amplifier to track the resistance and capacitance values.

2. Description of the Related Art

Filter designs in consumer wireless applications come in a few different forms, dependent on frequency. For instance, SAW, dielectric ceramic, and crystal filters are the most commonly used nonlumped element filters. In modern digital communications, the accuracy of the filter frequency characteristics is frequently a prolific source of product failures due to the more stringent requirements placed on their performance.

The most common cause of severe performance degradation that can be attributable to filter performance in digital communication systems is the passband frequency drift with respect to the center frequency of the filter. The passband frequency inaccuracy is usually due to the component production tolerance and thermal characteristics. Most of the digital modulation techniques are sensitive to bandlimiting phenomena. In addition, passband drifting also impairs the group delay budget for the modulation.

Elliptic filters offer the most efficiency in terms of rejection versus filter order. The problem with implementing elliptic filters is that they require precise matching of the phase response of a path comprised of two active integrators with a purely passive path which may be in the form of a feed forward capacitor. The phase errors of the active integrators move the zeros in the stop band portion of the transfer function of the filter which, in turn, causes excess peaking at the edge of the pass band.

Many communication systems, such as baseband IF processors in a cellular telephone, require the use of high order analog continuous time filters. These filters are often integrated as ladder structures which mimic the low pass band sensitivity of RLC prototype passive ladder filters.

Monolithic continuous-time filters are often active RC circuits that include amplifiers, resistors, and capacitors in a feedback configuration. The frequency response of an RC active filter depends on coefficients that are products of absolute resistance and capacitance values, both of which can be subject to considerable random variation with monolithic processing. However, ratios of resistances and ratios of capacitors remain substantially constant with process variations; therefore, ratios of RC products also remain stable.

Active RC filters can provide useful performance up to a few megahertz, but are limited by the performance and bandwidth of amplifiers as well as the parasitic effects mentioned above. Moreover, the amplifiers consume power and limit the dynamic range.

FIG. 1 shows a conventional active RC integrator filter with an operational amplifier 101, a feedback capacitor C.sub.1, an input parasitic capacitance C.sub.in, an input capacitor C.sub.2 and resistor R. The operational amplifier 101 has a gain A(s) of -.omega..sub.u /s where .omega..sub.u is the unity gain frequency of the operational amplifier 101. The transfer characteristic of this active RC integrator filter is shown by the following expression. ##EQU1## Equation (1) can be simplified to the following expression. ##EQU2## Which can be alternatively expressed as the following. ##EQU3## A reasonable assumption for practical applications is that the integrator unity gain frequency bandwidth will be much smaller than the operational amplifier unity gain bandwidth. Therefore, equation (3) can be simplified to the following expression: ##EQU4## If the input capacitor C.sub.2 of the filter is zero, thereby displaying low pass filter characteristics, it can be shown from the above equation (4) that a non-dominant pole .omega..sub.non-dominant is located at a frequency defined by the following expression: ##EQU5##

FIG. 2 shows a bode plot of the transfer function for the active RC filter shown in FIG. 1 displaying low pass characteristics, i.e., where capacitor C.sub.2 is zero. It can be seen from FIG. 2 that the active RC integrator filter has the unity gain product 1/RC.sub.1 at frequency f1 and the first non-dominant pole 202 at frequency f2.

FIG. 3 illustrates passband peaking of the conventional active RC integrator filter as shown in FIG. 1. The ideal filter characteristic 301 illustrates the effect of a transfer function zero located at an ideal zero frequency 303. By contrast, an actual conventional active RC integrator filter characteristic shows the passband peaking at a peaking frequency 305 whose transfer function zero is located at zero frequency 304. From FIG. 3, it can be seen that the zero frequency of a conventional filter 304 is shifted from ideal zero frequency 303. This is due to the phase shift of the operational amplifier in the integrator filter. In turn, due to the transfer function zero shifting from ideal frequency 303 to the conventional filter transfer function zero frequency 304, the conventional filter exhibits pass band edge peaking 305.

For example, in a code division multiple access (CDMA) baseband filter, the excess phase can be determined by the following expression. ##EQU6## With the CDMA baseband filter having the unity gain bandwidth 1/RC.sub.1 of 2.pi.*660 kHz, the gain bandwidth product .omega..sub.u at 2.pi.40 MHz, and the values of the feedback capacitance C.sub.1 and the input parasitic capacitance C.sub.in of 8 and 0.7 picoFarads (pF), respectively, the excess phase according to the above expression is 1.03.degree.. This excess phase, in turn, results in 2 dB of baseband edge peaking in an all pole ladder filter structure.

In ladder implementations of elliptic filters with resonant transmission zeros, the above result is worsened since the input capacitance C.sub.2 is finite, resulting in a zero. Using the same values for the unity gain bandwidth 1/RC.sub.1, input capacitance C.sub.2, feedback capacitance C.sub.1, and input parasitic capacitance C.sub.in, and the gain bandwidth product .omega..sub.u, the excess phase according to equation (6) is 1.5.degree.. This excess phase cause approximately 3 dB of baseband edge peaking in the elliptic CDMA filters.

The results above illustrate that even a single degree of excess phase for these filters as used in the communication channels, for example, in cellular phones, is sufficient to cause approximately 1 dB of peaking at the passband edge of the filter distorting the filter characteristics.

Therefore, there exists a need for filters generally, and, in particular, for continuous time applications, which can effectively cancel excess phase errors to minimize undesirable passband edge peaking.

SUMMARY OF THE INVENTION

The present invention illustrates an apparatus that uses a resistor in series with the integrating capacitor to create a zero in the integrator transfer function. The operational amplifier used in the integrator filter is designed such that its input stage transconductance is a function of another resistance that is made from the same material as the resistor used in series with the integrating capacitor. In this manner, both the operational amplifier unity gain bandwidth and the zero in the closed loop integrator filter transfer function track each other, and pole-zero cancellation is achieved which tracks process, voltage, and temperature variations in the filter transistors.

An integrated active integrator filter circuit according to one embodiment of the present invention includes an operational amplifier including an input node, an output node and a biasing node, a bias circuit including a first resistance coupled to said operational amplifier biasing node and configured to provide a bias signal; and a feedback circuit including a second resistance and a first capacitance serially coupled between said input and output nodes, wherein a ratio of said first and second resistances remains substantially constant over variations in operating conditions of said bias circuit.

These and other features and advantages of the present invention will be understood upon consideration of the following detailed description of the invention and the accompanying drawings.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates a conventional active RC integrator filter with an operational amplifier having a finite gain bandwidth product.

FIG. 2 illustrates the bode plot of the conventional active RC integrator filter of FIG. 1.

FIG. 3 illustrates the passband edge peaking of the conventional active RC integrator filter of FIG. 1.

FIG. 4 illustrates a conventional bias circuit biasing an operational amplifier.

FIG. 5 illustrates one embodiment of the filter according to the present invention.

FIG. 6 illustrates a bode plot which shows the effect at the passband edge of the zero insertion in the transfer function of the active RC filter of FIG. 5.

DESCRIPTION OF THE PREFERRED EMBODIMENT

An operational amplifier which has a transconductance gm proportional to a resistance is known, J. Steininger, "Understanding Wide-band MOS Transistors", IEEE, Circuits and Devices, May, 1990. The bias circuit disclosed in Steininger produces a current which sets the transconductance gm of a matched transistor to be inversely proportional to the bias resistance coupled to the transistors in the bias circuit.

Referring to FIG. 4, a conventional bias circuit 410 biasing an operational amplifier 420 is shown. Transistors M.sub.4 and M.sub.6 form a gain loop such that with the two transistors M.sub.3 and M.sub.4 being equal in size (i.e., matched at a ratio of 1:1), and where transistors M.sub.1 and M.sub.2 are matched with a ratio of m:1 where m is greater than unity (for example, m is typically set at 4), the drain current I.sub.D1 of transistor M.sub.1 is equal to the drain current I.sub.D2 of transistor M.sub.2. It can be further shown that the drain currents I.sub.D1, I.sub.D2 of transistors M.sub.1 and M.sub.2 are equal according to the following expression. ##EQU7## Where V.sub.GS and V.sub.T are gate-to-source voltage and threshold voltage of the transistors M.sub.X. Furthermore, for MOSFETs in saturation, the transconductance gm, and in particular, of transistor M.sub.2 in this case, can be expressed as follows: ##EQU8##

Therefore, by coupling transistors M.sub.7, M.sub.8, and M.sub.9 of the operational amplifier 420 such that these transistors are related to transistor M.sub.2 of the bias circuit 410 through a size multiplier K (where K can be less than unity), the following expression for the transconductances of transistors M.sub.8 and M.sub.9 can be derived. ##EQU9## where gm.sub.8 and gm.sub.9 are transconductances of transistors M.sub.8 and M.sub.9 respectively of the operational amplifier 420, and where K provides a ratio between the size of the transistors M.sub.8 and M.sub.9, and M.sub.2.

Given the above relationship, the gain bandwidth product .omega..sub.u of the operational amplifier 420 can be expressed by the following expression. ##EQU10## Where C.sub.C is the compensation capacitance located inside the operational amplifier 501 (FIG. 5) which is coupled between the output node V.sub.OUT and the gate terminal of transistor M.sub.13 (FIG. 4). From the above expression, it can be seen from equation (10) that the gain bandwidth product .omega..sub.u of the operational amplifier 420 is dependent upon the resistance R.sub.BIAS of the bias circuit 410.

Referring to FIG. 5, an active RC integrator filter according to one embodiment of the present invention is shown. There is provided an operational amplifier 501, an integrating capacitor C.sub.1, an input capacitor C.sub.2, an input resistance R.sub.IN, an input parasitic capacitance C.sub.in, and a feedback resistor R.sub.Z. In addition, it is shown that the operational amplifier 501 is biased by a bias circuit 502 which has characteristics of the conventional bias circuit 410 of FIG. 4.

As shown in FIG. 5, the feedback resistor R.sub.Z is coupled in series with the integrating capacitor C.sub.1. This integrator filter then has a transfer function which can be expressed as follows. ##EQU11##

The non-dominant pole of the integrator filter of FIG. 5 due to the finite operational amplifier gain bandwidth product can be approximately cancelled if the following expression holds. ##EQU12##

Substituting equation (10) into equation (12), the following expression can be derived. ##EQU13## From equation (13), it can be seen that the bias resistance R.sub.BIAS of the bias circuit 410 (FIG. 4) and the feedback resistance R.sub.Z of the active RC filter are related in a ratio form. Since the bias resistance R.sub.BIAS and the feedback resistance R.sub.Z of the filter of the present invention are made from the same material, changes in the bias resistance R.sub.BIAS will be reflected in the feedback resistance R.sub.Z. Furthermore, as long as the ratio between the bias resistance R.sub.BIAS and the feedback resistance R.sub.Z satisfies the criteria of equation (13), the zero will cancel the non-dominant pole.

In the manner described above, a zero can be inserted into the transfer function of an integrator filter such that excess phase shifts resulting in a peak at the pass band edge can be avoided. Furthermore, since the active RC filter according to the present invention is in integrated form, the resistors used in the filter are constructed of the same material as any other resistors used by the overall filter architecture, for example, the bias resistance in the bias circuit used for driving the operational amplifier of the active RC filter.

FIG. 6 shows the passband characteristics of the filter according to the present invention as compared with that of the conventional filter 601. From this figure, it can be seen that the passband edge peaking of the conventional filter 601 is substantially reduced in the passband edge 602 of the filter according to the present invention. This reduction is attributed to the feedback resistance R.sub.Z added to the active RC filter which results in the insertion of a zero in the transfer characteristics of the filter. In addition, since the filter is biased in such a way that the feedback resistance R.sub.Z is made to track any operating conditions in the bias resistance such as change in temperature, process, or supply voltage, any of such variations in the operating conditions will be reflected in the filter and, therefore, in the feedback resistance R.sub.Z thereof.

As illustrated above, the finite operational gain bandwidth product results in excess phase at the integrator unity gain frequency. As shown, the present invention describes a technique which causes the operational amplifier gain bandwidth product to track a resistance and a capacitance. The resistor made from the same material (i.e., integrated) and inserted in series with the integrating capacitor creates a zero which cancels the excess phase of the integrator. The relationship of the two resistor values is such that process tracking is achieved. In one application, for example, the apparatus and technique according to the present invention allows the use of lower power op amps (low bandwidth) which require less current (e.g., advantageous in battery operated cellular phones).

Various other modifications and alternations in the structure and method of operations of this invention will be apparent to those skilled in he art without departing from the scope and spirit of the invention. Although the invention has been described in connection with specific preferred embodiments, it should be understood that the invention as claimed should not be unduly limited to such specific embodiments. It is intended that the following claims define the scope of the present invention and that structures and methods within the scope of these claims and their equivalents be covered thereby.

Claims

1. An integrated active integrator filter circuit, said circuit comprising:

an operational amplifier including an input node, an output node and a biasing node;

a bias circuit including a first resistaice coupled to said operational amplifier biasing node and configured to provide a bias signal; and

a feedback circuit including a second resistance and a first capacitance serially coupled between said input and output nodes;

wherein a ratio of said first and second resistances is selected to a predetermined value for cancelling a non-dominant pole of said filter.

2. The circuit of claim 1 wherein said bias circuit comprises a plurality of transistors such that magnitude of transconductance of at least one of said plurality of transistors is proportional to magnitude of said first resistance.

3. The circuit of claim 1 wherein said input node comprises an inverting input node and said operational amplifier further includes a non-inverting input node, and further wherein said non-inverting input node is coupled to a reference node.

4. The circuit of claim 1 further comprising a second capacitance and a third resistance coupled to said feedback circuit and said input node.

5. The circuit of claim 4, further comprising a third capacitance coupled between said input node and a reference node.

6. A method of providing an integrated active integrator filter circuit, said method comprising the steps of:

providing an operational amplifier including an input node, an output node and a biasing node,

providing a bias circuit including a first resistance coupled to said operational amplifier biasing node and configured to provide a bias signal; and

providing a feedback circuit including a second resistance and a first capacitance serially coupled between said input and output nodes;

wherein a ratio of said first and second resistances is selected to a predetermined value for cancelling a non-dominant pole of said filter.

7. The method of claim 6 wherein said step of providing said bias circuit includes the step of providing a plurality of transistors such that magnitude of transconductance of at least one of said plurality of transistors is proportional to magnitude of said first resistance.

8. The method of claim 6 wherein said input node includes an inverting input node, said operational amplifier includes a non-inverting input node, and further wherein said non-inverting input node is coupled to a reference node.

9. The method of claim 8 wherein said reference node is further coupled to the ground terminal.

10. The method of claim 6 further including the step of providing a second capacitance and a third resistance coupled to said feedback circuit and said input node.

11. The method of claim 10, further including the step of providing a third capacitance coupled between said input node and a reference node.

12. A filter circuit, comprising:

a filter input terminal;

a filter output terminal;

an operational amplifier having first and second input nodes, an output node and a biasing node, said operational amplifier output node coupled to said filter output terminal;

an input capacitance coupled between said filter input terminal and said operational amplifier first input node;

an input resistance coupled between said filter input terminal and said operational amplifier first input node;

a feedback circuit having a feedback resistance and a first capacitance coupled between said first input node and said output node of said operational amplifier; and

a bias circuit including a bias resistance coupled to said operational amplifier biasing node and configured to provide a bias signal;

wherein a ratio of said first and second resistances is selected to a predetermined value for cancelling a non-dominant pole of said filter.

13. The circuit of claim 12 wherein said operating conditions of said filter circuit include variations in temperature.

14. The circuit of claim 12 wherein said bias circuit comprises a plurality of transistors configured such that magnitude of transconductance of at least one of said plurality of transistors is proportional to magnitude of said first resistance.

15. The circuit of claim 14 wherein said first input node is inverting, said second input node is non-inverting, and said second input node is coupled to a reference terminal.

16. The circuit of claim 15 wherein said reference terminal is ground.

17. A method of providing a filter circuit, comprising the steps of:

providing a filter input terminal;

providing a filter output terminal;

providing an operational amplifier having first and second input nodes, an output node and a biasing node, said step of providing said operational amplifier includes the step of coupling said operational amplifier output node to said filter output terminal;

coupling an input capacitance between said filter input terminal and said operational amplifier first input node;

coupling an input resistance between said filter input terminal and said operational amplifier first input node;

coupling a feedback circuit having a feedback resistance and a first capacitance between said first input node and said output node of said operational amplifier; and

coupling a bias circuit including a bias resistance to said operational amplifier biasing node and configured to provide a bias signal;

wherein a ratio of said first and second resistances is selected to a predetermined value for cancelling a non-dominant pole of said filter.

18. The method of claim 17 wherein said operating conditions of said filter circuit include variations in temperature.

19. The method of claim 18 wherein said step of coupling said bias circuit includes the step of configuring a plurality of transistors such that magnitude of transconductance of at least one of said plurality of transistors is proportional to magnitude of said first resistance.

20. The circuit of claim 19 wherein said first input node is inverting, said second input node is non-inverting, and said second input node is coupled to a reference terminal.