Patent Grant
11962091
The present invention belongs to the field of integrated chip antennas, more specifically to modern applications thereof, which have large arrays of radiating array elements.
Microminiaturization of modern chips with transmitters and receivers is an actual topic today. The growing interest in THz, millimeter- and submillimeter-Wave applications for consumer products over the past several years, drives researchers to look for compact and low-cost solutions for transmitters and receivers at the THz and mm-Wave frequency bands.
THz transmitters are usually based on Harmonic VCOs or frequency multipliers driving an on- or off-chip antenna. The short wavelength makes it possible for the antennas to be fully integrated on a chip and to form even quite large antenna arrays in a single die. Due to the limited voltage supply in scaled CMOS and the lower amplitude of harmonic generation at frequencies above transistor fmax, the radiated power out of a single element working around 300 GHz barely exceeds 0.5 mW at maximum [1]. Generating more power by combining signals from several locked sources on chip to the same on-chip antenna is not efficient due to the high loss of interconnects at these frequencies. Using conventional phased-array transmitter architectures, by spacing a 2D array of radiators with a minimum pitch of λ/2 (0.5 mm at 300 GHz) for spatial combining, limits the radiated power density in the chip to 2 mW/mm2 and thus requires very large chips in order to generate more THz power.
As discussed, the conventional approach to implement a 2D source antenna array is to space the antenna sources by λ/2 from each other, to optimize spatial power combining.
This conventional approach presents a problem when trying to realize large arrays on a bulk CMOS substrate. As the area increases, surface waves in the lossy substrate degrade the overall array gain. This may partially be alleviated by using post process techniques [3] or external elements such as superstrate Quartz and focusing Silicon lens [3,4].
The main purpose of the invention is to propose a solution which overcomes the disadvantages of the above-mentioned prior art technique.
It was presented in [1] that a loop antenna can develop high gain over an optimal silicon die area.
Upon further analysis of, and experiments with the structure described in the Background above as [1], the Inventors have arrived to a conclusion that the directivity and the radiation efficiency, which together define the antenna gain, are pre-determined by the substrate dimensions rather than by the loop antenna dimensions. Results of the Inventors' research imply that the radiation mechanism is related to the dielectric resonance nature of the Silicon die itself rather than the magnetic dipole created by the loop antenna. The Inventors have come to a conclusion that the magnetic dipole excites the radiating mode inside the die when the die has such dimensions as to start behaving as a silicon Dielectric Radiation Antenna (DRA). In other words, the effect has been noted whenever the silicon die started demonstrating a notable dielectric resonance in a specific direction.
The Inventors have proposed their model of DRA. According to the Inventors' model, which treats the silicon die as a DRA, each radiating source is now considered as a feed for the DRA.
Based on that, the Inventors have developed a novel technical concept of an integrated antenna.
The main feature of the active DRA is that two or more radiating sources are integrated in a specific dielectric (for example, silicon) die in an improved array, which is denser and/or greater by number of radiating sources than a conventional array occupying the same area.
Any dielectric die exhibits some specific dielectric resonance.
However, one preferable feature of the proposed integrated antenna is that the die's dimensions are such that the die exhibits a dielectric resonance in a specific direction, so as to allow the die to behave as DRA when said radiating sources are activated. Such an integrated antenna may be called an active DRA.
Parameters of the die for such an active DRA, configuration and parameters of other elements of the active DRA may be determined based on the Inventors' model. More details will be provided below and in the Detailed description.
The new approach and the new technical solution proposed in the present patent application allow generating more radiated THz power out of a chip with a fixed area. In one example, the Inventors propose a new structure of the array of the radiating elements, which will be denser (for example, will comprise more antenna elements) than a conventional array for a given die: namely, a three dimensional array.
In another example, the Inventors have found that the radiating array elements may be placed on a dielectric chip in a more dense array than it was known before (namely, may be located at a spacing less than λ/2 from one another), and that higher values of TRP (Total Radiated Power) and EIRP (Effective Isotopic Radiating Power) may be obtained from such an array.
The disadvantages of the previously known technique just do not appear or become negligible in the arrangement proposed by the Inventors.
According to a first aspect of the invention, there is proposed an integrated antenna for radiating an electromagnetic beam at a wavelength λ (for example, belonging to a range of millimeter and submillimeter waves), wherein:
Density of an antenna array should be understood as a ratio between a number of radiating elements of the whole array and the area captured by that antenna array on the working (radiating) surface of the die. The working surface may be understood as a broader surface of the die carrying at least part of the radiating array.
In one embodiment of the integrated antenna, said array may be a 3D array occupying at least two layers in the dielectric die. One of such layers may constitute the working (radiating) surface of the die.
Such an embodiment may be separately defined as an antenna integrated in a dielectric die and configured as a 3D array comprising three or more radiating elements (transmitters).
In another embodiment of the integrated antenna, the radiating elements neighbouring in the array (1D, 2D or 3D array) may be placed at a spacing less than λ/2 from one another.
A more specific embodiment may be defined as an integrated antenna for radiating an electromagnetic beam at a wavelength λ (for example, belonging to a range of millimeter and submillimeter waves), wherein:
The proposed integrated antenna may be adapted for radiating an electromagnetic beam at the wavelength λ belonging to a range of millimeter and submillimeter waves.
In one preferred embodiment of the invention, the die exhibits dielectric resonance and thus forms a Dielectric Resonance Antenna (DRA).
More specifically, the dimensions of said dielectric die may be such that the die is capable of exhibiting dielectric resonance at said wavelength λ in a direction of the electromagnetic beam emitted from the die perpendicularly to its working (radiating) surface.
The Inventors have shown that in each of the integrated antennas defined above, the die may form a DRA (may exhibit a suitable dielectric resonance) if it has suitable dimensions.
Further, each of the integrated antennas defined above may in operation behave as a so-called Active DRA, wherein said radiation elements serve as radiation sources (feeds) of the DRA.
For any specific array of radiating elements, the dielectric resonance may exist simultaneously with mutual electric resonance of the radiating elements in the array. The electric resonance can be reached by selecting/computing a proper combination between inductance and capacitance of the radiating elements.
The Inventors have found that for any proposed integrated antenna to serve as an active DRA more effectively, the dielectric resonance of the die and the electric resonance of a radiating element should correspond to one another.
More specifically, the following criterion is recommended:
It goes without saying that Fdr corresponds to the wavelength λ.
In one example, Fdr may be a 3rd harmonic of Fer. The Fer may be determined for one radiating element, or based on one radiating element while taking into account neighbouring radiating elements.
It has been noted by the Inventors, that a decrease in dimensions of an individual area of the radiating source (and thus in dimensions of the die) causes essential increase in the power density. Examples will be given as the description proceeds.
The Inventors have shown that the proposed integrated antenna behaving as an active DRA is capable of preserving gain and providing increased power density (TRP/per die size) in comparison with the power density which could be produced by a known antenna having spacing λ/2 between radiating elements on its dielectric die.
The radiating elements (sources) in the array may be controllable.
The electromagnetic beam generated by the integrated antenna may be directed. Further, the radiating sources may be adapted to be locked in frequency.
It should be noted that the proposed active DRA may be useful for various applications.
In some applications, the radiation of the radiation elements may be non-coherent. However, in the application described in the present invention with more details, the radiation sources may become coherent (i.e., may be brought to have the same phase). The radiation sources may be locked in frequency and/or in phase.
The proposed integrated antenna may be designed as follows.
The dielectric die (substrate) of any version of the proposed antennas may be selected so as to form DRA by selecting the dielectric die which demonstrates dielectric resonance due to its specific dimensions. It should be noted that such dimensions of the die may be computed by a specialist, for example using the Marcatili reference [7].
The dielectric resonance of the die in principle allows operation of the integrated antenna as an active DRA. Suitable dielectric resonance in a specific direction improves the DRA operation.
The above allows addressing a rectangular silicon die as a rectangular Dielectric Resonance Antenna (DRA), where each radiating element (say, a loop antenna+VCO) is now considered as a feeding source (feed, port) for the Silicon active DRA. However, for still more efficient operation of the active DRA, the dimensions of the die and parameters of the radiating sources may be selected/adjusted so that Fdr be a whole harmonic of Fer.
Since the power of the radiating sources is now combined (preferably, combined in-phase) within the DRA and radiated from it, there is no more need to keep a λ/2 spacing between the sources. In this case, by bringing the sources closer according to the Inventor's concept, the die area of each source element may be reduced.
For example, the spacing between the sources may be reduced so as to make it λ/4-λ/5. When the spacing was selected λ/4, the die area of a source was reduced by 4 while the power was increased by 4 compared to an area with a λ/2 conventional spacing, while functionality of the resulting antenna was not harmed and could even be improved.
Based on one of the above concepts, the Inventors also propose an exemplary, non-limiting implementation, which comprises a dense 2D multi-port radiator composed of a CMOS Silicon DRA fed by 30 sources. Each source (i.e., each radiating element) may be built of a compact differential Colpitts VCO with a 3rd harmonic signal oscillating at 280 GHz connected to a loop exciting element, which together contribute for the active DRA. The fundamental harmonic signal of such VCOs may be of about 93 GHz. The proposed sources array may be locked in frequency and phase by the inherently strong mutual injection locking due to the sources proximity. Further, an integrated DAC (Digital to Analog Convertor) and an integrated SPI (Serial to Parallel Interface) may be used to control the operation of the dense array on-chip. Such a circuit may present a peak EIRP of +24.2 dBm, a record TRP of +9 dBm and a record power density of 4 mw/mm2 (where TRP is total radiated power and where EIRP is effective isotopic radiated power characterizing also directivity of the beam, and where the obtained power density is much more than that in a similar conventional array where the spacing between radiation sources is λ/2)
The Inventors have shown that, optional use of a wireless, external injection locking technique [1], allows obtaining a more stable electromagnetic signal from the active DRA. The measurements were performed on the free running, injection locked VCO array.
Still further, a metal surface (a ground plane) is usually provided on the dielectric die of the proposed integrated antenna, on the surface opposite to the working surface.
According to a second aspect of the invention, there is also provided a method of manufacturing an integrated antenna for radiating an electromagnetic beam at a wavelength λ (for example, belonging to a range of millimeter and submillimeter waves),
The method may further comprise arranging a spacing between the neighbouring radiating elements to be less then λ/2 from one another.
The method may also comprise selecting said dielectric die dimensions so as to ensure behaviour of the die as a DRA (by exhibiting suitable dielectric resonance).
The array may be arranged as a 1D, 2D or 3D array.
The method may be a 65 nm CMOS process.
According to a third aspect of the invention, there is provided a method of designing an integrated antenna comprising an array of two or more radiating elements integrated in a dielectric die, for radiating an electromagnetic beam at a wavelength λ (for example, belonging to a range of millimeter and submillimeter waves),
Still preferably, the method may comprise one or more of the following steps:
The method may be implemented by performing computer simulations at each of the above-mentioned steps.
The method may further comprise steps of:
By using the above method, an active DRA may be designed and then manufactured according to the design. Such an active DRA will be thus capable of preserving gain of said electromagnetic signal at said wavelength while increasing power density radiated from said array (for example, in comparison with values of gain and power density of an integrated antenna having the spacing of λ/2 between its radiating elements).
According to still a further aspect of the invention, there is also provided a software product comprising computer implementable instructions and/or data for carrying out the method of designing the integrated antenna, the software product being stored on an appropriate non-transitory computer readable storage medium so that the software is capable of enabling operations of said method when used in a computer system.
The software product may be at least partially located in a Goniometer, for example for performing steps of computer simulations and/or measurements.
According to another aspect of the invention, there is provided a method of controlling the novel antenna, comprising a step of adjusting free running frequency of the radiating elements, for further locking thereof in frequency.
For controlling the antenna wherein its radiating elements comprise respective VCOs, the method may comprise regulating gate voltage of said VCOs to obtain mutual injection locking thereof.
The method may further comprise controlling and locking each specific radiating element in phase, upon said radiating element is locked in frequency.
A suitable software product has also been provided for the above control method.
The invention will be further described in detail as the description progresses.
The invention will be further described and illustrated with the aid of the following non-limiting drawings in which:
The Invention discloses a novel concept and an exemplary embodiment of a fully integrated chip antenna for modern applications, which has a more massive and/or more dense array of radiating array elements integrated in a dielectric die, than a conventional array. The antenna is preferably designed to work in the range of mm and submm-waves (λ). Compared to a conventional approach, the dielectric die in the proposed concept is recognized and is treated as a Dielectric Resonant Antenna (DRA).
More specifically, the antenna proposed by the Inventors may be implemented as a fully integrated chip scale dielectric resonance antenna for GHz and mm/submm-Wave applications. Still more specifically, the antenna may be configured as a fully integrated and digitally controlled Multi-port dense 2D radiator.
In the example, presented in the paper, each source consists of a W-band Voltage Controlled Oscillator (VCO) connected to an exciting loop element to inject its 3rd harmonic to the DRA. The use of 3rd harmonic is also an example. Further in the discussed example, the array elements occupy only 1.4×1.4 mm2, the array elements are injection locked in frequency due to the tight coupling of the adjacent elements without the need of any locking signal. High resolution DACs (Digital to Analog Converters) may be used to accurately set the frequency; and a 3 wire SPI control interface may be implemented. In such an antenna, if fabricated in standard 65 nm CMOS process, the array achieves an EIRP of 24 dBm, a record TRP of +9 dBm and power density of 4 mW/mm2 with 1.8% efficiency at 280 GHz.
Both the above-mentioned concept and example will be further discussed and illustrated with the aid of the non-limiting drawings.
The specific example is a 1.4×1.4×0.22 mm3 Silicon die, which was found by the Inventors to provide maximum gain at 280 GHz for a multi-port feed (according to HFSS simulations), may be excited with different number of feeding elements. It can be seen in
The inventive concept, which in this example may be called a Multi-port Dense 2D DRA, allows adding exciting sources per the same die area, along with the increase in the resulting EIRP. Actually, line 17 corresponds to the example shown in
In yet another example (not shown) a 1D array may be formed on any of the layers. It should be noted that the spacings d1, d2, d3 between neighboring radiating sources in the array may differ from one another. Optionally at least one of the spacings d1-d3 may be smaller than λ/2. The antenna 20 may be designed for any wavelength, but is preferable for the range of millimeter or submillimeter wavelengths.
Examples of
Sizing and Mode Analysis for a rectangular silicon die may be provided by a specialist in the art and be assisted by applying the Dielectric Waveguide Model (DWM) presented by Marcatili [7].
The Inventors has found that at frequencies high enough, where the die size is comparable with the wavelength in the silicon, the radiating modes can be excited inside the silicon die so that it can be used in practice as a DRA. Such a DRA is called active DRA in the present application. According to that approach, the on-chip metal pattern (metal loop in this case) is no longer considered as a radiating metal antenna, but rather as an exciting element. Power fed to the loop, induces electro-magnetic fields in the silicon die, which resonate in one or more, specific and size dependent modes and radiate from the front side of the chip. This allows the highest form of integration for a DRA, resulting in the active DRA. It is because now, both the power generation circuits and the excitation elements may be embedded in the DRA. Such an active DRA is a new Chip Scale Dielectric Resonance Antenna (CSDRA) which introduces several important advantages for fully integrated radiating power sources. To demonstrate the way the silicon die is designed as a CSDRA for a desired frequency, we start by analyzing the die as a rectangular DRA placed on a finite ground plane. To evaluate the required dimensions we can solve the so-called transcendental and separation equations of Marcatili for the our desired resonance frequency, 280 GHz, or analyze the resonance frequency for a given set of substrate width, length and height (a, b and d).
The mentioned equations can be solved for the fundamental mode of DRA, or higher order modes. While optimizing the dimensions, physical limitation of the silicon die must be taken into consideration, for example the minimal die dimensions suitable for handling and measurements. The die must also be large enough to accommodate the active circuits, bonding pads and the exciting elements.
Once the foundations for the CSDRA have been laid out, we expand this concept to CSDRAs with more than one exciting element (
The radiating element 22 shown in
To minimize the layout and to maximize the sources array density, a compact, differential VCO was realized and an example is shown in
The gate and source inductors Lg, Ls are fully differential and were nested in the design to minimize the layout without degrading the radiating source performances. The gate voltage (VG) is connected at the virtual ground of the gate inductor with no need for RF chokes. The drain inductor is a differential single loop inductor. The design takes advantage of the fact that the drain inductor acts as a DC path for VDD, an inductive load at the fundamental frequency and a DRA feed at the 3rd harmonic. This triple use allows a compact design, with optimized and virtually lossless power transmission. The loop is carefully co-designed with the VCO to maximize the generated power at the 3rd harmonic and thus is not matched to pure 50Ω, but to a trade-off impedance between delivered power, DRA gain and efficiency. Simulation shows that each VCO injects more than 0 dBm around 280 GHz to the loop. The single source size may be for example 245×200 μm2. The tuning voltage for each VCO may be set by an 8-bit voltage DAC 26 controlled thru a 3 wire SPI interface 28 (
Full 3D electro-magnetic simulations show the loop has an inductance ˜140 pH at W-band, with a resonance frequency higher than 130 GHz. At J band which is the frequency range of our interest, the loop shows ˜65 Ohms. For a single element DRA, based on this source VCO shown in
The horizontal axis shows various values of gain-source voltage (Vgs), for controlling frequency of the radiating element.
The gaps (spacing) between the radiating sources in lines and in columns of the array may be different. It should be noted that at least one of the gaps—between columns or between rows—may be reduced (be lower than λ/2) in the novel antenna.
The single element dimensions and routing constraints allowed for a 245 micrometre and 200 micrometre vertical and horizontal array spacing, respectively, resulting into a very compact 5×6 array for λ of about 1.07 mm (corresponding to 280 GHz). As agreed, the single radiating element's dimensions are less than (λ/2×λ/2). For the bias, the DC supply voltage and ground may be routed along the vertical axis of symmetry of each element, where the metal traces have the least effect on the electric field. Each column may be fed from a dedicated top and bottom power and ground pads to minimize voltage drop and add some degree of flexibility in measurement. The gate voltage for each VCO, which sets the frequency, is determined by an on-chip DAC, as shown in
To minimize the metal foot print of the control and bias lines distribution, each DAC is controlled by an addressable SPI. Each SPI has a 5 bit pre-wired address and accepts a 16 bit serial stream. The gate voltages may be individually set for each VCO to allow modification of frequency, to improve the mutual injection locking process. Furthermore, once all the VCOs are locked in frequency, a small shift of the tuning voltage of a single VCO, while still locked, would force it to modify its phase and can assist in aligning all the phases or possibly steer the beam. As seen in
The 5×6 array was fabricated in a standard 65 nm CMOS process. The top, 3.4 micrometre thick copper metal (M9, a thick layer of the metal ground plane), was used for the radiating elements to minimize ohmic losses. The source and gate inductors are realized at a lower metal to reduce the coupling to the antenna and to overcome width and spacing constraints. Total die area is 1.45×1.45 mm2 slightly larger than the desirable 1.4×1.4 mm2 due to dicing constraints. 27 out of the 30 VCOs were locked in frequency, with no external locking signal. Indeed, most of the VCOs managed to achieve frequency lock for the same DAC value for all the VCOs, except for some of the top row VCOs, which required finer tuning limited by the DAC accuracy in this circuit.
Measurements of the antenna radiation have been performed in different directions, to determine whether the electromagnetic beam has the required directivity and power.
34 indicates the integrated antenna to be checked, mounted on a card of RP4350 PCB.
36 is a motorized stage, movable with a PCB mounting plate to which the card 34 is connected.
38 is a mounted W-band source for wireless injection locking of the antenna sources.
40 is an Arduino controller which may embed a software product for designing the antenna and/or controlling the antenna.
Optionally applying a wireless, external injection locking technique [1], the Inventors have shown that a more stable signal of the active DRA could be obtained. The measurements were performed on the free running, injection locked VCO array. For example, each VCO consumes 12 mA from a 1.3V supply at the centre frequency. The measured peak EIRP was 24.1 dBm at 280 GHz slightly off boresight without any focusing lens, when radiating from the top side of the die. The difference from the simulated 26.3 dBm EIRP of 27 VCOs is due to the phase misalignment between the VCOs. Modifying the gate voltages does improve the EIRP as suggested, but the minimum voltage step (˜5 mV) proved to be too large for achieving perfect phase alignment of all VCOs.
The TRP was measured with an accurate, scanning goniometer stage 36 for 3D polar measurement.
A VDI WR3.4 down converter and E4448 spectrum analyser were used to down convert and detect the received signal. The Total Radiated Power is +9 dBm at 280 GHz. The array was scanned at 30 cm at an azimuth and elevation range of ±80 degrees.
The inventive concept described in the patent application may be further illustrated by Table I, which speaks for itself.
In the present application, the novel concept of a dense integrated antenna and of an active DRA, which are especially useful for Millimeter and Submillimeter waves, have been presented by using an example of a multi-port fed DRA for a THz transmitter array. The inventive concept alleviates the conventional need of λ/2 between antennae for optimal spatial combining. By combining the signal injected from the multiple sources feeds into the DRA, maximum sources density can be achieved. The concept was demonstrated over a 1.4×1.4 mm2 DRA with 30 source feeds. The realized CMOS array achieves at 280 GHz more than +24 dBm EIRP, a record TRP of +9 dBm over 2.2 mm2 resulting into a record 4 mW/mm2, which is more than twice more the current feasibility limit of conventional λ/2 spaced arrays.
It should be appreciated that while the invention has been described with reference to specific example and drawings, other embodiments and versions of the invention may be proposed, which should be considered part of the invention whenever defined by the claims which follow after the list of References.
This is a national stage application filed under 35 USC 371 based on International Application No. PCT/IL2019/050641 filed Jun. 5, 2019, which claims priority under 35 USC 119 of U.S. Provisional Application No. 62/681,203 filed Jun. 6, 2018.
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