The invention relates to an integrated circuit as described in the introductory part of claim 1. The invention also relates to a method for sending requests as described in the introductory part of claim 7.
A request-response transaction model is frequently used as a communication model for systems on integrated circuits. The transaction model can either be deployed in systems using a bus architecture or in systems using a network architecture, in order to establish communication between the modules. Using such a transaction model in a network on an integrated circuit provides backward compatibility with existing interconnects, for example buses.
The transaction model uses requests and responses. A request comprises a command (e.g. read, write) with parameters, such as an address or a burst length, and optionally the request comprises a data part. Responses carry an acknowledgement indicating the result of the execution of a request, and optionally they carry a data part.
Another communication model is the message-passing model, which uses messages and acknowledgements. Such an acknowledgement indicates the receipt of a message rather than the execution of a request.
In networks on an integrated circuit a first module (also referred to as master, master module or initiator) typically has access to an address space, wherein addresses identity locations within second modules (also referred to as slaves, slave modules or targets). Depending on circumstances, it may be necessary to address two or more second modules simultaneously. For example, this is needed when the execution of a request by two or more second modules needs to be started simultaneously and the staring is performed by writing to start registers mapped in the address space; all these start registers should be written to at the same time. Another example is when data is replicated to different memories to be processed locally. In these cases the first module replicates the request and the resulting plurality of replicated requests is sent to the second modules. This has the disadvantage that the first module cannot send a request to more than one second module using a single address, but it must replicate the request and send the replicated requests to the second modules using a different address for each second module. This causes a large burden on the first module.
It is an object of the invention to provide an integrated circuit and a method of the kind set forth which reduce the burden on the first module. In order to achieve the said object the integrated circuit is characterized by the characterizing portion of claim 1 and the method is characterized by the characterizing portion of claim 7.
The burden on the first module can be reduced by providing a network which is capable of replicating a request into at least two replicated requests, and which is capable of sending the replicated requests to the second modules. If the network can perform these tasks, then the first module can be relieved of them.
An embodiment is defined in claim 2, wherein the network comprises a facility for mapping at least one special address (also referred to as multicast address) onto at least two further addresses. This enables the first module to send a single request to a single address instead of replicating the request and sending the replicated requests to various addresses.
It is also possible to map one or more multicast addresses onto one or more other multicast addresses; this embodiment is defined in claim 3. This has the constraint that no recurrence should occur.
Depending on circumstances, it is convenient to specify a range of multicast addresses once instead of specifying a number of separate multicast addresses. The embodiment defined in claim 4 provides a facility for defining such a range of multicast addresses.
Another embodiment is defined in claim 5, wherein a multicast connection is deployed to relieve the first module of the replication and dispatch tasks. The first module can send a single request comprising a connection identifier referring to such a connection; the network then replicates the single request into at least two replicated requests and sends the replicated requests through the connection to the second modules.
One or more dedicated nodes in the network may be used to replicate the single request and send the replicated requests. The embodiment defined in claim 6 comprises a network interface to replicate the single request and send the replicated requests.
The invention overcomes the shortcomings of multicast transactions in networks on an integrated circuit, because the network can provide a multicast request to at least two second modules in response to a single request from the first module.
It is noted that U.S. Ser. No. 2002/0093964 discloses a protocol for routers (data switching nodes) and supervisors to exchange data. The router can send commands to the supervisor including a learn/delete/search multicast address command. The supervisor provides information to the router about multicast packets that must be routed. However, the supervisor does not perform an actual multicast; the router must perform this multicast. A method of multicasting of the kind set forth is not disclosed in U.S. Ser. No. 2002/0093964.
The present invention is described in more detail with reference to the drawings, in which:
A special address F000, also referred to as a multicast address, is mapped onto two regular addresses: address 3A98 which is in the sub range 0 up to and including AFFF associated with second module M2, and address C350 which is in the sub range B000 up to and including EFFF associated with second module M3. Such a mapping may take place by using a lookup table or by a logical operation, for example. Now the first module M1 can send a request to the multicast address F000, and then the request is replicated by the network interface NI and sent to the addresses 3A98 and C350, which are associated with second module M2 and second module M3 respectively.
Note that it is possible that a multicast address is mapped onto another multicast address, but recurrence must be avoided in the sense that a first multicast address should not be mapped onto a second multicast address which in turn is mapped onto the first multicast address. Note also that it is possible that a multicast address is mapped onto two or more addresses within a single second module.
In addition, it is possible to define a multicast range, which is illustrated in
Alternatively, a multicast connection can be deployed to reduce the burden on the first module M1, which is illustrated in
In this example a multicast connection is set up from a first module M1 to two second modules M2 and M3. Connections require that a connection identifier CID is sent along with a request. A request on such a connection can then automatically be sent to all the second modules of the connection. Note that the requests still carry addresses which are used as internal addresses for the second modules, i.e. addresses which identify locations within the second modules, but which are not used to replicate and distribute requests to the second modules.
A connection is set up during a configuration stage of the network. Typically the network is configured by the boot code but it may also be configured at runtime. The connection identifier CID has a value which identifies the connection; in this case the value is ‘0’. In the example shown the value of the connection identifier CID is mapped onto network interface ports NIP2 and NIP3 via the mapping 0→{NIP2, NIP3}. The network interface ports NIP2 and NIP3 form part of network interfaces NI2 and NI3 respectively; note that one network interface may have more than one network interface port and several network interface ports may be associated with a single address. These network interface ports NIP2 and NIP3 are in turn associated with the addresses of the second modules M2 and M3. Now the connection identifier CD can be sent along with a request; the network interface NI1 can replicate the request and send the replicated requests through the connection. Via the network interface ports NIP2 and NIP3 the request can be delivered at the addresses of the second modules M2 and M3.
It is remarked that the scope of protection of the invention is not restricted to the embodiments described herein. Neither is the scope of protection of the invention restricted by the reference symbols in the claims. The word ‘comprising’ does not exclude other parts than those mentioned in a claim. The word ‘a(n)’ preceding an element does not exclude a plurality of those elements. Means forming part of the invention may both be implemented in the form of dedicated hardware or in the form of a programmed general-purpose processor. The invention resides in each new feature or combination of features.
Number | Date | Country | Kind |
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02079196.8 | Oct 2002 | EP | regional |
03101972.2 | Jul 2003 | EP | regional |
Filing Document | Filing Date | Country | Kind | 371c Date |
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PCT/IB03/04322 | 10/7/2003 | WO | 4/5/2005 |