As used here, a fluidic channel refers to a channel configured to carry a fluid in a substrate. Some devices require that fluidic channels be connected by a functional material different from a substrate material used to form the channels. For example, in some Joule-Thompson (JT) cryocoolers, in which a gas under pressures adiabatically expands through a nozzle into a low pressure chamber, the high pressure gas is thermally conditioned before entering the chamber by the temperature of the low pressure exhaust gases. A cryocooler implies a device designed to cool to very low temperatures, such as −150 degrees Celsius (° C.) or 130 Kelvin (K), and below. The thermal conditioning is accomplished, for example, through a thermally conductive material (as the functional material) different from the material serving as a substrate for channels, which is thermally insulating in order to support the adiabatic expansion.
When the fluidic channels are on the microscale (cross sectional dimensions from about 1 to about 1000 microns, 1 micron=10−6 meters) or nanoscale (cross sectional dimensions from about 1 to about 1000 nanometers, nm, 1 nm=10−9 meters) fabrication become challenging. In such cases, the functional material is often formed into a second layer, separate from a wafer serving as the substrate for the fluidic channels. A cover for the channels, with any reservoirs or access ports, is then formed in a third layer. The multilayer fabrication introduces complexity and expense in having three or more fabrication configurations and introduces challenges in alignment of the separately fabricated layers.
For example, some microscale JT cryocoolers have been fabricated using Micro-Electro-Mechanical Systems (MEMS) or Nano-Electro-Mechanical Systems (NEMS) micromachining, and semiconductor processing methods. These fabrication methods involve the use of three or more wafers as substrates to achieve the effective integration of fluidic circuits, and do not allow for the integration of thermally conductive material useful for such thermal conditioning as in a regenerative cooling design. The fabrication techniques involved (e.g., deep reactive ion etching, microparticle sand blasting, selective laser ablation) are highly complex, specialized, expensive, and often difficult to maintain in a manufacturing mode.
Techniques are provided for manufactured devices using a repeatable, flexible, and economical fabrication process that enables industrial adoption for devices having fluidic channels at the microscale and nanoscale connected by a functional material separate from a substrate, such as for manufacture of devices comprising microfluidic JT cryocooler technologies (also called JT microcoolers herein). In some of these embodiments, the functional material is introduced for increased thermal conductivity. In other embodiments, the functional material is introduced for other functions, such as electrical conduction to reduce voltage buildup or to harvest current from a battery, or introduced for filtering to remove particles of a particular size or chemical composition from the fluid, or introduced to allow diffusion of one or more chemical constituents from high to low free energy in a fluidic circuit.
In a set of embodiments, an apparatus includes a first substrate of a first material having a first bonding surface along a plane, and one or more fluidic channels disposed in the first substrate and open at the plane of the first bonding surface and having at least two different portions. The apparatus also includes a different second material disposed on the first substrate. The second material connects the two different portions of the one or more fluidic channels; and, an outer surface of the second material is at the plane of the first bonding surface at positions between the two portions. The apparatus also includes a second substrate having a second bonding surface in contact with the first bonding surface. The second substrate is configured to confine fluid flow within the one or more fluidic channels.
In some embodiments, such as a Joule-Thompson cryocooler apparatus, the first material is a first thermally insulating material and the second material is a thermally conductive material and the second substrate is made of a second thermally insulating material. In some of these embodiments, the thermally conductive material is selected from a group comprising polysilicon and titanium/nickel alloy.
In some embodiments, the apparatus includes one or more fluidic channels disposed in the second substrate and open at a plane of the second bonding surface.
In some embodiments, the apparatus includes a layer of malleable sealing material disposed on at least one of the first substrate at the first bonding surface and the second substrate at the second bonding surface. In some of these embodiments, the sealing material has lower thermal conductivity than the thermally conductive material.
A more particular description than the description briefly stated above is rendered by reference to specific embodiments thereof that are illustrated in the appended drawings. Understanding that these drawings depict only example embodiments and are not therefore to be considered to be limiting of its scope, various embodiments are described and explained with additional specificity and detail through the use of the accompanying drawings in which:
Embodiments are described herein with reference to the attached figures wherein like reference numerals are used throughout the figures to designate similar or equivalent elements. The figures are not drawn to scale and they are provided merely to illustrate aspects disclosed herein. Several disclosed aspects are described below with reference to non-limiting example applications for illustration. It should be understood that numerous specific details, relationships, and methods are set forth to provide a full understanding of the embodiments disclosed herein. One having ordinary skill in the relevant art, however, will readily recognize that the disclosed embodiments can be practiced without one or more of the specific details or with other methods. In other instances, well-known structures or operations are not shown in detail to avoid obscuring aspects disclosed herein. The embodiments are not limited by the illustrated ordering of acts or events, as some acts may occur in different orders and/or concurrently with other acts or events. Furthermore, not all illustrated acts or events are required to implement a methodology in accordance with the embodiments.
Notwithstanding that the numerical ranges and parameters setting forth the broad scope are approximations, the numerical values set forth in specific non-limiting examples are reported as precisely as possible. Any numerical value, however, inherently contains certain errors necessarily resulting from the standard deviation found in their respective testing measurements. Moreover, all ranges disclosed herein are to be understood to encompass any and all sub-ranges subsumed therein. For example, a range of “less than 10” can include any and all sub-ranges between (and including) the minimum value of zero and the maximum value of 10, that is, any and all sub-ranges having a minimum value of equal to or greater than zero and a maximum value of equal to or less than 10, e.g., 1 to 4.
Although some example embodiments are described below in the context of JT microcoolers, the methods of fabrication and resulting devices are not limited to such technology. In other embodiments, the methods and devices are utilized in other technologies that advantageously use functionalized fluidic devices, on the nanoscale or microscale or larger scales, such as batteries, environmental or medical testing equipment, chemical manufacture, chemical processing, water treatment, medical treatment, sensors, transducers, bioanalytical instruments, and any variety of fluid-handling systems.
For example, in a JT microcooler, the channels 112 are microfluidic channels or nanofluidic channels or some combination. Non-ideal gas in the supply chamber 114 is under pressure and passes through nozzle 118 into the reaction chamber 116 at low pressure. In the reaction chamber 116, the non-ideal gas undergoes adiabatic (no exchange of heat) expansion, so the substrate 110 is advantageously made of a material that is thermally insulating. The low pressure gas (still a fluid) is the reaction product and is then used for cooling, e.g., for cooling of a contacting heat source built independent of the substrate. For example, some or all of the low temperature gas passes through an access port (depicted below with reference to
The component 101 also includes one or more functional materials deposited on the substrate in order to connect at least two portions of the channels 112. In the illustrated embodiment, functional material 120a is disposed on the substrate 110 to connect a portion of length 121a of channel 112a with a portion of channel 112b; and, functional material 120b is disposed on the substrate 110 to connect a different portion of length 121b of channel 112a with a different portion of channel 112b. In some embodiments, the functional materials 120a, 120b (collectively referenced hereinafter as functional material 120) and lengths 121a, 121b (collectively referenced hereinafter as length 121) are different. In some embodiments, the functional materials deposited in different parts of the substrate 110 of component 101 are the same and the lengths 121 are either also the same or are different. The type of functional material, the area of contact of the functional material with each portion of the channels 112 connected, and the length 121 and thickness of the material over the substrate barrier dividing the two portions are all selected to perform the desired function at a desired rate suitable for a given purpose, and can be determined by experiment or simulation. By depositing the functional material directly on the same substrate 110 that forms the channels, the component 101 obviates the need for an additional substrate used in previous approaches to provide the functional material, or its corresponding function. Later drawings depict example cross sections of component 101 or fabrication thereof at cross section position 109.
By itself, component 101 has fluidic channels that are open to a surface of the substrate 110, and therefore not suitable for most purposes, including for gas fluids, or fluids that are advantageously shielded from an external environment.
The access ports in component 102 connect the fluidic channels in component 101 to one or more other components of the device. The other components include fluid supplies, such as fluid supply 182; one or more consumers of reaction product, such as reaction product consumer component 184; and zero or more fluid exhausts, including the ambient environment, such as fluid exhaust component 186. For example, in a JT microcooler, the fluid supply 182 is a gas mixture under pressure; consumer component is a cryostat 184, such as a metallic cold finger into which at least some of the cold expanded low-pressure as is routed, and fluid exhaust 186 is an opening to the environment or to a return line through a compressor.
A bonding surface of substrate 160 is configured to contact a bonding surface of substrate 110; and, thus the substrate 160 of capping component 102 is configured to close off the channels in substrate 110 of fluidic circuitry component 101. The thickness 122 of the functional material 120 between the channel portions advantageously matches the distance from the top of the substrate 110 between the connected channel portions and the bonding surface of substrate 160. Note that two substrates suffice to provide the functionalized fluidic channels, reducing the number of substrates that have to be processed during manufacture, compared to previous approaches using three or more substrates.
The next three drawings depict intermediate steps in the fabrication of the first component 101.
The wafer is typically capable of holding many copies of the first component. The cross section 105 depicts two different portions of one or more channels in at least a part of one copy of the first component, such as the cross section 109 depicted in
Any method to selectively etch away the first material of the first substrate may be used. Examples includes, acid etching, plasma etching, deep reactive ion etching, microparticle sand blasting, selective laser ablation, gas etching, and arc discharge etching.
Any suitable material different from the first material may be used as the functional material. Metals Ni, Cr, Ti, Au, Al, Ag, In, Sn, W, ITO, and others which can be deposited using thin film methods; and, serve as thermal and electrical conductors. Miscellaneous materials such as SiN, SiO, Si, Si(poly), Ge, Si(doped p or n) can serve as semiconductors and optical absorbers or emitters. Silicones, Epoxies, Hydrogels, Aerogels, Papers, Salt Bridges, Packed powders, impregnated ceramics, impregnated plastics can be used to impart filtering and permeability functionality or matrices for chemical reactions. Any method to deposit the functional material 120 in the space 132 may be used.
In step 201, the first substrate is prepared for etching. For example, a wafer of the first material with a generally planar surface is cleaned to remove particulate matter on the surface of the substrate as well as any traces of organic, ionic, and metallic impurities.
In step 203, fluidic channels are etched into the first substrate according to a first spatial pattern. In some embodiments, the pattern is imposed using a computer controlled laser, sand jet or jet of liquid with abrasives. In some embodiments, the pattern is imposed using a lithographic mask, a removable layer of photosensitive material that resists etching (a photoresist), and an etching plasma or etching liquid, such as acid, as described in more detail in
In step 205, space for the functional material is etched into the first substrate according to a second spatial pattern. In some embodiments, the pattern is imposed using a computer controlled laser, sand jet or jet of liquid with abrasives. In some embodiments, the pattern is imposed using lithographic techniques, as described below with reference to
In step 207 one or more different functional materials are deposited into the spaces etched into the first substrate during step 205. In some embodiments, the material is imposed using a computer controlled jet or 3D printer. In some embodiments, the material is deposited using a lithographic mask, a removable layer of photosensitive material that promotes removal (a photoresist), and a blanket depositing process, such as sputtering, as described in more detail in
In step 211 a second substrate of the same or different material from the first substrate material is prepared as a capping component. For example, a wafer of a second material with a generally planar surface is cleaned to remove particulate matter on the surface of the substrate as well as any traces of organic, ionic, and metallic impurities. In various example embodiments, the substrate is fabricated from a glass or silicon type material, or from Pyrex glass. In some embodiments, step 211 includes forming channels or functional material or both on the second substrate as well, as described above for the first substrate, and illustrated in more detail below with reference to
In step 213 one or more access sports are formed in the second substrate. For example, through the use of photolithographic techniques, a mask is laid upon the substrate and a pattern defining port regions are exposed thereon whereby a selected portion of the layer is subsequently exposed to an etchant and washed away. In some embodiments, after the formation of an O2 or SiO2 layer, photoresist is applied to the surface of the second substrate. In example embodiments, a pattern of port regions on the substrate are photo-lithographically defined; and, the substrate is etched in an acid. Thereafter, in some embodiments, measurements are performed via profilometry. As used herein, profilometry refers to the use of a technique for the measurement of the surface shape of an object, such as laser scanning, scanning electron microscopy, interferometer, pin-drop and Atomic Force Microscopy. Once the desired profile is etched, a high speed drilling process is performed to create input and output ports. Final measurements are taken and the capping, second component is cleaned and processed through a dehydration baking step.
In step 221, the capping component comprising the second substrate with any access ports is bonded to the bonding surface of the first component comprising the first substrate with any functionalized fluidic circuitry. During bonding, access ports are aligned with the channels and any chambers in the first component. Thus, during step 221 functionalized fluidic channels are formed. A particular bonding process, used in some embodiments, is described in more detail below with reference to
In step 223, post-bonding conditioning is performed, such as further cleaning and testing for desired performance. A particular post-bonding conditioning process, used in some embodiments, is described in more detail below with reference to
In step 225, the functionalized fluidic channels are incorporated into a device, such as device 180, like a JT cryocooler for an infrared detector.
In step 307, the substrate is etched, e.g., using an acid solution, through the openings (windows) in the fixed substrate. For example, in various embodiments, the acid is hydrofluoric acid or phosphoric acid. In step 309, the fixed photoresist patterned by the photolithography is stripped away using a different solution or grinding process. Thereafter, the resulting surface is checked, optionally, in step 311, e.g., using profilometry.
As will be appreciated by those skilled in the art, there are two types of photoresists: positive and negative, either or both of which may be used in various embodiments. For positive resists, the resist is exposed with light (such as ultraviolet, UV, light) wherever the underlying resist is to be removed. In these resists, exposure to the light changes the chemical structure of the resist so that it becomes more soluble in the developer. The exposed resist is then washed away by a developer solution, leaving windows to the bare substrate material. The unexposed resist remains on the substrate. The mask, therefore, contains an exact copy of the pattern of resist which is to remain on the wafer. Negative resists behave in an opposite manner from positive resists. Exposure to light, such as UV light, causes the negative resist to become polymerized, and more difficult to dissolve. Therefore, the negative resist remains on the surface wherever it is exposed, and the developer solution removes only the unexposed portions. Masks used for negative photoresists, therefore, contain the inverse (or photographic “negative”) of the pattern of resist to be transferred to the substrate. Negative resist is more resistant to acids for etching. Because negative resists typically harden by covalent bonding (polymeric crosslinking), negative resists form an almost reactively inert layer. Typically negative resists are epoxies, which gives them good mechanical durability and stable properties over extended times.
Once the desired space is etched and measured, a liftoff pattern is photo-lithographically defined upon the substrate, similar to the pattern that etched space for the functional material. In step 501 the photoresist that will define the lift off pattern is applied to the substrate. In step 503 the photoresist is exposed to light through a mask with a pattern to fix the photoresist according to the pattern where the functional material is to be lifted off. In various embodiments, the liftoff pattern is similar to the pattern that formed the space, as depicted in
In step 507 a functional material, such as a thermally conductive counter-flow heat exchanger (CFHX) material or film, is deposited. Example CFHX materials, e.g., for JT microcooler applications made with SiO substrates, include polysilicon or titanium/nickel. The functional material contacts the substrate only in the windows of the pattern; and, lies above the photoresist everywhere else. In step 509, the fixed photoresist is stripped off, thus lifting off the functional material where it was deposited on the fixed photoresist, and leaving the functional material only in the windows of the pattern. Optional, additional profilometry measurements are taken in step 511.
In step 607, the bonding surfaces of both substrates are bonded using any appropriate techniques, alone or in some combination. For example, wafers are bonded together using high temperature pressure fusion, high-voltage anodic bonding, controlled adhesives and glass flit (though the latter is not recommended for focal plane array optical detectors), moderate or high-temperature fusion techniques, and further reinforced under the influence of a high-strength electric field, depending on the material of the substrate or functional material.
As shown in
As shown in
As shown in
In example embodiments, a manufacturing process template is provided which reduces the design of a planar, JT cryocoolers to only two wafers. In general, both wafers are advantageously made of thermally insulating material. One of the two wafers contains integrated thermal material and fluidic circuits coplanar to one another and with respect to the substrate plane. The other wafer is optically transparent and serves as an access substrate, or “capping wafer”, which closes fluidic channels defined on the circuit wafer and bears holes for inlets/outlets. Any node in the thermal connections or fluidic circuits can be accessed by tapping the capping wafer, allowing connection with input/output lines for characterization probes. In example embodiments, the wafer of the first substrate is typically fabricated from a glass, quartz, or other silicon-based materials, but other materials may be used as long as they are thermally insulating. If the wafer for the first substrate is selected to be transparent like its capping wafer counterpart, the JT cryostat will have the advantage of being completely optically transparent. In still other example embodiments, the substrate is composed of Pyrex glass. Significant production advantages are provided by a fabrication process wherein a thermally functionalized fluidic circuit wafer is manufactured in two stages of wet chemical etching, thin film deposition, and photolithographic liftoff processing. Subsequent to the manufacture of each wafer, the two wafers are bonded using thermal fusion or anodic techniques depending on the material selection of the substrates and thermal material.
In example embodiments, a fabrication process is provided for rapid prototyping of a device built with ion-bearing glass substrates. The fabrication process includes the steps of fabricating a thermofluidic circuit wafer, then the steps of fabricating a capping wafer, and then bonding the thermofluidic circuit wafer and the capping wafer to one another. More specifically, in example embodiments, the thermofluidic circuit wafer is fabricated by a two stage wet chemical etch process followed by an evaporative deposition step and related low-resolution photolithographic liftoff processing. The process begins with the provision of a generally planar, thermally insulating glass substrate that is cleaned to remove particulate matter or traces of organic, ionic, and metallic impurities on the working surface. After cleaning, an “etch-mask” layer such as negative photoresist is fabricated on the surface of the wafer substrate. Through the use of photolithographic techniques, a pattern which defines where fluidic channels are to be fabricated in the underlying glass substrate is defined on the etch-mask layer, which exposes the substrate in those regions. The substrate is selectively etched in an acid (e.g. concentrated hydrofluoric acid) to form the fluidic circuit channels. Thereafter, measurements are performed by profilometry to verify desired geometry; and, the remainder of the hard-mask is selectively etched away. Fluidic channels with depths and widths each in a range from about 100 nm to about 1 millimeter (mm, 1 mm=10−3 meters), spaces 20 nm or more apart, are readily formed for a large number of copies.
A second etch mask is fabricated photo-lithographically corresponding to counter-flow heat exchanger (CFHX) regions constituting the thermal functionalization in the same manner as for the fluidic circuit. The substrate is again etched in an acid, measurements are performed a second time by profilometry, and the etch mask is stripped from the substrate leaving the CFHX regions at an elevation slightly lower than that of the substrate plane. Once the desired profile is achieved, a CFHX liftoff pattern is photo-lithographically defined directly upon the substrate and thermally-conductive CFHX material is deposited and lifted off regions where it is not desired. Final measurements are taken to ensure that the relative elevation of all surfaces destined for bonding are nearly in plane with one another. CFHX films of thickness 50 microns and separations of 10 microns are readily deposited in desired patterns. For metal functional materials, even thinner layers of 5 to 10 micron thickness and 1 micron separation are readily deposited in a desired pattern. Optionally, a final oxygen plasma surface activation is performed to ease future bonding processes.
In example embodiments, the capping wafer is provided for bonding to the thermofluidic circuit wafer. A thermally insulating, optically transparent wafer such as glass is provided. The wafer is cleaned and holes are drilled where access to thermally functionalized fluidic circuitry is desired. The wafer can also be oxygen plasma surface activated to ease future bonding processes. Advantageously, this fabrication process allows for the potential production of optically transparent, JT microcoolers, enabling a variety of system configurations for devices used to cool focal plane arrays (FPA) and other photo-sensitive sensors or detectors.
In some embodiments, channels or functional material or both are disposed on the second substrate as well, before bonding, as described in more detail below for embodiments of a Joule-Thompson cryocooler with reference to
The thermal circuit includes thermal conduction elements 1020 that thermally link the fluid in channel 1012a to the fluid in 1012b. This exchange not only preconditions the pressured non-ideal gas in channel 1210a but also relieves thermal stresses in a substrate caused by larger temperature difference between fluids in the two channels. Thermal conduction affecting the non-ideal gas under pressure, and the efficiency of the cryocooler, also occurs along the length of the supply channels 1012a indicated by conduction length 1013. While good conduction through conduction elements 1020 is desirable, thermal conduction along conduction length 1013 is undesirable. Such conduction along length 1013 is reduced by avoiding contact with a conducting element along the full length 1013, e.g., by breaks in the thermally conductive material along the channel 1012a. The cooling provided by the adiabatic expansion of non-ideal gas at nozzle 1018 into reservoir 1016 is harvested by thermal conducting elements between at least a portion of the reservoir 1016 and the object to be cooled 1084, such as a focal plane array (FPA) and integrated circuit (IC).
Thermal conduction between channels is provided by depositing a thermally conductive thin layer 1120, called a thermal strap, in area 1131. In various embodiments the thermally conductive thin layer 1120 comprises polysilicon or a titanium/nickel alloy. Thermal conduction along channel 1112a is interrupted by not depositing the thermally conductive thin layer 1120 along repeated sections of channel 1112a outside the area 1131, such as at the turns. However, in some embodiments, thermal conduction along channel 1112a is acceptable; and, in some such embodiments, the area 1131 is expanded to cover all parts of the channels 1112a and 1112b.
An upper insert indicates a portion of substrate 1110 outside area 1131, with channels 1112a and 112b absent the thermally conductive thin layer. Fluid flow direction is indicated by arrows 1103. A lower insert indicates a portion of substrate 1110 inside area 1131 with channels 1112a and 112b coated by the thermally conductive thin layer 1120.
Thus, in some embodiments, a system is constructed with glass substrates in which the channels are coplanar with the substrate surface and run parallel to one another in the counter-flow heat exchange region of the device. A thermal strap 1120 comprised of a thin film of metal or other material of high thermal coefficient is used to replace a select portion of the wall separating portions of channels 1112a and 112b. For example, such a thermal strap 1120 that is a third of the depth and one half the width of the channels 1112a and 112b affords a heat transfer advantage as much as three orders of magnitude greater than the equivalent wall made of the substrate glass alone. Using thin film deposition processing also offers an extremely precision machined, high purity counter-flow heat exchanger which can be easily integrated with any co-planar micro-cooler fabrication process. These advantages allow the designer greater flexibility in making thicker and/or stronger supportive walls separating the high and low pressure channels.
In some example embodiments, the spreading of normally sharp thermal gradients is accomplished by patterning a wide thermal strap throughout the reservoir or at other locations. Phase-transition Joule-Thomson cooling involves chaotic flows and condensation patterns, which in turn create extreme divergence in heat flow patterns which have the potential to impart high levels of mechanical stress in the substrate material. In such cases, a thermal spreader circuit by use of a thermal strap would not only alleviate the stress, but can be tapped by a temperature probe to measure device condition and operability.
While particular embodiments have been described, it will be understood by those skilled in the art that various changes, omissions and/or additions may be made and equivalents may be substituted for elements thereof without departing from the spirit and scope of the embodiments. In addition, many modifications may be made to adapt a particular situation or material to the teachings of the embodiments without departing from the scope thereof. Therefore, it is intended that the embodiments not be limited to the particular embodiment disclosed as the best mode contemplated, but that all embodiments falling within the scope of the appended claims are considered. Moreover, unless specifically stated, any use of the terms first, second, etc., does not denote any order or importance, but rather the terms first, second, etc., are used to distinguish one element from another.
Number | Name | Date | Kind |
---|---|---|---|
3912557 | Hochberg | Oct 1975 | A |
4386505 | Little | Jun 1983 | A |
4392362 | Little | Jul 1983 | A |
4489570 | Little | Dec 1984 | A |
4781033 | Steyert et al. | Nov 1988 | A |
4785879 | Longsworth et al. | Nov 1988 | A |
4908112 | Pace | Mar 1990 | A |
5239200 | Messina et al. | Aug 1993 | A |
5249425 | Longsworth | Oct 1993 | A |
5382797 | Kunimoto et al. | Jan 1995 | A |
5611214 | Wegeng et al. | Mar 1997 | A |
5758822 | Yap | Jun 1998 | A |
5896922 | Chrysler et al. | Apr 1999 | A |
5920133 | Penswick et al. | Jul 1999 | A |
5974808 | Mangano et al. | Nov 1999 | A |
6041821 | Grossman | Mar 2000 | A |
6189433 | Harada | Feb 2001 | B1 |
6213194 | Chrysler et al. | Apr 2001 | B1 |
6463744 | Alexeev et al. | Oct 2002 | B1 |
6621071 | Sobel et al. | Sep 2003 | B2 |
7397661 | Campbell et al. | Jul 2008 | B2 |
7883901 | Kitazawa | Feb 2011 | B2 |
8141556 | Ruben | Mar 2012 | B2 |
20030102435 | Myers et al. | Jun 2003 | A1 |
20050230085 | Valenzuela | Oct 2005 | A1 |
20050244660 | Yuasa | Nov 2005 | A1 |
20060057407 | Sambasivan | Mar 2006 | A1 |
20060103751 | Lee | May 2006 | A1 |
20060231237 | Dangelo | Oct 2006 | A1 |
20060277481 | Forstall et al. | Dec 2006 | A1 |
20070101297 | Forstall et al. | May 2007 | A1 |
20070118813 | Forstall et al. | May 2007 | A1 |
20070157220 | Cordray et al. | Jul 2007 | A1 |
20070209371 | Sobel | Sep 2007 | A1 |
20070245749 | Atkins et al. | Oct 2007 | A1 |
20080022310 | Poling et al. | Jan 2008 | A1 |
20090073066 | Jordon et al. | Mar 2009 | A1 |
20090126373 | Burg | May 2009 | A1 |
20090193817 | Germain et al. | Aug 2009 | A1 |
20090258470 | Choi | Oct 2009 | A1 |
20090272270 | McGill | Nov 2009 | A1 |
20100262931 | Woods et al. | Oct 2010 | A1 |
20100283854 | McKaughan et al. | Nov 2010 | A1 |
20110010699 | Cooper et al. | Jan 2011 | A1 |
20110174467 | Herbst | Jul 2011 | A1 |
20120079838 | Bin-Nun et al. | Apr 2012 | A1 |
20120229959 | Holcomb | Sep 2012 | A1 |
20120309127 | Farooq et al. | Dec 2012 | A1 |
20130161705 | Disney | Jun 2013 | A1 |
20130180862 | Yoshida | Jul 2013 | A1 |
Number | Date | Country |
---|---|---|
0 337 802 | Oct 1989 | EP |
0916890 | May 1999 | EP |
11-324914 | Nov 1999 | JP |
4422977 | Mar 2010 | JP |
10-1999-0057578 | Jul 1999 | KR |
0001142 | Jan 2000 | WO |
2009057950 | May 2009 | WO |
2013016224 | Jan 2013 | WO |
Entry |
---|
Baine et al., “Thermal vias for SOI Technology,” Proc ICCCD International Conference on Communications, Computers and Devices, Kharagpur, India, 2000, p. 239-242. |
Pope et al., “Development of a Two-Stage Alternate Joule-Thomson Cryo-Cooler for AAWS-M Risk Reduction,” No. AMSMI-TR-RD-AS-91-22. Army Missile Command Redstone Arsenal AL Advanced Sensors Directorate, 1991, p. 1-22. |
Little et al., “Microminiature refrigeration,” AIP Conference Proceedings. vol. 985. No. 1. 2008. |
Pradeep et al., “Analysis of Performance of Heat Exchangers used in Practical Micro Miniature refrigerators,” Cryogenics 39.6 1999, p. 517-527. |
Lerou et al., “All Micromachined Joule-Thomson Cold Stage,” 2007 p. 437-441. |
Little et al., “Development of a Low Cost, Cryogenic Refrigeration System for Cooling of Cryoelectronics,” Advances in Cryogenic Engineering, Springer US, 1994, p. 1467-1474. |
Chorowski et al., “Development and Testing of a Miniature Joule-Thomson Refrigerator with Sintered Powder Heat Exchanger,” Advances in Cryogenic Engineering, Springer US, 1994, p. 1475-1481. |
Lyon et al., “Linear Thermal Expansion Measurements on Silicon from 6 to 340 K,” Journal of Applied Physics 48.3, 1977, p. 865-868. |
McConnell et al., “Thermal Conductivity of Doped Polysilicon Layers,” Microelectromechanical Systems, Journal of 10.3, 2001 p. 360-369. |
Kumar et al, “Some Studies on Manufacturing and Assembly Aspects of Miniature J-T Coolers with Specific Regard to the Performance for Small Heat Loads,” IJEST, Jan. 2011, pp. 660-664, vol. 3, No. 1, Metcalfe House Delhi, India. |
Tzabar et al., “Development of a Miniature Fast Cool Down J-T Cryocooler,” J-T and Sorption Cryocooler Developments, 2011, pp. 473-480, Int'l Cryocooler Conference, Inc., Boulder, CO. |
Zhu et al, “A Planar Glass/SI Micromachining Process for the Heat Exchanger in a J-T Cryosurgical Probe,” Dept. of Mech. Engineering, Feb. 2008, Madison, WI. |