INTEGRATED MULTI-CHANNEL RF CIRCUIT WITH PHASE SENSING

Abstract
A circuit is described herein. In accordance with one embodiment the circuit includes two or more RF channels, wherein each channel includes an input node, a phase shifter and an output node. Each channel is configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node. The circuit further includes an RF combiner circuit that is coupled with the outputs of the RF channels and configured to generate a combined signal representing a combination of the RF output signals, and a monitor circuit that includes a mixer and is configured to receive and down-convert the combined signal using an RF reference signal. Thus a mixer output signal is generated that depends on the phases of the RF output signals.
Description
FIELD

The present disclosure relates to the field of radio frequency (RF circuits), particularly to a multi-channel RF circuit with multiple RF output channels.


BACKGROUND

Modern radar devices such as radar range and velocity sensors can be integrated in so-called monolithic microwave integrated circuits (MMICs). Radar sensors may be applied, for example, in the automotive sector, where they are used in so-called advanced driver assistance systems (ADAS) such as, for example, “adaptive cruise control” (ACC) or “radar cruise control” systems. Such systems may be used to automatically adjust the speed of an automobile so as to maintain a safe distance from other automobiles travelling ahead. However, RF circuits are also used in many other fields such as RF communication systems.


A radar MMIC (sometimes referred to as single chip radar) may incorporate all core functions of the RF frontend of a radar transceiver (e.g., local oscillator, power amplifiers, low-noise amplifiers (LNA), mixers, etc.), the analog preprocessing of the intermediate frequency (IF) or base band signals (e.g., filters, amplifiers, etc.), and the analog-to-digital conversion in one single package. The RF frontend usually includes multiple reception and transmission channels, particularly in applications in which beam steering techniques, phased antenna arrays, etc. are used. In radar applications, phased antenna arrays may be employed to sense the incidence angle of incoming RF radar signals (also referred to as “Direction of Arrival”, DOA).


For example, when using a phased antenna array to radiate a radar signal, the phase shift and/or amplitude gain caused by each output channel needs to be known.


SUMMARY

A circuit is described herein. In accordance with one embodiment the circuit includes two or more RF channels, wherein each channel includes an input node, a phase shifter and an output node. Each channel is configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node. The circuit further includes an RF combiner circuit that is coupled with the outputs of the RF channels and configured to generate a combined signal representing a combination of the RF output signals, and a monitor circuit that includes a mixer and is configured to receive and down-convert the combined signal using an RF reference signal. Thus a mixer output signal is generated that depends on the phases of the RF output signals.


In accordance with a further embodiment the circuit includes one or more RF channels, wherein each channel includes an input node and an output node and is configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node. The circuit further includes a monitor circuit that includes a mixer configured to mix an RF reference signal and an RF test signal, which represents the RF output signal, to generate a mixer output signal. An analog-to-digital converter is configured to sample the mixer output signal in order to provide a sequence of sampled values. A circuit is coupled to the analog-to-digital converter and configured to provide a sequence of phase offsets by phase-shifting at least one of the RF test signal and the RF reference signal using one or more phase shifters; to calculate a spectral value from the sequence of sampled values; and to calculate an estimated phase information indicating the phase of the RF output signal based on the spectral value.


Furthermore, a method is described herein. In accordance with one embodiment, the method includes receiving an RF oscillator signal and providing the RF oscillator signal to two or more RF channels of an RF circuit, wherein each channel generates an RF output signal based on the RF oscillator signal, and wherein each RF output signal has an amplitude and a phase. The method further includes a generation of a combined signal that represents a combination of the RF output signals and a down-conversion of the combined signal using an RF reference signal supplied to a mixer, wherein the mixer output signal is the down-converted signal. Moreover, the method includes processing the mixer output signal to obtain estimated values indicative of the amplitudes and/or phases of the RF output signals.


In accordance with a further embodiment, the method includes providing an RF test signal to a radar transmitter circuit; mixing an RF reference signal and an RF test signal, which represents an RF output signal of the radar transmitter circuit, to generate a mixer output signal. The method further includes repeatedly selecting a phase offset from a sequence of phase offsets and applying the selected phase offset by phase-shifting at least one of the RF test signal and the RF reference signal. The mixer output signal is sampled to generate a sequence of sampled values associated with the corresponding sequence of phase offsets, and a spectral value is calculated from the sequence of sampled values. Based on this spectral value, an estimated phase information indicating a phase of the RF output signal can be calculated.


Moreover, a radar microwave integrated circuit (MMIC) is described herein. In accordance with on embodiment, the radar MMIC includes two or more transmit channels, wherein each transmit channel includes an input node, a phase shifter and an output node. Each transmit channel is configured to receive an RF oscillator signal at the input node and to provide, as RF output signal, a frequency-modulated RF radar signal at the output node. The MMIC further includes an RF combiner circuit that is coupled with the outputs of the RF channels and configured to generate a combined signal representing a combination of the RF output signals, and a monitor circuit that includes a mixer and is configured to receive and down-convert the combined signal using an RF reference signal. Thus a mixer output signal is generated that depends on the phases of the RF output signals.





BRIEF DESCRIPTION OF THE DRAWINGS

The invention can be better understood with reference to the following drawings and descriptions. The components in the figures are not necessarily to scale; in-stead emphasis is placed upon illustrating the principles of the invention. Moreover, in the figures, like reference numerals designate corresponding parts. In the drawings:



FIG. 1 is a drawing illustrating the operating principle of a frequency-modulated continuous-wave (FMCW) radar system for distance and/or velocity measurement.



FIG. 2 includes two timing diagrams illustrating the frequency modulation of the radio frequency (RF) signal used in FMCW radar systems.



FIG. 3 is a block diagram illustrating the basic structure of an FMCW radar device.



FIG. 4 is a circuit diagram illustrating one example of an analog RF frontend, which may be included in the FMCW radar device of FIG. 3.



FIG. 5 is a block diagram illustrating one example of a monitor circuit that may be used to sense the phase lags and gains caused by two or more RF channels of an RF circuit.



FIG. 6 is a diagram illustrating one example of a measurement sequence for measuring phases and signal amplitudes of the RF output signals of a multi-channel RF circuit using a circuit in accordance with the embodiments described herein.



FIG. 7 includes timing diagrams illustrating the purpose and function of the circuit of FIG. 5 in more detail.



FIG. 8 is a block diagram illustrating one exemplary implementation of the example of FIG. 5.



FIG. 9 is a block diagram illustrating a general example of an RF circuit with multiple RF channels providing multiple RF output signals, a monitor circuit that may be used to sense phases and amplitudes of the RF output signals, and a control circuit for controlling measurement sequences that may be performed by the monitor circuit.



FIGS. 10A and 10B show equations that illustrate one scheme, according to which phases of the RF output channels may be successively inverted during one measurement cycle in the RF circuit of FIG. 1.



FIGS. 11A and 11B show equations that illustrate an alternative scheme equivalent to the scheme of FIGS. 10A-10B, according to which the phases of the RF output channels may be successively inverted during one measurement cycle in the RF circuit of FIG. 1.



FIG. 12 is a flow chart illustrating one exemplary method for measuring amplitudes and phases of the RF output signals of different RF channels.



FIG. 13 is a block diagram illustrating another example of a monitor circuit that may be used to successively sense the phase lags and gains caused by two or more RF channels of an RF circuit.



FIG. 14 includes diagrams illustrating a first example of a sequence of measured values and corresponding weight factors used for calculating a corresponding spectral value.



FIG. 15 includes diagrams illustrating a second example of a sequence of measured values and corresponding weight factors used for calculating a corresponding spectral value.



FIGS. 16 and 17 include tables with different phase shifter settings used when obtaining a sequence of measured values.





DETAILED DESCRIPTION

Embodiments of the present invention are discussed below in the context of a radar transmitter or transceiver. It should be noted, however, that the present invention may also be applied in applications different from radar such as, for example, RF transceivers of RF communication devices. In fact, almost any RF circuitry with multiple RF channels may take advantage of the concepts described herein.



FIG. 1 illustrates a conventional frequency-modulated continuous-wave (FMCW) radar system 1. In the present example, separate transmission (TX) and reception (RX) antennas 5 and 6, respectively, are used. However, it is noted that a single antenna can be used so that the transmission antenna and the reception antenna are physically the same (monostatic radar configuration). The transmission antenna continuously radiates an RF signal sRF(t), which is frequency-modulated, for example, by a periodic linear frequency ramp signal (also referred to as frequency sweep or chirp signal). The transmitted signal sRF(t) is back-scattered at a target T, which is located in the radar channel within the measurement range of the radar device. The back-scattered signal yRF(t) is received by the reception antenna 6. In the depicted example, the back-scattered signal is denoted as yRF(t).



FIG. 2 illustrates the mentioned frequency-modulation of the signal sRF(t). As shown in the first diagram of FIG. 2, the signal sRF(t) may be composed of a series of “chirps”, i.e., a sinusoidal waveform with increasing (up-chirp) or decreasing (down-chirp). In the present example, the instantaneous frequency f(t) of a chirp increases linearly from a start frequency fSTART to a stop frequency fSTOP within a defined time span TRAMP (see second diagram of FIG. 2). Such a chirp is also referred to as a linear frequency ramp. Three identical linear frequency ramps are illustrated in FIG. 2. It is noted, however, that the parameters fSTART, fSTOP, TRAMP as well as the pause between the individual frequency ramps may vary dependent on the actual implementation and use of the radar device 1. In practice, the frequency variation may be, for example, linear (linear chirp, frequency ramp), exponential (exponential chirp) or hyperbolic (hyperbolic chirp).



FIG. 3 is a block diagram that illustrates an exemplary structure of a radar device 1 (radar sensor). It is noted that a similar structure may also be found in RF transceivers used in other applications such as, for example, in wireless communications systems. Accordingly, at least one transmission antenna 5 (TX antenna) and at least one reception antenna 6 (RX antenna) are connected to an RF frontend 10, which may be integrated in a monolithic microwave integrated circuit (MMIC). The RF frontend 10 may include all the circuit components needed for RF signal processing. Such circuit components may (but need not necessarily) include, for example, a local oscillator (LO), RF power amplifiers, low noise amplifiers (LNAs), directional couplers such as rat-race-couplers and circulators, and mixers for the down-conversion of RF signals (e.g., the received signal yRF(t), see FIG. 1) into the base-band or an intermediate frequency (IF) band. It is noted that antenna-arrays may be used instead of single antennas. The depicted example shows a bistatic (or pseudo-monostatic) radar system which has separate RX and TX antennas. In the case of a monostatic radar system, a single antenna or a single antenna array may be used to both receive and transmit electromagnetic (radar) signals. In this case, a directional coupler (e.g., a circulator) may be used to separate RF signals to be transmitted to the radar channel from RF signals received from the radar channel. In practice, radar systems often include several transmission (TX) and reception (RX) channels, which among others allows the measurement of the direction (DoA, direction of arrival), from which the radar echoes are received.


In the case of a frequency-modulated continuous-wave (FMCW) radar system, the transmitted RF signals radiated by the TX antenna 5 are in the range between approximately 20 GHz (e.g., 24 GHz) and 100 GHz (e.g., 77 GHz in automotive applications). As mentioned, the RF signal yRF(t) received by the RX antenna 6 includes the radar echoes, i.e., the signal back-scattered at the so-called radar targets. The received RF signals yRF(t) are down-converted into the base band (or IF band) and further processed in the base band using analog signal processing (see FIG. 3, base-band signal processing chain 20), which basically includes filtering and amplification of the base-band signal. The base-band signal is finally digitized using one or more analog-to-digital converters (ADC) 30 and further processed in the digital domain (see FIG. 3, digital signal processing chain implemented, e.g., in digital signal processor, DSP, 40). The overall system is controlled by a system controller 50, which may be at least partly implemented using a processor, such as a microcontroller executing appropriate firmware. The RF frontend 10 and the analog base-band signal processing chain 20 (and optionally the ADC 30) may be integrated in a single MMIC. However, in some applications, some components may also be distributed among two or more integrated circuits.



FIG. 4 illustrated one exemplary implementation of the RF frontend 10, which may be included in the radar sensor shown in FIG. 3. It is noted that FIG. 4 is a simplified circuit diagram illustrating the basic structure of an RF frontend. Actual implementations, which may heavily depend on the application, are of course more complex and include several RX and/or TX channels. The RF frontend 10 includes a local oscillator 101 (LO) that generates a RF signal sLO(t), which may be frequency-modulated as explained above with reference to FIG. 2. The signal sLO(t) is also referred to as LO signal. In radar applications, the LO signal is usually in the SHF (Super High Frequency) or the EHF (Extremely High Frequency) band, e.g., between 76 GHz and 81 GHz in automotive applications.


The LO signal sLO(t) is processed in the transmission signal path as well as in the reception signal path. The transmission signal sRF(t) (outgoing radar signal), which is radiated by the TX antenna 5, is generated by amplifying the LO signal sLO(t), e.g., using an RF power amplifier 102. The output of the amplifier 102 is coupled to the TX antenna 5. The received signal yRF(t) (incoming radar signal), which is provided by the RX antenna 6, is directed to a mixer 104. In the present example, the received signal yRF(t) (i.e., the antenna signal) is pre-amplified by RF amplifier 103 (gain g), so that the mixer receives the amplified signal g yRF(t) at its RF input port. The mixer 104 further receives the LO signal sLO(t) at its reference input port and is configured to down-convert the amplified signal g yRF(t) into the base band. The resulting base-band signal at the mixer output is denoted as yBB(t). The base-band signal yBB(t) is further processed by the analog base band signal processing chain 20 (see also FIG. 3), which basically includes one or more filters (e.g., a band-pass 21) to remove undesired side bands and image frequencies as well as one or more amplifiers such as amplifier 22). The analog output signal, which may be supplied to an analog-to-digital converter (cf. FIG. 3), is denoted as y(t). Various techniques for the digital post-processing of the digitized output signals (digital radar signal) are as such known (e.g., Range Doppler Analysis) and thus not further explained herein.


In the present example, the mixer 104 down-converts the RF signal gyRF(t) (amplified antenna signal) into the base band. The respective base band signal (mixer output signal) is denoted by yBB(t). The down-conversion may be accomplished in a single stage (i.e., from the RF band into the base band) or via one or more intermediate stages (from the RF band into an IF band and subsequently into the base band). In view of the example of FIG. 4, it is clear that the quality of the radar measurement will heavily depend on the quality of the LO signal sLO(t). Low phase noise, as well as steep and highly linear frequency ramps are desired properties of the LO signal sLO(t).



FIG. 5 is a block diagram illustrating one example of an RF circuit with multiple RF channels for generating multiple RF output signals. In the present example, two transmission channels TX01 and TX02 of a radar sensor are considered as one illustrative application. The concept can be generalized to a system with c channels. However, for a better understanding, one exemplary embodiment with two channels TX01, TX02, will be described first with reference to FIGS. 5 to 8 and equation 1 to 22, whereas FIGS. 9 to 11 and equations 23 to 24 relate to a general embodiment with c channels TX01, TX02, TXc. Furthermore, it is understood that the concept described below may readily be employed in other applications than radar. Furthermore, it is noted that the circuit of FIG. 5 can readily be enhanced to more than two channels (see also FIG. 7). In the present example, each channel TX1 and TX2 is configured to receive, at its input, an RF oscillator signal sLO(t), which may be provided from a local oscillator (see, e.g., FIG. 4, local oscillator 101). Each channel TX1 and TX2 may include a phase shifter 105 for manipulating the overall phase lags caused by channels. The RF output signals of the channels TX01 and TX02 are denoted as sTX01(t) and sTX02(t), respectively. In each channel TX01, TX02 the signal path from the input to the output includes signal lines and one or more circuit components that may cause a phase lag. As a consequence, the output signals can be written as follows:






s
TX01(t)=ATX01·cos(2πfLOt+φTX01+ΔφTX01)  (1)






s
TX02(t)=ATX02·cos(2πfLOt+φTX02+ΔφTX02)  (2)


Thereby, the variables ATX01 and ATX02 denote the amplitudes of the RF output signals sTX01(t) and sTX02(t), and the frequency fLO is the frequency of the RF oscillator signal sLO(t). The phases φTX01 and φTX02 represent the phase lag caused by the channels TX01 and TX02, respectively, without considering phase shifters 105, whereas ΔφTX01 and ΔφTX02 denote the additional the phase shifts caused by the phase shifters 105.


At this point it is noted that the phases φTX01 and φTX02 as well as the amplitudes ATX01 and ATX02 heavily depend on the operating conditions of the system. For example, depending on which of the channels TX01 and TX02 is active, the temperature of the chip (e.g., the MMIC) will vary due to the power losses caused in the active channel(s). When both channels, TX01 and TX02, are active (i.e., outputting an RF signal) the temperature will be much higher as compared to the case, in which only one channel, TX01 or TX02, is active. Amplitudes and phases of the RF output signals sTX01(t) and sTX02(t) are temperature dependent. For example, in beam forming applications (in which the results of amplitude and phase measurement are applied) both channels TX01 and TX02 are active (transmitting), which causes the temperature to rise to a specific value and thus particular amplitude and phase values. Amplitude and values shifts measured in a configuration, in which only one of the channels (TX01 or TX02) is active, would be different and thus incorrect (as the configuration which only one active channel does not resemble the beamforming application. Accordingly, it may be important to allow measurement of amplitude and phase values while both of the channels are active.


As mentioned, each channel TX01, TX02 includes a phase shifter 105, which are configured to generate additional phase shift values ΔφTX01 and ΔφTX02 (phase lags), which contribute to the phases of the RF output signals sTX01(t) and sTX02(t). Furthermore, each channel TX01, TX02 may include an RF amplifier 102 (e.g., a power amplifier, PA). In this case, the amplitudes ATX01 and ATX02 of the RF output signals sTX01(t) and sTX02(t) depend on the gains of the RF amplifiers 102. In accordance with one specific example, the phase shifters 105 may be implemented using IQ modulators (In-Phase/Quadrature modulators, also referred to as Quadrature modulators). Digital-to-analog converters (not shown) may be used to convert digital values representing the phase shift values ΔφTX01 and ΔφTX02 into analog signals that can be processed by the IQ modulators.


In some applications (e.g., for the system controller 50 or a radar sensor, see FIG. 3) it may be desirable to know the phases of the RF output signals of the different channels, e.g., relative to each other or relative to a reference phase. For example, the channels TX01 and TX02 may be transmission channels of a radar sensor device and the phases of the RF output signals will be tuned to specific values to achieve a desired radiation angle. As the absolute phase lags caused by the circuit components (e.g., the amplifiers 102) included in the channels TX01 and TX02 may be temperature dependent and may also be subject to production tolerances and aging, the respective phases φTX01 and φTX02 need to be tuned or monitored, which may be accomplished by the phase shifters 105 included in the channels TX01, TX02. In order to be able to monitor the phases φTX01 and φTX02 of the RF output signals sTX01(t) and sTX02(t), a monitor circuit 150 (including, e.g., phase shifter 106 and mixer 107, see FIG. 5) is provided that is used to sense the phases φTX01 and φTX02 and thus to detect a possible maladjustment of the phases. In the event that the measured phases φTX01 and φTX02 deviates from a desired setting, the phase shifters 105 may be used to compensate for the deviation by adding additional phase shifts ΔφTX01 and ΔφTX02.


In the example shown in FIG. 5, the RF output signals sTX01(t) and sTX02(t) are tapped and supplied to an RF combiner circuit 110, which may be configured to combine the RF output signals sTX01(t) and sTX02(t). For example, the combined signal sSUP(t) may be a superposition of the RF output signals such as






s
SUP(t)=gSUP·(sTX01(t)+sTX02(t)),  (3)


wherein gSUP is a defined gain (usually significantly smaller than 1). However, for the present considerations we may assume that gSUP is 1 without loss of generality and thus the combined signal can be written as:






s
SUP(t)=ATX01·cos(2πfLOt+φTX01+ΔφTX01)+ATX02·cos(2ηfLOt+φTX02+ΔφTX02).   (4)


The monitor circuit 150 includes a mixer 107 receiving the combined signal sSUP(t) at its RF port and configured to down-convert the combined signal sSUP(t) using the RF oscillator signal sLO(t). As, in the present embodiment, all RF signals have the same frequency fLO, the mixer output signal will be a DC value sDC(t) that depends on the phases of φTX01+ΔφTX01 and ΔφTX02+ΔφTX02 of the RF output signals sTX01(t) and sTX02(t). In the present example, the mixer 107 receives a phase shifted version of the RF oscillator signal sLO(t); the phase-shifted oscillator signal can thus be expressed as






s
TSG(t)=ATSG·cos(2πfLOt+φTSG),  (5)


wherein ATSG is the known signal amplitude and φTSG the phase of the signal sTSG(t) received at the reference port of the mixer 107. The phase φTSG may be set by a phase shifter 106 coupled to the reference port of the mixer 107 upstream thereto. In other embodiments, the frequency fTSG of the signal sTSG(t) may be different from fLO (i.e., fTSG≠fLO) and, as a consequence, the mixer output signal is not a DC signal but rather an intermediate frequency (IF) signal sIF(t) having a frequency fIF corresponding to the difference fLO−fTSG.


Without loss of generality, amplitude ATSG is assumed to equal 2; a different amplitude will only cause a respective scaling of the measured signal amplitudes. Using equations 4 and 5 and ATSG=2, the mixer output signal sDC(t) provided at the output port of the mixer 107 can be expressed as






s
DC(t)=sLO(tsSUP(t)=(ATX01·cos((φTSG−φTX01−ΔφTX01)+ATX02·cos(φTSG−φTX02−ΔφTX02))+(ATX01·cos(4πfLOt+φTX01+ΔφTX01)+ATX02·cos(4πfLOt+φTX02+ΔφTX02)),  (6)


wherein the summands representing an oscillation at the double frequency 2fLO (angular frequency 4fLO) can be neglected as they are outside of the mixer bandwidth. Accordingly, the mixer output signal sDC(t) can be written as:






s
DC(t)≈(ATX1·cos(φTSG−φTX1−ΔφTX01)+ATX02·cos(φTSG−φTX02−ΔφTX02)).  (7)


Accordingly, the mixer output signal is a DC signal that depends on the cosines of the phase-differences φTSG−φTX1−ΔφTX01 and φTSG−φTX2−ΔφTX02, the amplitudes ATX1 and ATX2. Without loss of generality, for the subsequently described measurements of the of the mixer output signal sDC(t) the phase shift values ΔφTX01 and ΔφTX02 are assumed to be either 0 or π rad, i.e., 0 or 180 degrees. According to the herein described examples, measurements may be made by acquiring discrete samples of the mixer output signal sDC(t) at sampling times tk,0, tk,1, and tk,2. The index k denotes the measurement cycle (k=1, 2, 3, . . . ).


The measured DC values (sampled values) of the mixer output signal sDC(t) may be used to calculate the sought phase values φTX01 and φTX02 and amplitude values ATX01 and ATX02 as explained below. As mentioned above, the phase φTSG can be set by the phase shifter 106 included in the monitor circuit 150. For a defined value of the phase φTSG the following three measurement values can be obtained






s
DC(tk,0)=(ATX01·cos(φTSG−φTX01−0)+ATX02·cos((φTSG−φTX02−0)),  (8)






s
DC(tk,1)=(ATX01·cos(φTSG−φTX01−0)+ATX02·cos(φTSG−φTX02−π)),  (9)






s
DC(tk,2)=(ATX01·cos(φTSG−φTX01−π)+ATX02·cos((φTSG−φTX02−0)).  (10)


The first value sDC(tk,0) is equal to equation 6 for the measurement time t=tk,0. For the measurement of the second value sDC(tk,1) an additional phase shift of 180 degree (i.e., π rad) is generated in channel TX02. This may be accomplished by temporarily increasing the phase lag caused by phase shifter 105 in the channel TX02 by 180 degrees. For the measurement of the third value sDC(tk,2) an additional phase shift of 180 degree (i.e., π rad) is generated in channel TX01. This may be accomplished by temporarily increasing the phase lag caused by phase shifter 105 in channel TX01 by 180 degrees (analogously to channel TX02). Accordingly, three samples sDC(tk,0), sDC(tk,1), and sDC(tk,2) are acquired in each measurement cycle in the present example of two channels. As shown later, n+1 samples are acquired in each measurement cycle in the general example with c channels. It is noted, however, that, in the present case with only two channels, the third measurement is redundant and thus optional. However, the third measurement allows a plausibility check for the measured values.


The Identity





cos(φ−π)≡cos(φ+π)≡−cos(φ)  (11)


can be used to simplify equations 9 and 10. Accordingly, the second and the third value (see equations 9 and 10) can be expressed as






s
DC(tk,1)=(ATX01·cos((φTSG−φTX01)−ATX02·cos((φTSG−φTX02)), and  (12)






s
DC(tk,2)=(−ATX01·cos((φTSG−φTX01)+ATX02·cos((φTSG−φTX02)),  (13)


respectively. Adding equations 8 and 12 and equations 8 and 13 yields the measured values






M
01[k]=(sDC(tk,0)+sDC(tk,1))=2ATX01·cos(φTSG−φTX01), and  (14)






M
02[k]=(sDC(tk,0)+sDC(tk,2))=2ATX02·cos(φTSG−φTX02).  (15)


As mentioned above, the acquisition of the third sample sDC,2(tk) (equation 15) is redundant in the present embodiment as subtracting equation 12 from equation 8 yields the same result as equation 15:






M
02[k]=(sDC(tk,0)−sDC(tk,1))=2ATX02·cos((φTSG−φTX02).  (16)


The value M01[k] only depends on the phase difference φTSG−φTX01 and the amplitude ATX01 of the RF output signal sTX01(t) of channel TX01. Similarly, the value M02[k] only depends on the phase difference φTSG−φTX02 and the amplitude ATX02 of the RF output channel sTX02(t) of channel TX02. It is noted that the term “measured value” or “sampled value” is used for the values M01[k] and M02[k], which are, in fact, not directly measured but calculated based on the sampled mixer output values sDC(tk,0), sDC(tk,1) and sDC(tk,2). Nevertheless, those values M01[k] and M02[k] are regarded as an (intermediate) result of the measurement described herein and thus referred to as “measured values” which represent samples of the RF output signals sTX01(t), sTX01(t) of the RF channels TX01, TX02. As will be shown later c values M01[k], M02[k], . . . , Mc[k] can be calculated in an example with c channels TX01, TX02, . . . , TXc.


If the amplitudes ATX01 and ATX02 are measured separately (e.g., by using power sensors coupled to the outputs of channels TX01 and TX02), the sought phases φTX01 and φTX02 can be directly calculated from the measured values M01[k] and M02[k] obtained in one measurement cycle. However, the measurements may be repeated for different values φTSG; the phase value provided by phase shifter 106 in the k-th measurement cycle is denoted as φTSG[k]. Thus, the measured values of equations 14 and 15 become






M
01[k]=2ATX01·cos(φTSG[k]−φTX01), and  (17)






M
02[k]=2ATX02·cos(φTSG[k]−φTX02).  (18)


Theoretically, four measured values, for example M01[k], M02[k], M01[k+1] and M02[k+1] obtained in the measurement cycles k and k+1, would be sufficient to calculate the sought phases φTX01 and φTX02 and amplitudes ATX01 and ATX02, provided that φTSG[k+1]≠φTSG[k]. In practice, a plurality of measured values can be obtained in a plurality of measurement cycles for different phase values φTSG[k] and used to estimate the sought phases φTX01 and φTX02 and amplitudes ATX01 and ATX02 with improved precision.


The diagram of FIG. 6 illustrates the measured values M01[k] and M02[k] for a sequence of measurement cycles, wherein φTSG[k]=kπ/5 and k=0, 1, . . . 10. That is, the phase φTSG provided by the phase shifter 106 is increased from zero degrees in steps of 36 degrees up to 360 degrees. The measured values M01[0], M01[1], . . . , M01[10] can be used to estimate amplitude ATX01 and phase φTX01 using equation 17 as signal model and any suitable estimation technique such as a non-linear least mean squares (LMS) method. Similarly, the measured values M02[0], M02[1], . . . , M02[10] can be used to estimate amplitude ATX02 and phase φTX02 using equation 18 as signal model. In one specific example, a Fourier transform algorithm such the Fast Fourier Transform (FFT) is used for the estimation of amplitudes and phases. In this case, the phase φTSG[k] may be increased in each measurement cycle using a constant step size; alternatively, the measured sequences may be resampled to obtain equidistant sampling points.


The measurement sequence shown in FIG. 6 is further illustrated by the timing diagrams of FIG. 7. FIG. 7 includes timing diagrams illustrating the phase shift values φTSG[k], ΔφTX01, and ΔφTX02 generated by the phase shifter 106 of the monitor circuit 105 the phase shifter 105 of the first channel TX01, and the phase shifter 105 of the second channel TX02, respectively. The start time of the measurement cycles is denoted as tk, and the corresponding phase value generated by phase shifter 106 as φTSG[k], wherein k=0, 1, 2, 3, etc. As shown in previous FIG. 6, the phase φTSG[k] is increased in each measurement cycle. In the present example, the step size is π/5 rad (i.e., 36 degrees), and thus φTSG[k]=kπ/5.


Three samples of the mixer output signal sDC(t) are sampled in each measurement cycle, that is sDC,0[k], sDC,1[k], and sDC,2[k], wherein (cf. equations 8-10)






s
DC,0[k]=sDC(tk)=sDC(tk,0),  (19)






s
DC,[k]=sDC(tk+Δt1)=sDC(tk,1),  (20)






s
DC,2[k]=sDC(tk+Δt2)=sDC(tk,2).  (21)


In FIG. 4 the sampling times are shown for the measurement cycle k=4. The phase shifts ΔφTX01, and ΔφTX02 generated by the phases shifters 105 in channels TX01 and TX02 alternate between 0 and r rad (i.e., 180 degrees) in such a manner that—at the sampling time tk+Δt2—the phase lag caused by channel TX02 is inverted (i.e., φTX02→φTX02±π), while the phase lag caused by channel TX01 is left unchanged and that—at the sampling time tk+Δt1—the phase lag caused by channel TX01 is inverted (i.e., φTX01→φTX01±π), while the phase lag caused by channel TX02 is left unchanged. The three samples obtained in each measurement cycles can be used to calculate the measured values M01[k] and M02[k], for example, in accordance with equations 14 and 15. Subsequently, the measured values M01[k] and M02[k] (for k=1, 2, 3, etc.) can be used to estimate the sought amplitude values ATX01 and ATX02 and phase values φTX01 and φTX02.


It is noted that the time spans Δt1 and Δt2 are not necessarily constant throughout the measurement cycles k. Further, the time instants tk are not necessarily equidistant in time as there is no need for a synchronous sampling in accordance with a clock signal. In each measurement cycle, the value sDC,0[k] may be sampled once the phase value φTSG[k] has been updated, the value sDC,1[k] may be sampled once the phase φTX02 has been inverted, and the value sDC,2[k] may be sampled once the phase φTX01 has been inverted and the inversion of phase φTX02 has been undone. Subsequently, the phase value φTSG[k] is updated and the next cycle starts (k→k+1).



FIG. 8 illustrates one exemplary implementation of the previous example of FIG. 5 in more detail. The example of FIG. 8 is substantially the same as the previous example of FIG. 5; however, the implementation of the RF combiner circuit 110 is shown in more detail as well as the analog-to-digital converter 31 used to digitize the mixer output signal sDC(t). In accordance with the present example, the combiner circuit 110 as shown in previous FIG. 5 is implemented using a power combiner 108 (e.g., a Wilkinson power combiner that provides a linear combination of the signals) and directional couplers 109 (e.g., rat-race couplers, circulators, or the like), wherein one coupler is arranged in each channel TX01 and TX02, and configured to direct a fraction of the power of the respective output signal sTX01(t) and sTX02(t) to the inputs of the power combiner 108. The signals branched-off at the outputs of the channels TX01 and TX02 by the couplers 109 are denoted as sTX01′(t) and sTX02′(t), wherein s′TX01(t)=gCsTX01(t) and s′TX02(t)=gCsTX02(t) and gC is the transmission coefficient of the coupler with regards to the branched-off signal. Usually gC is significantly lower than 1, while the transmission coefficient with regards to the antenna signal is approximately 1. The power combiner 108 essentially provides the (e.g., scaled) sum of the input signals, that is






s
SUP(t)=gCOMB·(sTX01′(t)+sTX02′(t))=gSUP·((sTX01(t)+sTX02(t)),  (22)


wherein the gain gSUP equals gCOMB·gC. Accordingly, the combined signal sSUP(t) is substantially a scaled version of the sum of the channel output signals sTX01(t) and sTX02(t) (see also equation 3). However, as mentioned above, the gain gSUP may be assumed to be 1 for the present discussion without loss of generality. Apart from the RF combiner circuit 110, which is implemented by the couplers 109 and the RF power combiner 108, the example of FIG. 8 is the same as the example of FIG. 5 and reference is made to the explanations above.


As already indicated above, the concept described above with regards to two channels TX01 and TX02 may be readily extended to c channels TX01, TX02, . . . , TXc, wherein c>2. In this case the RF combiner circuit 110 (see FIG. 5) or the RF power combiner 108 (see FIG. 8) has c inputs. Alternatively, several power combiners may be cascaded to combine the desired number of RF signals. Irrespective of the implementation of the RF combiner circuit 110 the combined signal sSUP(t) can be regarded as a (scaled) superposition of the RF output signals sTX01(t), sTX02(t), . . . sTXc(t). This situation is illustrated in the example of FIG. 9. Examples of phase switching schemes, which may be used in each measurement cycle, are explained with reference to FIGS. 10 and 11.


According to the example of FIG. 9, an RF circuit includes a plurality of channels TX01, TX02, . . . , TXc configured to receive the RF oscillator signal sLO(t) and the respective phase shift values ΔφTX01, ΔφTX02, . . . , ΔφTXc for the phases shifters 105 (see FIG. 5), and to provide the respective RF output signals sTX01(t), sTX02(t), sTXc(t). Each of the RF output signals is characterized by an amplitude ATX01, ATX02, . . . , ATXc, and a phase φTX01, φTX02, . . . , φTXc, which are to be estimated using the concept described herein, that is:












s

TX





01




(
t
)


=


A

TX





01


·

cos


(


2

π






f
LO


t

+

ϕ

TX





01


+

Δϕ

TX





01



)


















s
TXc



(
t
)


=


A
TXc

·


cos


(


2

π






f
LO


t

+

ϕ
TXc

+

Δϕ
TXc


)


.







(
23
)







The above-mentioned combined signal sSUP(t) is supplied to the monitor circuit 150 which is configured to down-convert the combined signal sSUP(t) as explained above with reference to FIGS. 5 and 8. The mixer output signal sDC(t) may be digitized and provided as digital signal. As also explained with reference to FIG. 5, the monitor circuit receives a phase value φTSG[k] which determines the phases of the RF local oscillator signal sTSG(t) used for the down-conversion (see equation 5).


The RF circuit of FIG. 9 may include a control circuit 120 which may include, for example, a programmable processor such as a (e.g., embedded) micro controller or a similar device. The functions provided by the controller circuit 120 may be (e.g., fully or partly) provided by the system controller 50 (see FIG. 3). Additionally or alternatively, the functions provided by the controller circuit 120 may be at least partly be provided by the DSP 40 (see FIG. 3). As such the controller circuit 120 in FIG. 9 represents a portion of the functions of the system controller 50 and/or the DSP 40. In an alternative embodiment, the controller circuit 120 may be implemented in the same MMIC as the monitor circuit 150 and the channels TX01, TX02, etc., but separate from the system controller 50.


As mentioned above, three samples sDC,0[k], sDC,1[k] and sDC,2[k] are acquired—in each measurement cycle k—in case of two channels and c+1 samples in case of c channels sDC,0[k], sDC,1[k], . . . , sDC,c[k]. Theoretically a single measurement cycle is sufficient to determine the phase values φTX01, φTX02, . . . , φTXc associated with the c channels TX01, TX02, . . . , TXc, and at least two measurement cycles are needed to determine the phase values φTX01, φTX02, . . . , φTXc and the respective amplitude values ATX01, ATX02, . . . , ATXc. In practice, however, a plurality of measurement cycles are performed in order to improve the quality of phase and amplitude estimation. In one illustrative exemplary embodiment, 64 measurement cycles are performed which allows the use of a 64 point FFT (Fast Fourier Transform) algorithm to estimate phase and amplitude values of each channel.


The controller circuit 120 may be configured to provide the phase shift values ΔφTX01, ΔφTX02, . . . , ΔφTXc for the phases shifters 105 of the channels TX01, TX02, . . . , TXc as well as the phase value φTSG[k] for the phases shifter 106 of the monitor circuit 150. Furthermore, the control circuit may generate a trigger signal STRIG used to trigger the analog-to-digital converter 31 included in the monitor circuit 150 at the desired sampling times (e.g., times tk,0=tk, tk,1=tk+Δt1, tk,2=tk+Δt2, etc.). In particular, the controller circuit 120 may be configured to control the data acquisition during a plurality of measurement cycles in accordance with a scheme shown, e.g., in FIGS. 6 and 7. Accordingly, the phase value φTSG[k] is updated in each measurement cycle k, and c+1 measurements are made in each cycle. According to one embodiment, the following c+1 values may be sampled in each measurement cycle: sDC,0[k], sDC,1[k], . . . sDC,c[k] (see also FIG. 10A). Thereby, all phase shift values ΔφTX01, ΔφTX02, . . . , ΔφTXc are set in accordance with a defined phase configuration (referred to as reference configuration, e.g., all phase shifts may be set to zero) when sampling sDC,0[k]; then all phase shift values ΔφTX01, ΔφTX02, . . . , ΔφTXn except the i-th phase shift value ΔφTXi is inverted (i.e., increased or decreased by 180°) when sampling sDC,i[k] (for i=1, 2, . . . , c) as illustrated in the scheme shown in FIG. 10A. Analogously to equations 14 and 15, the measured values may be determined as follows in each measurement cycle k (see also FIG. 10B):













M
01



[
k
]


=


(



s

DC
,
0




[
k
]


+


s

DC
,
1




[
k
]



)

=


A

TX





01


·

cos


(



ϕ
TSG



[
k
]


-

ϕ

TX





01



)





,







M
02



[
k
]


=


(



s

DC
,
0




[
k
]


+


s

DC
,
2




[
k
]



)

=


A

TX





02


·

cos


(



ϕ
TSG



[
k
]


-

ϕ

TX





02



)





,














M
c



[
k
]


=


(



s

DC
,
0




[
k
]


+


s

DC
,
c




[
k
]



)

=


A
TXc

·


cos


(



ϕ
TSG



[
k
]


-

ϕ
TXc


)


.








(
24
)







By stepwise increasing the phases c° TSG[k]—in each measurement cycle—k samples of the RF output signals sTX01(t), sTX02(t), . . . , sTXc(t) can be determined as illustrated in the diagram of FIG. 6 and known estimation algorithms may be used to estimate the amplitudes ATX01, ATX02, . . . , ATXc and phases φTX01, φTX02, . . . , φTXc as discussed above with reference to FIGS. 5 to 7.


It is noted that varying the phases value φTSG[k] is equivalent to simultaneously varying all phase shift values ΔφTX01, ΔφTX02, . . . , ΔφTXc of the phase shifters 105 (where applicable in addition to the phase inversion). This is evident, for example, from equation 24; one can see that, e.g., φTSG[k]=10° yields the same result as φTSG[k]=0°, if instead the phase shift values ΔφTX01, ΔφTX02, . . . , and ΔφTXc are all decreased by 10° (i.e., increased by 350°). That is,






A
TXi·cos(φTSG[k]−φTXi)=ATXi·cos(0−(φTXi+ΔφTXi)),  (25)


if ΔφTXi=−φTSG[k] for all i=1, 2, . . . , n. In other words, the function of the phase shifter 106 may be provided—in common—by the phase shifters 105, and changing the phase value φTSG[k] can have the same effect as changing the reference configuration, according to which the phase shift values ΔφTX01, ΔφTX02, P TXc of phase shifters 105 are set. It is further noted that, although incrementing/decrementing the phase value φTSG[k] is theoretically equivalent to simultaneously incrementing/decrementing all phase shift values ΔφTX01, ΔφTX02, . . . , ΔφTXc of the phase shifters 105, the first option may yield better results as the second option is more susceptible to potential mismatches between the phase shifters 105.


The method described above for measuring the amplitudes ATXi and the phases φTXi of the RF output signals sTXi(t) of RF channels TXi is further summarized below with reference to the equation schemes in FIGS. 10A-10B, 11A-11B and the flow chart of FIG. 12. In case of c RF channels the index i runs from 1 to n. The equation schemes in FIGS. 10A-10B is a generalization of equations 8 to 10 and illustrates how the configuration, according to which the phase shift values ΔφTXi (supplied to phase shifters 105 in RF channels TXi) are set, is changed during a measurement cycle k by inversion of one or more of the phase shift values ΔφTXi. As mentioned above, the reference configuration (i.e., the initial setting of the phase shift values ΔφTXi) and the phase φTSG[k] of the RF reference signal sTSG(t) are constant during one measurement cycle (see FIG. 12, step S1).


According to the scheme of FIG. 11A, the first DC value sDC,0[k]=sDC(tk,0) of the mixer output signal sDC(t) is sampled at a reference configuration of the phase shift values ΔφTXi (see FIG. 12, step S2). As mentioned, without loss of generality, the reference configuration may be chosen such that all phase shift values ΔφTXi are zero. However, any other configuration may be used. Then, the configuration, according to which the phase shift values ΔφTXi are set, is modified in accordance with a pre-defined scheme by inversion of one or more of the phase shift values ΔφTXi (see FIG. 12, step S3), and a further DC value sDC,1[k] of the mixer output signal sDC(t) is sampled at the modified configuration (see FIG. 12, step S4). Inversion of a phase shift value may be accomplished by adding or subtracting it rad (180 degrees). As shown in FIG. 10A, all phase shift values ΔφTXi except ΔφTX1 are inverted (increased/decreased by t) while sampling the DC value sDC,1[k], all phase shift values ΔφTXi except ΔφTX2 are inverted while sampling the DC value sDC,2[k], and generally all phase shift values ΔφTXi except ΔφTXj are inverted while sampling the j-th further DC value sDC,j[k] (for j=1, . . . , c). The modification of the configuration and the sampling of DC values sDC,j[k] are repeated until the pre-defined scheme has been completely processed (see FIG. 12, step S5).


The sampled DC value sDC,0[k] and the further DC values sDC,1[k], . . . , sDC,c[k] are then used to calculate measurement values Mi[k] representing samples of the RF output signals sTXi(t) of channels TXi (see FIG. 12, step S6, i=1, 2, . . . , c). These calculations are illustrated in FIG. 10B, which are a generalization of equations 17 and 18. Accordingly, for calculating the ith value Mi[k] the sampled DC value sDC,i[k] is added to the first value sDC,0[k] (which is obtained for the reference configurations of the phase shift values ΔφTXi). If the measurement is continued with the next cycle (see FIG. 12, step S7), the phase is rotated (see FIG. 12, step S8), which may be done by modifying the phase φTSG[k] of the RF reference signal sTSG(t) (as illustrated in FIG. 7, third diagram), which is—as explained above—equivalent to changing the reference configuration, according to which the phase shift values ΔφTXi (supplied to phase shifters 105 in RF channels TXi) are set, by equally modifying all phase shift values ΔφTXi (i=1, . . . , c) before any phase inversion is applied. The equivalence of these two options has been explained above with reference to equation 25.


If the measurement is completed after a defined number of cycles k, the measurement values Mi[k] are used to estimate amplitudes ATXi and phases φTXi of the RF output signals sTXi(t) of RF channels TXi (see FIG. 12, step S9). For example, after K measurement cycles have been run through, and if K is a power of two (k=0, . . . , K−1), amplitude ATX01 and phase φTX01 can be estimated from the measured values M01[k] using an FFT algorithm, amplitude ATX02 and phase φTX02 can be estimated from the measured values M02[k], etc.


According to the scheme shown in FIGS. 10A and 10B, all phase shift values ΔφTX01, . . . , ΔφTXc, except the j-th phase shift value ΔφTXj, are inverted while sampling the j-th DC mixer output value sDC,j[k]. As a result, the sampled DC values sDC,j[k] are added to sDC,0[k] to obtain the corresponding measured value Mj[k]. FIGS. 11A and 11B illustrate an alternative scheme, which is equivalent. In accordance with FIG. 11A, the phase shift values ΔφTX01, . . . , ΔφTXc are unchanged (as compared to the reference configuration) and are not inverted, except the j-th phase shift value ΔφTXj, which is the only phase shift value that is inverted while sampling the j-th DC mixer output value sDC,j[k]. As a result, as shown in FIG. 11B, the sampled DC values sDC,j[k] are subtracted from sDC,0[k] to obtain the corresponding measured value Mj[k]. The equivalence of the two schemes has already been mentioned in connection with equation 16. As a consequence of this equivalence, the two approaches of FIGS. 10A, 10B, 11A, and 11B can be mixed, resulting in further schemes which are also equivalent. In the case of only two channels TX01 and TX02 the two approaches are theoretically identical (when neglecting tolerances and measurement errors), which makes one measurement redundant (cf. equations 15 and 16).


The described embodiments implement a concept that allows the monitoring of phase and/or signal amplitude of the output signals of multiple RF channels; and the monitoring allows an assessment whether the phases and/or amplitudes are balanced. In this context “balanced phases” means that the phases of the RF channel output signals are equal or differ by predefined values. Phase balancing may be important when using phased array antennas or beam forming techniques. Similarly, amplitude balancing, usually means that the amplitudes of the RF channel output signals are equal or correspond to defined values. If the RF channels are out of balance, the control circuit (or any other circuitry coupled thereto) may initiate counter measures to bring the RF channels into balance. It is noted that the concepts described above may be implemented on-chip, i.e., the monitor circuit as well as supplementary circuitry may be implemented on the same chip as the RF channels (e.g., the MMIC).


As mentioned above, an FFT algorithm may be used to determine the sought amplitudes and phases from the measured values M01[k], M02[k], . . . , Mc[k]. Alternatively, a specific implementation of a Discrete Fourier Transform (DFT) may be used as discussed below. As shown for example in FIGS. 6 and 7, the phase rotation may be done by modifying the phase φTSG[k] of the RF reference signal sTSG(t) by constant increments (see FIGS. 6 and 7). In case the phase rotation covers an integer multiple of 2π (e.g., 360°), the sought amplitude and phase information is included in a single frequency bin of the discrete spectrum.


For example, in case the phase φTSG[k] is rotated in steps of 90° in four measurement cycles (i.e., φTSG[0]=0, φTSG[1]=π/2, φTSG[2]=π, and φTSG[3]=3π/2), then the measurement values M01[0], . . . , M01[3] (for the first channel TX01) are distributed exactly over one period [0, 2π[, and all frequency bins (discrete frequency values) of the discrete spectrum of the measurement values M01[k] will be substantially zero except the second bin with index n=1. If no noise is present the other frequency bins will be exactly zero. Similarly, in case the phase φTSG[k] is rotated in steps of 90° in eight measurement cycles (i.e., φTSG[0]=0, φTSG[1]=π/2, (φTSG[2]=π, and φTSG[3]=3π/2, φTSG[4]=π, φTSG[5]=5π/2. φTSG[6]=3π, φTSG[7]=7π/2), then the measurement values M01[0], . . . , M01[7] cover exactly two periods [0, 4π[, and all frequency bins (discrete frequency values) of the discrete spectrum of measurement values M01[k] will be substantially zero except the third bin with index n=2. Accordingly, it is sufficient to process only the non-zero frequency bins for obtaining the sought information about the phase, amplitude (and thus signal power). This results in reduced power consumption and faster estimation of the above parameters since only one spectral value has to be calculated instead of the whole discrete spectrum. It is noted that a spectral value may indicate an amplitude and phase for a specific frequency component of the sequence including the sampled values. For example, for the sampled values shown in FIGS. 14 and 15, the spectral value corresponds to the phase and the amplitude of the sinusodial waveform shown in the respective diagrams.


To further analyze the concept described herein, the discrete Fourier transform of the sequence Mc[k] (measured values for the c-th channel) is considered:






Y[n]=Σk=0N-1Mc[kWNk·n,  (26)


wherein the complex weight factor WN is defined as (j being the imaginary unit)






W
N
=e
−j·2π/N.  (27)


If the phase rotation of the phase φTSG[k] covers one full rotation (i.e., the interval [0, 2π[) in N steps of 2π/N, then the sought information is in the second frequency bin, i.e., in Y[1]. At this point it is noted that the first frequency bin Y[0] includes the DC-Offset of the sequence Mc[k] which is substantially zero. As indicate above, if the phase rotation of the phase φTSG[k] is distributed over two full rotation (i.e., the interval [0, 4π[) in N steps of 4π/N, then the sought information is in the third frequency bin, i.e., Y[2]. If the phase rotation covers three full rotations, then the sought information is in the fourth frequency bin Y[3], etc.


For the following explanations, it is assumed that the rotation of the phase φTSG[k] covers one full rotation in N steps of 2π/N and the frequency bin of interest is the second frequency bin n=1. In this example, the spectral value Y[1] of the second frequency bin can be calculated as follows:






Y[1]=Σk=0N-1Mc[kWNk=McT·WN  (28)


wherein Mc denotes a vector including the sequence Mc[k] and WN denotes a vector including the weights WNk (for k=0, 1, . . . , N−1). That is:










M
c

=



(





M
c



[
0
]













M
c



[

N
-
1

]





)






and






W
N


=


(




W
N
0











W
N

N
-
1





)

.






(
29
)







In equation 28, the superscript T denotes the transposed. It can be observed that the Discrete Fourier Transform may be replaced by the vector multiplication of equation 29.


In accordance with one example, the parameter N may be chosen as eight (N=8) for phase increments of 2π/8 (i.e., 45°), which means that eight measurement cycles are performed to obtain the eight measured values Mc[0], . . . , Mc[7] for each channel TXc. In this example, the resulting weight vector W8 has a simple structure, namely










W
8

=


(



1






2

-

j


2








-
j







-

2


-

j


2








-
1







-

2


+

j


2







j






2

+

j


2






)

.





(
30
)







In accordance with another example, the parameter N may be chosen as four (N=4) for phase increments of 2π/4 (i.e., 90°), which means that four measurement cycles are performed to obtain the four measured values Mc[0], . . . , Mc[4] for each channel c. In this example, the resulting weight vector W4 has an even simpler structure, namely










W
4

=


(



1





-
j






-
1





j



)

.





(
31
)







It is noted, that in the latter example (equation 31) no multiplication have to be performed, and the spectral value Y[1] of the first frequency bin n=1 may be obtained by two simple additions/subtractions. That is, for each channel TXc:










Y


[
1
]


=



M
c
T

·

W
4


=





M
c



[
0
]


+


M
c



[
2
]






Re


{

Y


[
1
]


}




+

j
·



(



M
c



[
3
]


-


M
c



[
1
]



)




Im


{

Y


[
1
]


}




.








(
32
)







In the above equation 32, Re{ } and Im{ } denote the real and the imaginary part of the complex-valued spectral value Y[1]. The sought amplitude value 2ATXc of the sequence Mc[k] (see equations 24) can be determined from the magnitude of the spectral value Y[1], namely |Y[1]|, and the corresponding phase value φTXc (for channel TXc) can be calculated using the following known relations:










2


A
TXc


=



2
N





Y


[
1
]





=


2
N





Re



{

Y


[
1
]


}

2


+

Im



{

Y


[
1
]


}

2










(
33
)







ϕ
TXc

=



tan

-
1




(

Im


{

Y


[
1
]


}



/


Re


{

Y


[
1
]


}


)


.





(
34
)







It is noted, that in a general case N complex-valued multiplications and N−1 complex-valued additions are needed to calculate the spectral value Y[1] wherein each complex-valued multiplication entails two real-valued multiplications and two real-valued additions. As discussed above, the number of calculations significantly reduces for specific values of N. Particularly for N=4. the calculations become trivial and only two real-valued additions remain for calculating the spectral value Y[1] (see equation 32). Although a sequence Mc[k] of only four values (i.e., N=4 and k=0, . . . , 3) may be sufficient to estimate the phase value for a channel, a longer sequence (e.g., N=8) with more values may yield better (more precise) results. As shown in equation 30, the values in the weight vector WN are not trivial for higher parameters N (as compared to the case N=4). In the case of N=8 the factor √{square root over (2)} may be stored in a memory as a pre-calculated numerical value. For higher values of the parameter N (N>8), more factors need to be pre-calculated and stored.


The complexity of the amplitude and phase estimation—also for higher values of N—may be achieved when covering two or more full rotations of the phase. If, in accordance with a further example, the parameter N is chosen as eight (N=8) for phase increments of 4π/8 (i.e., 90°), the phases are distributed over two full rotations, i.e., two full rotations are covered. Accordingly, eight measurement cycles are performed to obtain the eight measured values Mc[0], . . . , Mc[7] for each channel TXc. In this example, the spectral value Y[2] is relevant,






Y[2]=Σk=08−1Mc[kW82·k=McT·W8,  (35)


and the resulting weight vector W8 has a simple structure, namely










W
8

=


(




W
8
0






W
8
2






W
8
4






W
8
6






W
8
8






W
8
10






W
8
12






W
8
14




)

=


(



1





-
j






-
1





j




1





-
j






-
1





j



)

.






(
36
)







For N=16 and increments of 8π/16, four full rotations of the phase are performed and the relevant spectral value is Y[4], wherein the corresponding weight vector W16 remains trivial, i.e., W16=[WN4·k].


Summarizing the above, calculation of the whole spectrum, e.g., using an FFT algorithm, may be avoided if the measured sequence covers an integer multiple of a full phase rotation (a full rotation means a rotation of 2π or 360°). That is, for a sequence of N values (obtained in N measurement cycles) the phase increment between the samples is an integer multiple of 2π/N. If the measurements are distributed over one full phase rotation, the second frequency bin Y[1] is relevant (Y[0] represents the DC offset and is ideally zero). Generally, if the measurements are distributed over u full phase rotations, frequency bin u is relevant, i.e., Y[u] is relevant. As mentioned the frequency bin Y[0] represents a DC offset which is ideally zero. The weight vector WN becomes trivial, if the phase increments between the samples equal π/2 (90°). In both cases, the calculations needed to determine the spectral value of the sought frequency bin can be very efficiently implemented in hardware with less complexity than conventional FFT algorithms. In one example, a hardware-implemented CORDIC algorithm is used.


It is noted, that the herein-described approach for estimating phase and amplitude of sinusoid sequences—such as the sequences M01[k], M02[k], etc.—that cover an integer number of periods (i.e., an integer number of full phase rotations) may not only be applied in a system shown in FIGS. 5, 8, and 9, but can also be applied in other systems, in which the phases of the individual channels are measured subsequently (channel-wise). An example of such a system is illustrated in FIG. 13.


Accordingly, the approach explained above with reference to equations 26 to 36 is not limited to examples in which the RF output signals from multiple channels are combined as described above with reference to FIGS. 5 to 19. The approach can generally be used to evaluate phases and amplitude values of signals having sinusoidal waveforms (such as, e.g., M01[k], M02[k], etc.). FIG. 13 illustrates a block diagram illustrating one further example of an RF circuit with multiple RF channels for generating multiple RF output signals. Only one channel TXc of c channels is depicted to keep the illustration simple. Similar as in the example of FIG. 8, the local oscillator signal sLO(t) is supplied as input signal to the RF channel TXc as well as to the monitor circuit 150. As in the previous examples, the RF channel TXc includes a phase shifter 105 (phase shift ΔφTXc) and an amplifier 102 in order to phase-shift and amplify the local oscillator signal sLO(t). The phase-shifted and amplified signal sTXc(t) is supplied as output signal at an output port of the RF channel TXc, wherein a coupler 109 is included in the RF channel TXc configured to provide a fraction of the output signal sTXc(t) as scaled output signal sTXc′(t) to the monitor circuit 150 for the determination of the phase and the amplitude of the output signal sTXc(t). The scaled output signal is denoted as sTXc′(t) and has a fraction of the signal power of the output signal sTXc(t).


The monitor circuit 150 includes a phase shifter 106 (phase shift ΔφTSG), which is configured to phase shift the local oscillator signal sLO(t). The output signal is denoted as reference signal sTSG(t) (see equation 5). The monitor circuit 150 further includes mixer 107 that is configured to mix the reference signal sTSG(t) with the (scaled) output signal sTXc′(t). As both signals sTSG(t) and sTXc′(t) have the same frequency fLO, the output signal of the mixer 107 is a DC-signal sDC(t), which represents the phase of the output signal sTXc(t) relative to the phase of the reference signal sTSG(t). Analogously to equation 1, the output signal sTXc(t) can be written as:






s
TXc(t)=ATXc·cos(2πfLOt+φTXc+ΔφTXc),  (37)


wherein ΔφTXc is the phase shift caused by phase shifter 105 and ΔφTXc is the phase shift caused by further circuit components in the signal path from the local oscillator to the output of the RF channel TXc. ATXc denotes the amplitude of the output signal sTXc(t). Similar to equations 6 and 7, the mixer output signal sDC(t) can be calculated as follows:






s
DC(t)≈ATXc·cos(φTSG−ΔφTXc−φTXc).  (38)


It is to be noted that only one output channel is active in the present example, while the other channels are inactive and not generating an RF output signal.


The analog signal DC may be sampled (e.g., by ADC 31) at various different phase shift values φTSG and ΔφTXc set by the phase shifters 106 and 105, respectively. The k-th sample of the resulting discrete sequence Mc[k] is











M
c



[
k
]


=



s
DC



(

t
k

)


=



s
DC



[
k
]





A
TXc

·


cos
(





ϕ
TSG



[
k
]


-


Δϕ
TXc



[
k
]







Δϕ
c



[
k
]




-

ϕ
TXc


)

.








(
39
)







The sequence Mc[k] may herein be referred to as measured signal, wherein the phase difference φTSG[k]−ΔφTXc[k] may herein be referred to as phase offset Δφc[k]. It is noted that the phase offset Δφc[k] can be set solely by the phase shifters 105 and 106, which may be controlled by control circuit 120.


If the phase offset Δφc[k] is successively rotated by equidistant phase steps, the measured sequence M[k] is a discrete sinusoidal signal similar to the signals shown in the example of FIG. 6. If the size of one phase step is an integer multiple of 2π/N, wherein N is the number of measurement cycles and thus the number of samples in the sequence Mc[k] (i.e., k=0, . . . , N−1), the measured sequence M[k] is distributed over one or more full periods (i.e., full phase rotations of 2π). Diagram (a) of FIG. 14 illustrates a measured sequence Mc[k] with eight samples (i.e., k=0, . . . , N−1), wherein these samples can be regarded as elements of the vector Mc (see equation 28). For a successive, next measurement cycle the phase offset Δφc[k] is increased by 2π/N=π/4 (i.e., 45°). In the depicted example, the determined phase φTXc is 13π/90 (i.e., 52°). As can be seen from diagram (a) of FIG. 14, one full period of a cosine sequence is obtained, and thus the relevant phase and amplitude information is in the second frequency bin Y[1] (frequency index n=1) of the corresponding discrete Fourier Transform as explained above.


Considering equations 27 and 30, the weight factor W8k equals e−j·k·π/4. The complex values of W8k are illustrated in diagram (b) of FIG. 14 for k=0, . . . 7. The depicted values are the elements of the weight vector W8 defined in equation 30. The spectral value Y[1] can be calculated in accordance with equation 28, and an estimation for the sought phase φTXc value can be calculated from the spectral value Y[1] in accordance with equation 34. The corresponding amplitude can be calculated from the spectral value Y[1] in accordance with equation 33.


According to one implementation, the phase offset Δφc[k] is stepwise rotated to cover one or more full rotations of 2π (i.e., 360°) and thus the step size is an integer multiple of 2π/N, wherein N is the number of samples (measurement cycles). As defined in equation 39, the phase offset Δφc[k]=φTSG[k]-ΔφTXc[k] can be determined by both phase shifters 105 and 106. Therefore, a phase offset of 7π/4 can be obtained by setting the phase shifter 106 to φTSG[k]=π/4 and the phase shifter 105 to ΔφTXc[k]=0. However, the same phase shift may be obtained by setting the phase shifter 106 to φTSG[k]=π/2 and the phase shifter 105 to ΔφTXc[k]=π/4. In some implementations, both phase shifts φTSG[k] and ΔφTXc[k] may be varied for setting a specific phase offset Δφc[k] in order to test the functionality of both phase shifters 105 and 106. In other words, if the measured sequence Mc[k] corresponds to the expected sinusoidal samples, it can be determined that both phase shifters 105 and 106 provide the expected phase offsets and are functioning and operating correctly.


Diagram (a) of FIG. 15 illustrates another example of a measured sequence Mc[k] with eight samples (i.e., k=0, . . . , N−1), wherein these samples can be regarded as elements of the vector Mc (see equation 35). Between two successive measurement cycles the phase offset Δφc[k] has been increased by 4π/N=π/2 (i.e., 90°). Like in the previous example, the sought phase φTXc is 13π/90 (i.e., 52°). As can be seen from diagram (a) of FIG. 15, two full periods of a cosine sequence are obtained, and thus the relevant phase and amplitude information is in the third frequency bin Y[2] (frequency index n=2) of the corresponding discrete Fourier Transform as explained above. Considering equations 27 and 35, the weight factor W82k equals e−j·k·π/2. Again, the complex values of W82k are illustrated in diagram (b) of FIG. 15 for k=0, . . . 7. The depicted values are the elements of the weight vector W8 defined in equation 36. The spectral value Y[2] can be calculated in accordance with equation 35, and an estimation for the sought phase φTXc value can be calculated from the spectral value Y[2] in view of equation 34. The corresponding amplitude can be calculated from the spectral value Y[12] in view of equation 33.


It is noted that the example illustrated in FIG. 15 uses the same number of samples to estimate phase and amplitude of the measured sequence Mc[k] as in the previous example of FIG. 14. However, the weight vector W8 takes a more simple form in the example of FIG. 15 (see equation 36) as already discussed above. This is due to the fact that the step size of the phase offset Δφc[k] equals π/2 and the cosine of integer multiples of π/2 can only assume the values 0, 1, and −1. Accordingly, the elements of the weight vector W8 have imaginary and real parts that are either or 1 or −1.


As mentioned above, a specific phase offset Δφc[k] can be set using both phase shifters 105 and 106. The tables shown in FIGS. 16 and 17 illustrates two different settings for the phase shifters 105 and 105 to obtain equally spaced phase offsets Δφc[k] when successively acquiring measured values Mc[k] in accordance with the approach shown in FIG. 15, diagram (a). In the example of FIG. 16, the phase shift ΔφTXc[k] generated by phase shifter 105 remains zero, while the phase rotation is solely accomplished by phase shifter 106 that increases the phase shift ΔφTSG[k] stepwise by π/2 (i.e., 90°). Thus, the phase offset Δφc[k] is rotated by two full rotations while obtaining a sequence Mc of eight measured values Mc[k] (for k=0, . . . , 7). In another example the phase shift ΔφTXc[k] generated by phase shifter 105 is set to zero while obtaining the first four measurements Mc[k] (for k=0, . . . , 3) and set to π/4 (i.e., 45°) while obtaining the remaining measurements Mc[k] (for k=4, . . . , 7). At the same time, the phase shift ΔφTSG[k] generated by the phase shifter 106 is stepwise increased by π/2—starting at zero—while obtaining the first four measurements Mc[k] (for k=0, . . . , 3) and stepwise increased by π/2—starting at π/4—while obtaining the remaining measurements Mc[k] (for k=4, . . . , 7). This situation is illustrated in FIG. 17. It is understood that phase offsets of 2π (i.e., 360°) and integer multiples of 2π correspond to a phase offset of zero. Accordingly, a subtraction Δφc[k]=ΔφTSG[k]-ΔφTXc[k] resulting in ψ±+2 is identical to a subtraction Δφc[k]=ΔφTSG[k]−ΔφTXc[k] resulting in ψ (wherein ψ may by an arbitrary angle).


Additionally, further embodiments are provided below:


Embodiment 1

A method includes receiving a radio frequency (RF) oscillator signal; providing the RF oscillator signal to a plurality of RF channels of an RF circuit, each RF channel generating an RF output signal of a plurality of RF output signals based on the RF oscillator signal, and each RF output signal having an amplitude and a phase; generating a combined signal representing a combination of the RF output signals; down-converting the combined signal using an RF reference signal supplied to a mixer to generate a down-converted signal, a mixer output signal being the down-converted signal; and processing the mixer output signal to obtain estimated values indicative of amplitudes and/or phases of the plurality of RF output signals.


Embodiment 2

The method of embodiment 1, wherein each RF channel of the plurality of RF channels includes a phase shifter that receives a respective phase shift value associated with a respective RF channel of the plurality of RF channels, wherein the phase of each RF output signal depends on the respective phase shift value. In addition, processing the mixer output signal includes: configuring each respective phase shift value by setting each respective phase shift value in accordance with a first phase configuration; modifying a phase configuration, according to which each respective phase shift value is set to establish different modified configurations of phase shift values; and sampling the mixer output signal for the first phase configuration and for the different modified configurations of the phase shift values to generate a set of sampled mixer output values.


Embodiment 3

The method of embodiment 2, wherein modifying the phase configuration includes: changing or inverting one or more of the phase shift values in accordance with a predefined scheme.


Embodiment 4

The method of embodiment 2 or 3, wherein processing the mixer output signal further includes: combining two or more sampled mixer output values of the set of sampled mixer output values to obtain measured values, each measured value depending on the amplitude and the phase of the RF output signal of a specific RF channel.


Embodiment 5

The method of any of embodiments 2-4, wherein processing the mixer output signal further includes recurrently: changing a phase of the RF reference signal or change the first phase configuration of the phase shift values; and repeating a modification of the phase configuration, according to which the phase shift values are set, and a triggering of a sampling of the mixer output signal to generate a further set of sampled mixer output values.


Embodiment 6

A method comprises providing a radio frequency (RF) test signal to a radar transmitter circuit; mixing an RF reference signal and an RF test signal that represents an RF output signal of the radar transmitter circuit to generate a mixer output signal; repeatedly selecting a phase offset from a sequence of phase offsets, applying the selected phase offset by phase-shifting at least one of the RF test signal and the RF reference signal, and sampling the mixer output signal to generate a sequence of sampled values associated with the sequence of phase offsets; calculating a spectral value from the sequence of sampled values; and calculating estimated phase information indicating a phase of the RF output signal based on the spectral value.


Embodiment 7

The method of embodiment 6, wherein calculating the estimated phase information comprises: calculating the spectral value from the sequence of sampled values, the spectral value being a complex valued spectral value; and calculating an argument of the complex-valued spectral value, the argument being the estimation of the phase of the RF output signal.


Embodiment 8

The method of embodiment 6 or 7, wherein the sequence of phase offsets is a sequence of equally spaced phases distributed over one or more full phase rotations.


Embodiment 9

The method of embodiment 8, further comprising: providing a sequence of weight factors, wherein the weight factors depend on a number of periods in the sequence of sampled values and on a length of the sequence of sampled values.


Embodiment 10

The method of any of the embodiments 6-9, wherein phase offsets included in the sequence of phase offsets are equally spaced with a spacing of 90 degrees and a length of the sequence of phase offsets is an integer multiple of four.


Embodiment 11

The method of any of the embodiments 6-9, wherein phase offsets included in the sequence of phase offsets are equally spaced with a spacing that equals an integer multiple of 360 degrees divided by a length of the sequence of phase offsets.


Embodiment 12

The method of any of the embodiments 6-11, wherein applying the selected phase offset comprises: using a first phase shifter to phase-shift the RF test signal by a first phase shift value; and using a second phase shifter to phase-shift the RF reference signal by a second phase shift value, wherein the selected phase offset corresponds to a difference between the second phase shift value and the first phase shift value.


Although the invention has been illustrated and described with respect to one or more implementations, alterations and/or modifications may be made to the illustrated examples without departing from the spirit and scope of the appended claims. In particular regard to the various functions performed by the above described components or structures (units, assemblies, devices, circuits, systems, etc.), the terms (including a reference to a “means”) used to describe such components are intended to correspond—unless otherwise indicated—to any component or structure, which performs the specified function of the described component (e.g., that is functionally equivalent), even though not structurally equivalent to the disclosed structure, which performs the function in the herein illustrated exemplary implementations of the invention.

Claims
  • 1. A circuit, comprising: a plurality of radio frequency (RF) channels comprising a plurality of input nodes, a plurality of phase shifters, and a plurality of output nodes that provide a plurality of RF output signals, each RF channel including an input node of the plurality of input nodes, a phase shifter of the plurality of phase shifters, and an output node of the plurality of output nodes, and each RF channel being configured to receive an RF oscillator signal at the input node and to provide an RF output signal of the plurality of RF output signals at the output node;an RF combiner circuit coupled to the plurality of output nodes of the plurality of RF channels and configured to generate a combined signal representing a combination of the plurality of RF output signals; anda monitor circuit including a mixer configured to receive and down-convert the combined signal using an RF reference signal to generate a mixer output signal that depends on each phase of each of the plurality of RF output signals.
  • 2. The circuit of claim 1, wherein the monitor circuit is configured to determine, based on the mixer output signal, information indicative of each phase and/or each amplitude of each of the plurality of RF output signals or information indicative of a phase difference between phases of at least two of the plurality RF output signals.
  • 3. The circuit of claim 1, wherein the RF reference signal is derived from the RF oscillator signal and/or has a same frequency as the RF oscillator signal.
  • 4. The circuit of claim 1, wherein the RF combiner circuit includes, for each RF channel of the plurality of RF channels, a coupler, each coupler being coupled to the output node of a respective RF channel and configured to direct a fraction of the RF output signal of the respective RF channel to the monitor circuit.
  • 5. The circuit of claim 4, wherein the RF combiner circuit includes an RF power combiner coupled to each coupler and configured to receive the fraction of each RF output signal of the plurality of RF output signals, generate the combined signal from the fraction of each RF output signal, and provide the combined signal to the mixer.
  • 6. The circuit of claim 1, wherein the monitor circuit includes a further phase shifter coupled to the mixer and configured to determine a phase of the RF reference signal used by the mixer, wherein the further phase shifter is configured to provide the RF reference signal by modifying a phase of the RF oscillator signal.
  • 7. The circuit of claim 1, further comprising: a control circuit coupled to the plurality of phase shifter and configured to set phase shift values applied by the plurality of phase shifters and/or to set a phase of the RF reference signal used by the mixer.
  • 8. The circuit of claim 1, further comprising: a control circuit coupled to the plurality of phase shifters and configured to:configure the plurality of phase shifters by setting phase shift values in accordance with a first phase configuration;modify a phase configuration of the phase shift values, according to which the phase shift values are set to establish different modified configurations of the phase shift values; andtrigger an analog-to-digital-converter to sample the mixer output signal for the first phase configuration and for the different modified configurations of the phase shift values to generate a set of sampled mixer output values.
  • 9. The circuit of claim 8, wherein, to modify the phase configuration of the phase shift values, the control circuit is configured to change or invert one or more of the phase shift values in accordance with a predetermined scheme.
  • 10. The circuit of claim 8, wherein the control circuit is further configured to combine two or more sampled mixer output values of the set of sampled mixer output values to obtain measured values, each measured value depending on an amplitude and a phase of the RF output signal of a specific RF channel.
  • 11. The circuit of claim 8, wherein the control circuit is further configured to recurrently: initiate a change of a phase of the RF reference signal or a change of the first phase configuration of the phase shift values; andrepeat a modification of the phase configuration, according to which the phase shift values are set, and a trigging of a sampling of the mixer output signal to generate a further set of sampled mixer output values.
  • 12. A radar microwave integrated circuit (MMIC), comprising: a semiconductor chip including a circuit comprising:a plurality of radio frequency (RF) channels comprising a plurality of input nodes, a plurality of phase shifters, and a plurality of output nodes that provide a plurality of RF output signals, each RF channel including an input node of the plurality of input nodes, a phase shifter of the plurality of phase shifters, and an output node of the plurality of output nodes, and each RF channel being configured to receive an RF oscillator signal at the input node and to provide an RF output signal of the plurality of RF output signals at the output node;an RF combiner circuit coupled to the plurality of output nodes of the plurality of RF channels and configured to generate a combined signal representing a combination of the plurality of RF output signals; anda monitor circuit including a mixer configured to receive and down-convert the combined signal using an RF reference signal to generate a mixer output signal that depends on each phase of each of the plurality of RF output signals,wherein the plurality of RF channels are transmit channels operably connected to a plurality of transmit antennas, andwherein the plurality of RF channels are configured to provide, as the plurality of RF output signals, a plurality of frequency modulated RF radar signals.
  • 13. The radar MMIC of claim 12, wherein the circuit further includes one or more reception channels each configured to receive an RF radar echo signal and to down-convert the RF radar echo signal into a base band or intermediate frequency band.
  • 14. The radar MMIC of claim 13, wherein the mixer is configured to generate the mixer output signal, which is indicative of the phases of the plurality of RF output signals, during transmission of the plurality of RF output signals and reception of each RF radar echo signal.
  • 15. A circuit, comprising: one or more radio frequency (RF) channels, each RF channel including an input node and an output node and being configured to receive an RF oscillator signal at the input node and to provide an RF output signal at the output node;a monitor circuit including a mixer configured to mix an RF reference signal and an RF test signal that represents the RF output signal to generate a mixer output signal;an analog-to-digital converter configured to sample the mixer output signal in order to provide a sequence sampled values;a circuit coupled to the analog-to-digital converter and configured to: provide a sequence of phase offsets by phase-shifting at least one of the RF test signal and the RF reference signal using one or more phase shifters;calculate a spectral value from the sequence of sampled values; andcalculate estimated phase information indicating a phase of the RF output signal based on the spectral value.
Priority Claims (2)
Number Date Country Kind
102018100474.5 Jan 2018 DE national
102018112092.3 May 2018 DE national