Claims
- 1. An intelligent multistation access unit for determining the data transmission speed of devices attached to ports of the multistation access unit and attempting to gain access to nodes of a digital data communications network, comprising:a single speed detect circuit which indicates the data transmission speed for each of the attached devices; at least one switching circuit which directs signals from at least one of the attached devices to the single speed detect circuit until said switching circuit is switched by control signals to allow the at least one attached device to transmit the signals to the network node; and a processor that controls the switching circuit via the control signals, and which permits the attached device to transmit the signals to the node if the data transmission speed indication matches the transmission rate of the network.
- 2. A method for detecting non-token-ring devices attempting to gain access to a digital token ring communications network comprising the steps of:(a) selecting a timing period; (b) counting the number of signal transitions made by data output from the network devices during the timing period; and (c) generating a valid signal indicating the network devices are token ring devices only if a predetermined number of signal transitions are counted within the timing period.
- 3. The method of claim 2 wherein the predetermined number of signal transitions is a function of signal frequencies generated by said network devices.
- 4. The method of claim 2 wherein the predetermined number includes 128.
- 5. The method of claim 2 further including the step of not generating the valid signal if the predetermined number of signal transitions is not counted.
- 6. A circuit arrangement for detecting non-token ring devices attempting to gain access to a token ring communications network comprising:a first counter being clocked at a set rate by an internal clock and generating a period signal when a specific count is reached; a first gated latch coupled to an output pin of said first counter for latching the period signal; a second counter having a reset pin coupled to an output of the first gated latch and a clock pin for receiving signals representing data outputted by one of the network devices; and a second gated latch having a control input coupled to an output of the first gated latch; a data input coupled to an output of said second counter and an output for indicating if a threshold count has been reached during a previous period.
- 7. The circuit arrangement of claim 6 wherein the first counter includes a synchronous counter.
- 8. The circuit arrangement of claim 7 wherein the second counter includes an asynchronous counter.
Parent Case Info
This is a divisional application of Ser. No. 08/598,293, filed Feb. 8, 1996.
US Referenced Citations (6)
Continuations (1)
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Number |
Date |
Country |
Parent |
08/598293 |
Feb 1996 |
US |
Child |
08/900204 |
|
US |