Patent Application
20170285858
The subject matter described herein relates generally to the field of electronic devices and more particularly to an intelligent pressure sensitive display for electronic devices.
Existing displays for some electronic devices include touch screen functionality which relies upon a capacitive touch sensing system to sense the touch of a finger or other pointing device. Such capacitive sensing systems have no way to measure a degree of force applied with a touch. This can result in unintended inputs to the device, for example an unintentional click to a website link when scrolling through a phone display. It may be useful to separate lightweight scrolling touches from heavier touches used to click a website link or other object in the user interface.
Accordingly techniques which enable an intelligent pressure sensitive display for electronic devices may find utility.
The detailed description is described with reference to the accompanying figures.
Described herein are exemplary systems and methods to implement an intelligent pressure sensitive display in electronic devices. In the following description, numerous specific details are set forth to provide a thorough understanding of various examples. However, it will be understood by those skilled in the art that the various examples may be practiced without the specific details. In other instances, well-known methods, procedures, components, and circuits have not been illustrated or described in detail so as not to obscure the particular examples.
The electronic device 100 includes system hardware 120 and memory 140, which may be implemented as random access memory and/or read-only memory. A file store may be communicatively coupled to electronic device 100. The file store may be internal to electronic device 100 such as, e.g., eMMC, SSD, one or more hard drives, or other types of storage devices. Alternatively, the file store may also be external to electronic device 100 such as, e.g., one or more external hard drives, network attached storage, or a separate storage network.
System hardware 120 may include one or more processors 122, graphics processors 124, network interfaces 126, and bus structures 128. In one embodiment, processor 122 may be embodied as an Intel® Atom™ processors, Intel® Atom™ based System-on-a-Chip (SOC) or Intel® Core2 Duo® or i3/i5/i7 series processor available from Intel Corporation, Santa Clara, Calif., USA. As used herein, the term “processor” means any type of computational element, such as but not limited to, a microprocessor, a microcontroller, a complex instruction set computing (CISC) microprocessor, a reduced instruction set (RISC) microprocessor, a very long instruction word (VLIW) microprocessor, or any other type of processor or processing circuit.
Graphics processor(s) 124 may function as adjunct processor that manages graphics and/or video operations. Graphics processor(s) 124 may be integrated onto the motherboard of electronic device 100 or may be coupled via an expansion slot on the motherboard or may be located on the same die or same package as the Processing Unit.
In one embodiment, network interface 126 could be a wired interface such as an Ethernet interface (see, e.g., Institute of Electrical and Electronics Engineers/IEEE 802.3-2002) or a wireless interface such as an IEEE 802.11a, b or g-compliant interface (see, e.g., IEEE Standard for IT-Telecommunications and information exchange between systems LAN/MAN—Part II: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications Amendment 4: Further Higher Data Rate Extension in the 2.4 GHz Band, 802.11G-2003). Another example of a wireless interface would be a general packet radio service (GPRS) interface (see, e.g., Guidelines on GPRS Handset Requirements, Global System for Mobile Communications/GSM Association, Ver. 3.0.1, December 2002).
Bus structures 128 connect various components of system hardware 128. In one embodiment, bus structures 128 may be one or more of several types of bus structure(s) including a memory bus, a peripheral bus or external bus, and/or a local bus using any variety of available bus architectures including, but not limited to, 11-bit bus, Industrial Standard Architecture (ISA), Micro-Channel Architecture (MSA), Extended ISA (EISA), Intelligent Drive Electronics (IDE), VESA Local Bus (VLB), Peripheral Component Interconnect (PCI), Universal Serial Bus (USB), Advanced Graphics Port (AGP), Personal Computer Memory Card International Association bus (PCMCIA), and Small Computer Systems Interface (SCSI), a High Speed Synchronous Serial Interface (HSI), a Serial Low-power Inter-chip Media Bus (SLIMbus®), or the like.
Electronic device 100 may include an RF transceiver 130 to transceive RF signals, a Near Field Communication (NFC) radio 134, and a signal processing module 132 to process signals received by RF transceiver 130. RF transceiver may implement a local wireless connection via a protocol such as, e.g., Bluetooth or 802.11X. IEEE 802.11a, b or g-compliant interface (see, e.g., IEEE Standard for IT-Telecommunications and information exchange between systems LAN/MAN—Part II: Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications Amendment 4: Further Higher Data Rate Extension in the 2.4 GHz Band, 802.11G-2003). Another example of a wireless interface would be a WCDMA, LTE, general packet radio service (GPRS) interface (see, e.g., Guidelines on GPRS Handset Requirements, Global System for Mobile Communications/GSM Association, Ver. 3.0.1, December 2002).
Electronic device 100 may further include one or more input/output interfaces such as, e.g., a keypad 136 and a display 138. In some examples electronic device 100 may not have a keypad and use the touch panel for input.
Memory 140 may include an operating system 142 for managing operations of electronic device 100. In one embodiment, operating system 142 includes a hardware interface module 154 that provides an interface to system hardware 120. In addition, operating system 140 may include a file system 150 that manages files used in the operation of electronic device 100 and a process control subsystem 152 that manages processes executing on electronic device 100.
Operating system 142 may include (or manage) one or more communication interfaces 146 that may operate in conjunction with system hardware 120 to transceive data packets and/or data streams from a remote source. Operating system 142 may further include a system call interface module 144 that provides an interface between the operating system 142 and one or more application modules resident in memory 130. Operating system 142 may be embodied as a UNIX operating system or any derivative thereof (e.g., Linux, Android, etc.) or as a Windows® brand operating system, or other operating systems.
In some examples an electronic device may include a controller 170, which may comprise one or more controllers that are separate from the primary execution environment. The separation may be physical in the sense that the controller may be implemented in controllers which are physically separate from the main processors. Alternatively, the trusted execution environment may logical in the sense that the controller may be hosted on same chip or chipset that hosts the main processors.
By way of example, in some examples the controller 170 may be implemented as an independent integrated circuit located on the motherboard of the electronic device 100, e.g., as a dedicated processor block on the same SOC die. In other examples the trusted execution engine may be implemented on a portion of the processor(s) 122 that is segregated from the rest of the processor(s) using hardware enforced mechanisms
In the embodiment depicted in
In some examples the first cover member 210 comprises at least one of a glass or a translucent polymer. The fluid 230 comprises a chemically inert, translucent fluid such a silicon oil, water, or a glycerol. In some examples the pressure sensor 240 is in direct physical contact with the fluid 230. For example, referring to
In some examples pressure sensor 240 may be implemented as a force collector type that use some a structure to collect the force and convert it to electrical signal. Suitable sensors may include, for example, a piezoelectric transducer in which a mechanical force produces electrical voltage output, a strain gauge in which mechanical bending causes electrical resistance change, which is measured, a capacitive sensor in which a diaphragm bending is measured capacitively, an electromagnetic sensor in which bending and/or movement is measured electromagnetically, or an optical sensor in which mechanical deflection is measured optically. Also types of sensors are may be used. For example, sensors which measure variations in liquid or gas physical properties when the pressure changes. Pressure sensor 240 may be communicatively coupled to a printed circuit board 246, which may provide communication connections to controller 170 and/or other electronic components on the electronic device 100.
In some examples the display 200 may comprise a fluid pump 260 capable to pump fluid 230 in the first chamber 220. Referring to
In some examples the display manager module 176 interacts with one or more other components of the electronic device 100 to implement an intelligent pressure sensitive display for an electronic device.
Display manager 330 may be communicatively coupled to one or more pressure sensor(s) 350 and fluid pump(s) coupled to display(s) 310, which may be implemented as described above. Further, display manager 330 may be communicatively coupled to one or more graphics processor(s) 312 and touch controller(s) 314 for display 310. Graphics processor 312 manages graphics operations on display(s) 310 and touch controller 314 manages touch-based input/output operations on display(s) 310. One or more location sensor(s) 370, e.g., from a touch screen system, may provide information about the location(s) of touch(es) on the display to the display manager 330 and the touch controller(s) 314. For example, the touch screen system may comprise a capacitive touchscreen and a grid of location sensors to determine the location(s) of the touch(es) on the touchscreen.
In some examples local memory 340 may comprise one or more bitmap tables which comprise bitmaps for images presented on display(s) 310. For example, graphics processor(s) 312 may generate bitmaps corresponding to images presented on display(s) 310. The bitmaps may include coordinates of input/output devices (e.g., buttons, text boxes, or the like) on display 310.
Having described various structures of an intelligent pressure sensitive display in electronic devices, operating aspects of a system will be explained with reference to
Referring to
At operation 415 the display manager 330 receives a touch signal from touch controller 314, and at operation 420 the display manager 330 determines whether the touch signal received in operation 415 indicates a touch from a user. If, at operation 420, the touch signal did not indicate a touch from a user on the display 310 then the display manager 330 continues to monitor for touch signals. By contrast, if at operation 420 a touch signal indicates that the input on the touch screen of the display 310 indicates a touch then control passes to operation 425 and the display manager 330 activates the pressure sensor(s) 350 coupled to the display(s) 310. Thus, in the example operations depicted in
The display manager 330, at operation 430, monitors the pressure sensor(s) 350 for changes in the pressure of the fluid 230 in the chamber 220. By way of example, when a user depresses a portion of the display 200 as illustrated in
In some examples the display manager 330 uses the outputs from the pressure sensor(s) 350 and the touch controller(s) 314 to determine whether a user is attempting to generate an input on the display 310. Thus, at operation 430 the display manager receives inputs from the pressure sensor(s) 350 and the touch controller(s) 314, and at operation 440 the display manager 330 combines the inputs to facilitate distinguishing a deliberate input touch from a user from an accidental touch by a user or by an object. For example, referring to
Information from the pressure sensor may be combined with information from the touch controller 314 and/or the location sensor(s) 370 to distinguish between deliberate touches and accidental touches. For example, a palm or other object resting on the display 200 will generate a pressure increase that is static over time or which varies slowly over time. By contrast, deliberate touch input events cause pressure changes which vary with a higher frequency. The display manager can employ high-pass filtering techniques to remove any static or slowly varying events from the results and focus the monitoring on input frequency ranges that typically occurs in touch events.
If, at operation 445 the input(s) to the display do not suggest an input touch then control passes back to operation 410 and the display manager 330 continues to monitor the touch screen for inputs. By contrast, if at operation 445 the input(s) to the display suggest an input touch then control passes to operation 450 and the display manager 330 generates an output signal. In some examples the output signal may be dependent upon the location on the screen on which the touch input was received. By way of example, the display manager may receive touch input coordinates from the touch controller(s) and may correlate the input coordinates with a bitmap of the image on the screen stored in the bitmap table(s) 350 and generate a signal that corresponds to a function presented at the coordinates on the bitmap.
Optionally, at operation 455 the display manager 330 may selectively activate the piezoelectric pump 260 to provide a haptic feedback to the user. By way of example, display manager 330 may apply a sequence of electrical current pulses to the electrodes 264 of the piezoelectric pump 260 to cause the pump element 266 to switch between the configuration depicted in
Thus, the operations depicted in
In an alternate example the order of inputs from the touch screen and the pressure sensor may be reversed such that inputs from the pressure sensor are monitored to determine whether an input indicates a touch and, in response thereto, the touch screen is activated.
As described above, in some examples the electronic device may be embodied as a computer system.
A chipset 606 may also communicate with the interconnection network 604. The chipset 606 may include a memory control hub (MCH) 608. The MCH 608 may include a memory controller 610 that communicates with a memory 612. The memory 412 may store data, including sequences of instructions, that may be executed by the processor 602, or any other device included in the computing system 600. In one example, the memory 612 may include one or more volatile storage (or memory) devices such as random access memory (RAM), dynamic RAM (DRAM), synchronous DRAM (SDRAM), static RAM (SRAM), or other types of storage devices. Nonvolatile memory may also be utilized such as a hard disk. Additional devices may communicate via the interconnection network 604, such as multiple processor(s) and/or multiple system memories.
The MCH 608 may also include a graphics interface 614 that communicates with a display device 616. In one example, the graphics interface 614 may communicate with the display device 616 via an accelerated graphics port (AGP). In an example, the display 616 (such as a flat panel display) may communicate with the graphics interface 614 through, for example, a signal converter that translates a digital representation of an image stored in a storage device such as video memory or system memory into display signals that are interpreted and displayed by the display 616. The display signals produced by the display device may pass through various control devices before being interpreted by and subsequently displayed on the display 616.
A hub interface 618 may allow the MCH 608 and an input/output control hub (ICH) 620 to communicate. The ICH 620 may provide an interface to I/O device(s) that communicate with the computing system 600. The ICH 620 may communicate with a bus 622 through a peripheral bridge (or controller) 624, such as a peripheral component interconnect (PCI) bridge, a universal serial bus (USB) controller, or other types of peripheral bridges or controllers. The bridge 624 may provide a data path between the processor 602 and peripheral devices. Other types of topologies may be utilized. Also, multiple buses may communicate with the ICH 620, e.g., through multiple bridges or controllers. Moreover, other peripherals in communication with the ICH 620 may include, in various examples, integrated drive electronics (IDE) or small computer system interface (SCSI) hard drive(s), USB port(s), a keyboard, a mouse, parallel port(s), serial port(s), floppy disk drive(s), digital output support (e.g., digital video interface (DVI)), or other devices.
The bus 622 may communicate with an audio device 626, one or more disk drive(s) 628, and a network interface device 630 (which is in communication with the computer network 603). Other devices may communicate via the bus 622. Also, various components (such as the network interface device 630) may communicate with the MCH 608 in some examples. In addition, the processor 602 and one or more other components discussed herein may be combined to form a single chip (e.g., to provide a System on Chip (SOC)). Furthermore, the graphics accelerator 616 may be included within the MCH 608 in other examples.
Furthermore, the computing system 600 may include volatile and/or nonvolatile memory (or storage). For example, nonvolatile memory may include one or more of the following: read-only memory (ROM), programmable ROM (PROM), erasable PROM (EPROM), electrically EPROM (EEPROM), a disk drive (e.g., 628), a floppy disk, a compact disk ROM (CD-ROM), a digital versatile disk (DVD), flash memory, a magneto-optical disk, or other types of nonvolatile machine-readable media that are capable of storing electronic data (e.g., including instructions).
In an example, the processor 702-1 may include one or more processor cores 706-1 through 706-M (referred to herein as “cores 706” or more generally as “core 706”), a shared cache 708, a router 710, and/or a processor control logic or unit 720. The processor cores 706 may be implemented on a single integrated circuit (IC) chip. Moreover, the chip may include one or more shared and/or private caches (such as cache 708), buses or interconnections (such as a bus or interconnection network 712), memory controllers, or other components.
In one example, the router 710 may be used to communicate between various components of the processor 702-1 and/or system 700. Moreover, the processor 702-1 may include more than one router 710. Furthermore, the multitude of routers 710 may be in communication to enable data routing between various components inside or outside of the processor 702-1.
The shared cache 708 may store data (e.g., including instructions) that are utilized by one or more components of the processor 702-1, such as the cores 706. For example, the shared cache 708 may locally cache data stored in a memory 714 for faster access by components of the processor 702. In an example, the cache 708 may include a mid-level cache (such as a level 2 (L2), a level 3 (L3), a level 4 (L4), or other levels of cache), a last level cache (LLC), and/or combinations thereof. Moreover, various components of the processor 702-1 may communicate with the shared cache 708 directly, through a bus (e.g., the bus 712), and/or a memory controller or hub. As shown in
As illustrated in
Additionally, the core 706 may include a schedule unit 806. The schedule unit 806 may perform various operations associated with storing decoded instructions (e.g., received from the decode unit 804) until the instructions are ready for dispatch, e.g., until all source values of a decoded instruction become available. In one example, the schedule unit 806 may schedule and/or issue (or dispatch) decoded instructions to an execution unit 808 for execution. The execution unit 808 may execute the dispatched instructions after they are decoded (e.g., by the decode unit 804) and dispatched (e.g., by the schedule unit 806). In an example, the execution unit 808 may include more than one execution unit. The execution unit 808 may also perform various arithmetic operations such as addition, subtraction, multiplication, and/or division, and may include one or more an arithmetic logic units (ALUs). In an example, a co-processor (not shown) may perform various arithmetic operations in conjunction with the execution unit 808.
Further, the execution unit 808 may execute instructions out-of-order. Hence, the processor core 706 may be an out-of-order processor core in one example. The core 706 may also include a retirement unit 810. The retirement unit 810 may retire executed instructions after they are committed. In an example, retirement of the executed instructions may result in processor state being committed from the execution of the instructions, physical registers used by the instructions being de-allocated, etc.
The core 706 may also include a bus unit 714 to enable communication between components of the processor core 706 and other components (such as the components discussed with reference to
Furthermore, even though
In some examples, one or more of the components discussed herein can be embodied as a System On Chip (SOC) device.
As illustrated in
The I/O interface 940 may be coupled to one or more I/O devices 970, e.g., via an interconnect and/or bus such as discussed herein with reference to other figures. I/O device(s) 970 may include one or more of a keyboard, a mouse, a touchpad, a display, an image/video capture device (such as a camera or camcorder/video recorder), a touch surface, a speaker, or the like.
As illustrated in
The processors 1002 and 1004 may exchange data via a point-to-point (PtP) interface 1014 using PtP interface circuits 1016 and 1018, respectively. Also, the processors 1002 and 1004 may each exchange data with a chipset 1020 via individual PtP interfaces 1022 and 1024 using point-to-point interface circuits 1026, 1028, 1030, and 1032. The chipset 1020 may further exchange data with a high-performance graphics circuit 1034 via a high-performance graphics interface 1036, e.g., using a PtP interface circuit 1037.
The chipset 1020 may communicate with a bus 1040 using a PtP interface circuit 1041. The bus 1040 may have one or more devices that communicate with it, such as a bus bridge 1042 and I/O devices 1043. Via a bus 1044, the bus bridge 1043 may communicate with other devices such as a keyboard/mouse 1045, communication devices 1046 (such as modems, network interface devices, or other communication devices that may communicate with the computer network 1003), audio I/O device, and/or a data storage device 1048. The data storage device 1048 (which may be a hard disk drive or a NAND flash based solid state drive) may store code 1049 that may be executed by the processors 1004.
The following pertains to further examples.
Example 1 is a display assembly for an electronic device, comprising a first cover member coupled to a second cover member to define a first chamber, a fluid disposed in the first chamber, and a pressure sensor coupled to the chamber to detect a change in pressure in the fluid disposed in the first chamber.
In Example 2, the subject matter of Example 1 can optionally include an arrangement in which the display assembly comprises a location sensor to sense a location of a touch on the display.
In Example 3, the subject matter of any one of Examples 1-2 can optionally include a controller communicatively coupled to the pressure sensor and the location sensor and comprising logic, at least partially including hardware logic, to distinguish between a deliberate touch and an accidental touch.
In Example 4, the subject matter of any one of Examples 1-3 can optionally include an arrangement in which the pressure sensor is in direct physical contact with the fluid.
In Example 5, the subject matter of any one of Examples 1-4 can optionally include an arrangement in which the pressure sensor is disposed in a second chamber coupled to the first chamber via a flexible membrane.
In Example 6, the subject matter of any one of Examples 1-5 can optionally include a fluid pump capable to pump fluid in the first chamber.
Example 7 is an electronic device comprising at least one electronic component and a display, comprising a first cover member coupled to a second cover member to define a first chamber, a fluid disposed in the first chamber, and a pressure sensor coupled to the chamber to detect a change in pressure in the fluid disposed in the first chamber.
In Example 8, the subject matter of Example 7 can optionally include an arrangement in which the first cover member comprises at least one of a glass or a translucent polymer.
In Example 9, the subject matter of any one of Examples 7-8 can optionally include an arrangement in which the fluid comprises at least one of a silicon-based oil, a water or a glycerol.
In Example 10, the subject matter of any one of Examples 7-9 can optionally include an arrangement in which the pressure sensor is in direct physical contact with the fluid.
In Example 11, the subject matter of any one of Examples 7-10 can optionally include an arrangement in which the pressure sensor is disposed in a second chamber coupled to the first chamber via a flexible membrane.
In Example 12, the subject matter of any one of Examples 7-11 can optionally include a fluid pump capable to pump fluid in the first chamber.
In Example 13, the subject matter of any one of Examples 7-12 can optionally include a controller communicatively coupled to the pressure sensor and comprising logic, at least partially including hardware logic, to detect a change in an output of the pressure sensor.
In Example 14, the subject matter of any one of Examples 7-13 can optionally include an arrangement in which the logic is further configured to activate the fluid pump in response to a change in the output of the pressure sensor.
In Example 15, the subject matter of any one of Examples 7-14 can optionally include at least one touch location sensor to generate an output corresponding to a location of a touch on the display.
In Example 16, the subject matter of any one of Examples 7-15 can optionally include logic, at least partially including hardware logic, to activate the pressure sensor in response to an output from the at least one touch location sensor.
In Example 17, the subject matter of any one of Examples 7-16 can optionally include logic, at least partially including hardware logic, to combine an output from the pressure sensor with an output from the at least one touch location sensor to distinguish between different types of touches applied to the display.
In Example 18, the subject matter of Example 7-17 can optionally include logic, at least partially including hardware logic, to selectively activate the fluid pump to produce a predetermined haptic feedback in response to a touch input at one or more predetermined locations on the display.
Example 19 is a controller comprising logic, at least partially including hardware logic, to detect a change in an output of a pressure sensor coupled to a chamber in a display defined by a first cover member coupled to a second cover member, wherein a fluid is disposed in the chamber and activate a fluid pump in the chamber in response to a change in the output of the pressure sensor.
In Example 20 the subject matter of Example 19 can optionally include at least one location sensor to generate an output corresponding to a location of a touch on the display.
In Example 21, the subject matter of Example 19-20 can optionally include logic, at least partially including hardware logic, to activate the pressure sensor in response to an output from the at least one location sensor.
In Example 22, the subject matter of Example 19-21 can optionally include logic, at least partially including hardware logic, to combine an output from the pressure sensor with an output from the at least one location sensor to distinguish between different types of touches applied to the display.
In Example 23, the subject matter of Example 19-22 can optionally include logic, at least partially including hardware logic, to selectively activate the fluid pump to produce a predetermined haptic feedback in response to a touch input at one or more predetermined locations on the display.
The terms “logic instructions” as referred to herein relates to expressions which may be understood by one or more machines for performing one or more logical operations. For example, logic instructions may comprise instructions which are interpretable by a processor compiler for executing one or more operations on one or more data objects. However, this is merely an example of machine-readable instructions and examples are not limited in this respect.
The terms “computer readable medium” as referred to herein relates to media capable of maintaining expressions which are perceivable by one or more machines. For example, a computer readable medium may comprise one or more storage devices for storing computer readable instructions or data. Such storage devices may comprise storage media such as, for example, optical, magnetic or semiconductor storage media. However, this is merely an example of a computer readable medium and examples are not limited in this respect.
The term “logic” as referred to herein relates to structure for performing one or more logical operations. For example, logic may comprise circuitry which provides one or more output signals based upon one or more input signals. Such circuitry may comprise a finite state machine which receives a digital input and provides a digital output, or circuitry which provides one or more analog output signals in response to one or more analog input signals. Such circuitry may be provided in an application specific integrated circuit (ASIC) or field programmable gate array (FPGA). Also, logic may comprise machine-readable instructions stored in a memory in combination with processing circuitry to execute such machine-readable instructions. However, these are merely examples of structures which may provide logic and examples are not limited in this respect.
Some of the methods described herein may be embodied as logic instructions on a computer-readable medium. When executed on a processor, the logic instructions cause a processor to be programmed as a special-purpose machine that implements the described methods. The processor, when configured by the logic instructions to execute the methods described herein, constitutes structure for performing the described methods. Alternatively, the methods described herein may be reduced to logic on, e.g., a field programmable gate array (FPGA), an application specific integrated circuit (ASIC) or the like.
In the description and claims, the terms coupled and connected, along with their derivatives, may be used. In particular examples, connected may be used to indicate that two or more elements are in direct physical or electrical contact with each other. Coupled may mean that two or more elements are in direct physical or electrical contact. However, coupled may also mean that two or more elements may not be in direct contact with each other, but yet may still cooperate or interact with each other.
Reference in the specification to “one example” or “some examples” means that a particular feature, structure, or characteristic described in connection with the example is included in at least an implementation. The appearances of the phrase “in one example” in various places in the specification may or may not be all referring to the same example.
Although examples have been described in language specific to structural features and/or methodological acts, it is to be understood that claimed subject matter may not be limited to the specific features or acts described. Rather, the specific features and acts are disclosed as sample forms of implementing the claimed subject matter.
