Patent Application
20240039156
Embodiments described herein relate generally to an intelligent reflecting surface.
Phase shifters using liquid crystal have been developed as phase shifters for use in phased array antennas whose directivity can be electrically controlled. In a phased array antenna, a plurality of antenna elements to which high-frequency signals are transmitted from corresponding phase shifters are arranged one-dimensionally (or two-dimensionally). In the phased array antenna as described above, the dielectric constant of the liquid crystal needs to be adjusted such that the phase difference between high-frequency signals input to adjacent antenna elements becomes constant.
In addition, intelligent reflecting surfaces capable of controlling a direction of radio wave reflection using the liquid crystal have been studied, similarly to the phased array antennas. On this intelligent reflecting surface, reflection controllers including reflecting electrodes are arranged one-dimensionally (or two-dimensionally). On the intelligent reflecting surface, the dielectric constant of the liquid crystal also needs to be adjusted such that a phase difference of the reflected radio waves becomes constant between the adjacent reflection controllers.
The intelligent reflecting surface that uses the liquid crystal as a dielectric can variably control the reflection direction by the voltage applied to the liquid crystal. On the intelligent reflecting surface, however, if the phase difference amount of the reflected radio wave is insufficient, the amount of variation in the direction in which the radio wave is reflected is restricted.
In general, according to one embodiment, an intelligent reflecting surface comprises
Embodiments described herein aim to an intelligent reflecting surface capable of increasing an amount of phase difference of a reflected wave.
Each embodiment of the invention will be described hereinafter with reference to the accompanying drawings. The disclosure is merely an example, and proper changes within the spirit of the invention, which are easily conceivable by a person of ordinary skill in the art, are included in the scope of the invention as a matter of course. In addition, in some cases, in order to make the description clearer, the widths, thicknesses, shapes and the like, of the respective parts are schematically illustrated in the drawings, compared to the actual modes. However, the schematic illustration is merely an example, and adds no restriction to the interpretation of the invention. Besides, in the specification and drawings, the same elements as those described in connection with preceding drawings are denoted by like reference numbers, and a detailed description thereof is omitted unless necessary.
The embodiments described herein are not general embodiments, but embodiments in which the same or corresponding special technical features of the invention are described. An intelligent reflecting surface according to an embodiment will be described hereinafter with reference to the accompanying drawings.
In the embodiment, a first direction X, a second direction Y, and a third direction Z are orthogonal to each other, but may intersect at an angle other than 90°. A direction toward a tip of an arrow of the third direction Z is referred to as an upper or upward direction, and a direction opposite to the direction toward the tip of the arrow of the third direction Z is referred to as a lower or downward direction.
In addition, according to “a second member above a first member” and “a second member below a first member”, the second member may be in contact with the first member or may be located separately from the first member. In the latter case, a third member may be interposed between the first member and the second member. In contrast, according to “a second member on a first member” and “a second member under a first member”, the second member is in contact with the first member.
In addition, an observation position at which the intelligent reflecting surface is to be observed is assumed to be located on the tip side of the arrow of the third direction Z, and viewing from the observation position toward an X-Y plane defined by the first direction X and the second direction Y is referred to as plan view. Viewing a cross-section of the intelligent reflecting surface on an X-Z plane defined by the first direction X and the third direction Z or a Y-Z plane defined by the second direction Y and the third direction Z is referred to as cross-sectional view.
As shown in
The base BA1 is formed in a flat plate shape and extends along an X-Y plane including the first direction X and the second direction Y orthogonal to each other.
The plurality of patch electrodes PEF are provided on the base BA1.
The insulating layer INS is provided to cover the plurality of patch electrodes PEF.
The plurality of patch electrodes PEL are provided on the insulating layer INS. The plurality of patch electrodes PEL are opposed to the plurality of patch electrodes PEF in the third direction and overlap each other.
The alignment film AL1 is provided to cover the patch electrodes PEL.
Incidentally, in the embodiment, the patch electrodes PEF and the patch electrodes PEL may also be totally referred to as patch electrodes PE.
The second substrate SUB2 is opposed to the first substrate SUB1 with a predetermined gap. The second substrate SUB2 includes an electrically insulating base BA2, a common electrode CE, and an alignment film AL2. The base BA2 is formed in a flat plate shape and extends along the X-Y plane.
The common electrode CE is provided to be in contact with the base BA2. An insulating layer (not shown) may be provided between the common electrode CE and the base BA1.
The alignment film AL2 is provided to cover the common electrode CE. In the embodiment, each of the alignment film AL1 and the alignment film AL2 is a horizontal alignment film.
The first substrate SUB1 and the second substrate SUB2 are joined by a sealing material SAL arranged on their respective peripheral portions. The liquid crystal layer LC is provided in a space surrounded by the first substrate SUB1, the second substrate SUB2, and the sealing member SAL. The liquid crystal layer LC is held between the first substrate SUB1 and the second substrate SUB2.
A thickness (cell gap) of the liquid crystal layer LC is referred to as d1. The thickness dl is greater than a thickness of a liquid crystal layer of a normal liquid crystal display panel. In the embodiment, the thickness d1 is 50 μm. However, the thickness d1 may be less than 50 μm as long as the reflection phase of radio waves can be sufficiently adjusted. Alternatively, the thickness d1 may exceed 50 μm in order to increase the reflection angle of radio waves. The liquid crystal material used for the liquid crystal layer LC of the intelligent reflecting surface RE is different from the liquid crystal material used for ordinary liquid crystal display panels. The above-described reflection phase of the radio waves will be described later.
A common voltage is applied to the common electrode CE, and the potential of the common electrode CE is fixed. In the embodiment, the common voltage is a ground voltage, for example, 0V. A voltage is also applied to the patch electrodes PE. In the embodiment, the patch electrodes PE are AC-driven. The liquid crystal layer LC is driven by an electric field generated between the pixel electrodes PE and the common electrode CE. A voltage applied between the patch electrodes PE and the common electrode CE acts on the liquid crystal layer LC, thereby changing the dielectric constant of the liquid crystal layer LC.
When the dielectric constant of the liquid crystal layer LC changes, the propagation speed of radio waves in the liquid crystal layer LC also changes. For this reason, the reflection phase of radio waves can be adjusted by adjusting the voltage applied to the liquid crystal layer LC. The reflection direction of radio waves can be thereby adjusted.
In the embodiment, an absolute value of the voltage applied to the liquid crystal layer LC is 10V or less. This is because the dielectric constant of the liquid crystal layer LC is saturated at 10V. However, since the voltage at which the liquid crystal layer LC is saturated varies depending on the dielectric constant of the liquid crystal layer LC, the absolute value of the voltage acting on the liquid crystal layer LC may exceed 10V. For example, when improvement of the response speed of the liquid crystal is required, a voltage of 10V or less may be applied to the liquid crystal layer LC after a voltage exceeding is applied to the liquid crystal layer LC.
The first substrate SUB1 has an incident surface Sa on the side opposite to the side opposed to the second substrate SUB2. In
The plurality of patch electrodes PE are arrayed in a matrix at intervals along the first direction X and the second direction Y. On the X-Y plane, the plurality of patch electrodes PE have the same shape and the same size. The plurality of patch electrodes PEL are provided on the same plane (X-Y plane), and the plurality of patch electrodes PEF are provided on the same plane (X-Y plane) above the patch electrodes PEL.
The plurality of patch electrodes PE are arranged at regular intervals along the first direction X and arranged at equal intervals along the second direction Y. The plurality of patch electrodes PE are included in the plurality of patch electrode groups GP extending along the second direction Y and arranged along the first direction X. In
The first patch electrode group GP1 includes a plurality of first patch electrodes PE1, the second patch electrode group GP2 includes a plurality of second patch electrodes PE2, the third patch electrode group GP3 includes a plurality of third patch electrodes PE3, the fourth patch electrode group GP4 includes a plurality of fourth patch electrodes PE4, the fifth patch electrode group GP5 includes a plurality of fifth patch electrodes PE5, the sixth patch electrode group GP6 includes a plurality of the six patch electrodes PE6, the seventh patch electrode group GP7 includes a plurality of seventh patch electrodes PE7, and the eighth patch electrode group GP8 includes a plurality of eighth patch electrodes PE8. For example, the second patch electrodes PE2 are located between the first patch electrodes PE1 and the third patch electrodes PE3 in the direction along the first direction X.
Each patch electrode group GP includes a plurality of patch electrodes PE arranged along the second direction Y and electrically connected to each other. In the embodiment, the plurality of patch electrodes PE of each patch electrode group GP are connected by connection wires CL. The connection wires CL may be connected to only the plurality of patch electrodes PEL, and the connection wires CL may not be provided for the plurality of patch electrodes PEF. In other words, the patch electrodes PEF may be in a floating state. In this case, the patch electrodes PE shown in
The intelligent reflecting surface RE shown in
The plurality of connection wires CL extend along the second direction Y and are arranged along the first direction X, on the first substrate SUB1. The connection wires CL extend to an area of the first substrate SUB1, which is not opposed to the second substrate SUB2. Unlike the embodiment, the plurality of connection wires CL may be connected to the plurality of patch electrodes PE in one-to-one relationship.
In the embodiment, the plurality of patch electrodes PE arranged along the second direction Y and the connection wires CL are integrally formed of the same conductors. Incidentally, the plurality of patch electrodes PE and the connection wires CL may be formed of conductors different from each other. The patch electrodes PE, the connection wires CL, and the above common electrode CE are formed of metal or a conductor similar to metal. For example, the patch electrodes PE, the connection lines CL, and the common electrode CE may be formed of a transparent conductive material such as indium tin oxide (ITO). The connection wires CL may be connected to an outer lead bonding (OLB) pad (not shown). One patch area PA includes one patch electrode PE and a part of the connection wire CL which connects adjacent patch electrodes PE.
The connection wire CL is a fine wire, and a width of the connection wire CL is sufficiently smaller than a length Px which will be described later. The width of the connection wire CL is several μm to several tens of μm, and is on the order of μm. Incidentally, if the width of the connection wire L is too large, the sensitivity to the frequency component of the radio waves is changed, which is not desirable.
The sealing material SAL is arranged at a peripheral portion of the area where the first substrate SUB1 and the second substrate SUB2 are opposed to each other.
The patch electrode PE has a square shape. The shape of the patch electrode PE is not particularly limited, but a square or a perfect circle is desirable. When the external shape of the patch electrode PE is focused, a shape in which an aspect ratio of vertical and horizontal lengths is 1:1 is desirable. This is because a 90° rotationally symmetrical structure is desirable to respond to a horizontally polarized wave and a vertically polarized wave.
The patch electrode PE has a length Px in a direction along the first direction X and a length Py in a direction along the second direction Y. The length Px and the length Py are desirably adjusted according to the frequency range of the incident wave w1. Next, a desirable relationship between the frequency range of the incident wave w1, and the length Px and the length Py will be exemplified.
2.4 GHz:Px=Py=35 mm
5.0 GHz:Px=Py=16.8 mm
28 GHz:Px=Py=3.0 mm
The width of the spacer SS is 10 μm or more and 20 μm or less. While the length Px and the length Py of the patch electrode PE are on the order of mm, a cross-sectional diameter of the spacer SS in the first direction X is on the order of μm. For this reason, the spacers SS need to exist in the areas opposed to the patch electrodes PE. In addition, a ratio of the areas where the plurality of spacers SS exist, of the areas opposed to the patch electrodes PE is approximately 1%. For this reason, even if the spacers SS exist in the above areas, the influence of the spacers SS on the reflected wave w2 is small. Incidentally, the spacers SS may be formed in the first substrate SUB1 and protrude toward the second substrate SUB2 side. Alternatively, the spacers SS may be spherical spacers.
The intelligent reflecting surface RE comprises a plurality of reflection controllers RH. Each reflection controller RH includes one patch electrode PE (i.e., the patch electrode PEL and the patch electrode PEF which overlap in the third direction) among the plurality of patch electrodes PE, a portion of the common electrode CE, which is opposed to the one patch electrode PE, and an area of the liquid crystal layer LC, which is opposed to the one patch electrode PE. Each reflection controller RH functions to adjust the phase of the radio wave (incident wave w1) made incident from the incident surface Sa side according to the voltage applied to the patch electrode PE, and urge the radio wave to be reflected on the incident surface Sa side as the reflected wave w2. In each reflection controller RH, the reflected wave w2 is a synthetic wave of the radio wave reflected on the patch electrode PE and the radio wave reflected on the common electrode CE. As described above, when the plurality of patch electrodes PEL are connected by the connection lines CL and the plurality of patch electrodes PEF are in the floating state, the voltage is applied to only the plurality of patch electrodes PEL.
The patch electrodes PE are arranged at regular intervals in the direction along the first direction X. A length (pitch) between adjacent patch electrodes PE is referred to as dk. The length dk corresponds to a distance from a geometric center of one patch electrode PE to a geometric center of the adjacent patch electrode PE. In the embodiment, it is assumed that the reflected waves w2 have the same phase in the first reflection direction d1. On the X-Z plane of
In order for the phases of the radio waves reflected on the plurality of reflection controllers RH to be aligned in the first reflection direction d1, the phases of the radio waves need only be aligned on the linear two-dot chain line. For example, the phase of the reflected wave w2 at point Q1b and the phase of the reflected wave w2 at point Q2a may be aligned. A physical linear distance from point Q1a to point Q1b of the first patch electrode PE1 is dk×sinθ1. Therefore, when the first reflection controller RH1 and the second reflection controller RH2 are focused, the phase of the reflected wave w2 from the second reflection controller RH2 may be delayed from the phase of the reflected wave w2 from the first reflection control section RH1 by a phase amount δ1. The phase amount δ1 is represented by the following equation.
δ1=dk×sin θ1×2π/λ
As shown in
In a second period Pd2 following the first period Pd1, voltages are applied to the plurality of patch electrodes PE such that the radio waves reflected by the plurality of reflection controllers RH are held in the same phase in the first reflection direction d1. For example, the second voltage V2 is applied to the first patch electrode PE1, the third voltage V3 is applied to the second patch electrode, and the fourth voltage V4 is applied to the third patch electrode PE3.
In each period Pd, the same voltage is applied to the plurality of patch electrodes PE of each patch electrode group GP via the connection lines CL.
When the potential of the common electrode CE is referred to as a reference, in each of the first period Pd1 and the second period Pd2, the polarity of the voltage applied to each patch electrode PE is periodically reversed. For example, the patch electrode PE is driven with a drive frequency of 60 Hz. Since the patch electrode PE is AC-driven, a fixed voltage is not applied to the liquid crystal layer LC for a long period. Since the occurrence of burning can be suppressed, deviation of the direction of the reflected wave w2 from the first reflection direction d1 can be suppressed.
Furthermore, in the embodiment, in each patch electrode PE, an absolute value of the voltage applied for the second period Pd2 is different from an absolute value of the voltage applied for the first period Pd1. Since the occurrence of burning can be sufficiently suppressed, the deviation of the direction of the reflected wave w2 from the first reflection direction d1 can be suppressed.
Even if the period Pd changes to another period Pd, the phase amount δ1 of the radio waves reflected in the first reflection direction d1 by one reflection controller RH and the radio waves reflected in the first reflection direction d1 by the adjacent reflection controller RH is maintained. In the embodiment, the phase amount δ1 is 60°.
In the example shown in
A seventh voltage may be applied to the seventh patch electrode PE7 for the first period Pd1 to assign a phase difference of 360° between the radio waves reflected in the first reflection direction d1 by the first reflection controller RH1 and the radio waves reflected in the first reflection direction d1 by the seventh reflection controller including the seventh patch electrode PE7. In the embodiment, however, the first voltage V1 is applied to the seventh patch electrode PE7 for the first period Pd1. A large number of patch electrodes PE can be driven while suppressing the types of voltages V, by a periodic voltage application pattern.
The intelligent reflecting surface RE of the embodiment is considered to be an intelligent reflecting surface comprising the stacked layer bodies of the patch electrodes PE and the dielectric layers in two layers. The intelligent reflecting surface comprising the stacked layer bodies in two layers can increase the phase difference amount as compared to a case of comprising only one layer of the stacked layer body. A specific example will be described below.
Px shown in
An intelligent reflecting surface in a case where the stacked layer body is provided in one layer, for example, the patch electrode PEF and the dielectric layer DLT2 are not provided, will be considered as a comparative example. The intelligent reflecting surface RE of the embodiment and the intelligent reflecting surface of the comparative example were compared under the conditions described below.
In the intelligent reflecting surface RE of the embodiment, the thickness tp1 of the dielectric layer DLT1 and the thickness tp2 of the DLT2 are set to 50 μm and 30 μm, respectively. The frequency of the incident wave w1, the length Px of the patch electrodes PE (patch electrodes PEF and PEL), and the distance wp between the patch electrodes PE are 28 GHz, 3,000 μm, and 50 μm, respectively.
In contrast, in the intelligent reflecting surface of the comparative example, the patch electrode PEF of the patch electrodes PE and the dielectric layer DLT2 are not provided as described above, i.e., the thickness tp2 of the dielectric layer DLT2 is 0 μm. Other conditions are the same as those of the intelligent reflecting surface RE of the embodiment.
In the intelligent reflecting surface RE of the embodiment, the reflectance was 0 dB to 10 dB, and the phase difference amount of the reflected radio wave was 280 dB. In the intelligent reflecting surface of the comparative example, the reflectance was 0 dB to dB and the phase difference amount was 180 dB. Thus, the phase difference amount of the reflected radio waves can be increased by forming the stacked layer bodies of the dielectric layers and the patch electrodes in two layers.
The dielectric constant ϵ1 of the dielectric layer DLT1 may be, for example, 2.5 or more and 3.5 or less. For example, the liquid crystal layer may be used as described above, but is not limited to this. As the dielectric layer DLT1, the other variable dielectric, more specifically, a dielectric whose dielectric constant can be varied by an operation from the outside may be used.
The dielectric constant ϵ2 of the dielectric layer DLT2 may be set to a fixed value, for example, 2.5. Dielectrics having such a dielectric constant ϵ2 include, for example, organic insulating materials, more specifically, polyimide or acrylic. The upper limit of the dielectric constant ϵ2 is desirably approximately twice the dielectric constant ϵ1.
The thickness tp2 of the dielectric layer DLT2 is set to 30 μm in the above description, but is not limited to this. The thickness tp2 may be approximately twice the thickness d1 of the dielectric layer DLT1, for example, more than 0 μm and less than or equal to 75 μm.
As described above, the intelligent reflecting surface RE of the embodiment can increase the phase difference amount of the reflected radio waves by forming the stacked layer bodies of the dielectric layers and the patch electrodes in two layers.
As shown in
The plurality of signal lines SL extend along the second direction Y and are arranged along the first direction X. The plurality of scanning lines GL extend along the first direction X and are arranged along the second direction Y. The plurality of scanning lines GL are connected to the drive circuit DRV. The switching element SW is provided near an intersection of one signal line SL and one scanning line GL. A plurality of lead lines LD are connected to the drive circuit DRV. Each of the signal lines SL and the lead lines LD may be connected to an outer lead bonding (OLB) pad.
An insulating layer GI is formed to cover the scanning line GL. A semiconductor layer SMC is provided on the insulating layer GI. The semiconductor layer SMC overlaps with the gate electrode GE and includes a first area R1 and a second area R2. One of the first region R1 and the second region R2 is a source region and the other is a drain region.
The gate electrode GE, the semiconductor layer SMC, and the like constitute a switching element SW as a thin-film transistor (TFT). The switching element SW may be a bottom-gate thin film transistor or a top-gate thin film transistor.
A source electrode SE is provided to be in contact with the first region R1 of the semiconductor layer SMC, and a drain electrode DE is provided to be in contact with the second region R2 of the semiconductor layer SMC. The source electrode SE may be formed integrally with the signal line SL.
An insulating layer ILI1 is formed on the insulating layer GI, the semiconductor layer SMC, the source electrode SE, and the drain electrode DE.
The patch electrode PE is L formed on the insulating layer ILI1. The patch electrode PEL is connected to the drain electrode DE through a contact hole CH formed in the insulating layer ILI1. The alignment film AL1 is formed on the insulating layer ILI2 and the patch electrode PEL.
The scanning line GL extending along the first direction X and the signal line SL extending along the second direction Y have intersecting regions having large widths, respectively. The region having the large width, of the scanning line GL, is the gate electrode GE, and the region having the large width, of the signal line SL, is the source electrode SE.
As shown in
On the active-matrix-driven intelligent reflecting surface RE as well, the phase difference amount of the reflected radio waves can be increased by forming the stacked layer bodies of the dielectric layers and the patch electrodes in two layers.
In the disclosure, the base BA1 and the base BA2 are referred to as a first base and a second base, respectively. The dielectric layer DLT1 and the dielectric layer DLT2 are referred to as a first dielectric layer and a second dielectric layer, respectively. The patch electrode PEL and the patch electrode PEF are referred to as a first patch electrode and a second patch electrode, respectively.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel embodiments described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the embodiments described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2021-060859 | Mar 2021 | JP | national |
This application is a Continuation Application of PCT Application No. PCT/JP2022/016566, filed Mar. 31, 2022, and based upon and claiming the benefit of priority from Japanese Patent Application No. 2021-060859, filed Mar. 31, 2021, the entire contents of all of which are incorporated herein by reference.
| Number | Date | Country | |
|---|---|---|---|
| Parent | PCT/JP2022/016566 | Mar 2022 | US |
| Child | 18477569 | US |
