This patent document is directed generally to video coding technologies.
Motion compensation is a technique in video processing to predict a frame in a video, given the previous and/or future frames by accounting for motion of the camera and/or objects in the video. Motion compensation can be used in the encoding and decoding of video data for video compression.
Devices, systems and methods related to intra-block copy for motion compensation are described.
In one representative aspect, the disclosed technology may be used to provide a method for video encoding using intra-block copy. This method includes determining whether a current block of the current picture is to be encoded using a motion compensation algorithm, and encoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
In another representative aspect, the disclosed technology may be used to provide another method for video encoding using intra-block copy. This method includes determining whether a current block of the current picture is to be encoded using an intra-block copy, and encoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
In yet another representative aspect, the disclosed technology may be used to provide a method for video decoding using intra-block copy. This method includes determining whether a current block of the current picture is to be decoded using a motion compensation algorithm, and decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
In yet another representative aspect, the disclosed technology may be used to provide another method for video decoding using intra-block copy. This method includes determining whether a current block of the current picture is to be decoded using an intra-block copy, and decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
In another example aspect, a method of decoding an encoded representation of visual information is disclosed. The method includes determining that a first encoded block being decoded representing a portion of the visual information is coded using a first coding technique; and decoding the coded representation by using a first decoding technique corresponding to the first coding technique and by excluding use of a second decoding technique corresponding to the second coding technique; wherein one of the two decoding techniques corresponds to a coding technique that uses a same video picture for coding the block being decoded as a reference picture, and the other of the two decoding techniques corresponds to Bi-directional Optical Flow (BIO) technique that refines the prediction samples using optical flow information with the visual information for coding the block being decoded.
In another example aspect, a method of generating encoded representation of visual information is disclosed. The method includes obtaining a first block to encode representing a portion of the visual information; and encoding the first block to encode by using a first encoding technique and by excluding use of a second encoding technique; wherein one of two encoding technique uses a same video picture for coding the block to encode as a reference picture and the other encoding technique corresponds to Bi-directional Optical Flow (BIO) technique that refines the prediction samples using optical flow information with the visual information for encoding the block to encode.
In yet another representative aspect, the above-described method is embodied in the form of processor-executable code and stored in a computer-readable program medium.
In yet another representative aspect, a device that is configured or operable to perform the above-described method is disclosed. The device may include a processor that is programmed to implement this method.
In yet another representative aspect, a video decoder apparatus may implement a method as described herein.
The above and other aspects and features of the disclosed technology are described in greater detail in the drawings, the description and the claims.
4 shows an example of motion vector prediction (MVP) for the AF_INTER affine motion mode.
Section headings are used in the present document for the ease of understanding and do not limit scope of the technologies and embodiments discussed in each section to just that section.
Due to the increasing demand of higher resolution visual information, such as video, images, three-dimensional scenes, etc., video coding methods and techniques are ubiquitous in modern technology. The techniques described in this application can apply to various visual information including video, images, three-dimensional scenes, etc. A picture of the visual information can be a frame in a video, a portion of an image, an object in a three-dimensional scene, a portion of the three-dimensional scene, etc. A block can be portion of the picture of the visual information such as a coding unit (CU), a largest coding unit (LCU), a sample, a prediction unit (PU) etc. as described in this application. A sub-block of the visual information can be a PU such as a sub-CU, a sample, etc. The PU can be a pixel, a voxel, or a smallest quantum of resolution of the visual information. Video codecs typically include an electronic circuit or software that compresses or decompresses digital video, and are continually being improved to provide higher coding efficiency. A video codec converts uncompressed video to a compressed format or vice versa. There are complex relationships between the video quality, the amount of data used to represent the video (determined by the bit rate), the complexity of the encoding and decoding algorithms, sensitivity to data losses and errors, ease of editing, random access, and end-to-end delay (latency). The compressed format usually conforms to a standard video compression specification, e.g., the High Efficiency Video Coding (HEVC) standard (also known as H.265 or MPEG-H Part 2), the Versatile Video Coding standard to be finalized, or other current and/or future video coding standards.
Embodiments of the disclosed technology may be applied to existing video coding standards (e.g., HEVC, H.265) and future standards to improve runtime performance. Section headings are used in the present document to improve readability of the description and do not in any way limit the discussion or the embodiments (and/or implementations) to the respective sections only.
1. Examples of Reference Pictures and Reference Picture Lists
In HEVC, there are two types of reference pictures, short-term and long-term. A reference picture may be marked as “unused for reference” when it becomes no longer needed for prediction reference. A completely new approach for reference picture management, referred to as reference picture set (RPS) or buffer description has been introduced by HEVC.
The process of marking pictures as “used for short-term reference”, “used for long-term reference”, or “unused for reference” is done using the RPS concept. An RPS is a set of picture indicators that is signaled in each slice header and consists of one set of short-term pictures and one set of long-term pictures. After the first slice header of a picture has been decoded, the pictures in the DPB are marked as specified by the RPS. The pictures in the DPB that are indicated in the short-term picture part of the RPS are kept as short-term pictures. The short-term or long-term pictures in the DPB that are indicated in the long-term picture part in the RPS are converted to or kept as long-term pictures. And finally, pictures in the DPB for which there is no indicator in the RPS are marked as unused for reference. Thus, all pictures that have been decoded that may be used as references for prediction of any subsequent pictures in decoding order must be included in the RPS.
An RPS consists of a set of picture order count (POC) values that are used for identifying the pictures in the DPB. Besides signaling POC information, the RPS also signals one flag for each picture. Each flag indicates whether the corresponding picture is available or unavailable for reference for the current picture. Note that even though a reference picture is signaled as unavailable for the current picture, it is still kept in the DPB and may be made available for reference later on and used for decoding future pictures.
From the POC information and the availability flag, five lists of reference pictures as shown in Table 1 can be created. The list RefPicSetStCurrBefore consists of short-term pictures that are available for reference for the current picture and have POC values that are lower than the POC value of the current picture. RefPicSetStCurrAfter consist of available short-term pictures with a POC value that is higher than the POC value of the current picture. RefPicSetStFoll is a list that contains all short-term pictures that are made unavailable for the current picture but may be used as reference pictures for decoding subsequent pictures in decoding order. Finally, the lists RefPicSetLtCurr and RefPicSetLtFoll contain long-term pictures that are available and unavailable for reference for the current picture, respectively.
1.1 Examples of Short-Term and Long-Term Reference Pictures
The syntax for the general sequence parameter set is shown below:
The syntax for the general slice segment header is shown below:
The semantics used in the syntax tables above are defined as:
num_short_term_ref_pic_sets specifies the number of st_ref_pic_set( ) syntax structures included in the SPS. The value of num_short_term_ref_pic_sets shall be in the range of 0 to 64, inclusive.
In some embodiments, a decoder may allocate memory for a total number of num_short_term_ref_pic_sets+1 st_ref_pic_set( ) syntax structures since there may be a st_ref_pic_set( ) syntax structure directly signaled in the slice headers of a current picture. A st_ref_pic_set( ) syntax structure directly signaled in the slice headers of a current picture has an index equal to num_short_term_ref_pic_sets.
long_term_ref_pics_present_flag equal to 0 specifies that no long-term reference picture is used for inter prediction of any coded picture in the CVS. long_term_ref_pics_present_flag equal to 1 specifies that long-term reference pictures may be used for inter prediction of one or more coded pictures in the CVS.
num_long_term_ref_pics_sps specifies the number of candidate long-term reference pictures that are specified in the SPS. The value of num_long_term_ref_pics_sps shall be in the range of 0 to 32, inclusive.
It_ref_pic_poc_lsb_sps[i] specifies the picture order count modulo MaxPicOrderCntLsb of the i-th candidate long-term reference picture specified in the SPS. The number of bits used to represent lt_ref_pic_poc_lsb_sps[i] is equal to log 2_max_pic_order_cnt_lsb_minus4+4.
used_by_curr_pic_it_sps_flag[i] equal to 0 specifies that the i-th candidate long-term reference picture specified in the SPS is not used for reference by a picture that includes in its long-term reference picture set (RPS) the i-th candidate long-term reference picture specified in the SPS.
short_term_ref_pic_set_sps_flag equal to 1 specifies that the short-term RPS of the current picture is derived based on one of the st_ref_pic_set( ) syntax structures in the active SPS that is identified by the syntax element short_term_ref_pic_set_idx in the slice header. short_term_ref_pic_set_sps_flag equal to 0 specifies that the short-term RPS of the current picture is derived based on the st_ref_pic_set( ) syntax structure that is directly included in the slice headers of the current picture. When num_short_term_ref_pic_sets is equal to 0, the value of short_term_ref_pic_set_sps_flag shall be equal to 0.
short_term_ref_pic_set_idx specifies the index, into the list of the st_ref_pic_set( ) syntax structures included in the active SPS, of the st_ref_pic_set( ) syntax structure that is used for derivation of the short-term RPS of the current picture. The syntax element short_term_ref_pic_set_idx is represented by Ceil(Log 2(num_short_term_ref_pic_sets)) bits. When not present, the value of short_term_ref_pic_set_idx is inferred to be equal to 0. The value of short_term_ref_pic_set_idx shall be in the range of 0 to num_short_term_ref_pic_sets−1, inclusive.
In some embodiments, the variable CurrRpsIdx is derived as follows:
num_long_term_sps specifies the number of entries in the long-term RPS of the current picture that are derived based on the candidate long-term reference pictures specified in the active SPS. The value of num_long_term_sps shall be in the range of 0 to num_long_term_ref_pics_sps, inclusive. When not present, the value of num_long_term_sps is inferred to be equal to 0.
num_long_term_pics specifies the number of entries in the long-term RPS of the current picture that are directly signaled in the slice header. When not present, the value of num_long_term_pics is inferred to be equal to 0.
In some embodiments, when nuh_layer_id is equal to 0, the value of num_long_term_pics shall be less than or equal to sps_max_dec_pic_buffering_minus1[TemporalId]−NumNegativePics[CurrRpsIdx]−NumPositivePics[CurrRpsIdx]−num_long_term_sps−TwoVersionsOfCurrDecPicFlag.
lt_idx_sps[i] specifies an index, into the list of candidate long-term reference pictures specified in the active SPS, of the i-th entry in the long-term RPS of the current picture. The number of bits used to represent lt_idx_sps[i] is equal to Ceil(Log 2(num_long_term_ref_pics_sps)). When not present, the value of lt_idx_sps[i] is inferred to be equal to 0. The value of lt_idx_sps[i] shall be in the range of 0 to num_long_term_ref_pics_sps−1, inclusive.
poc_isb_it[i] specifies the value of the picture order count modulo MaxPicOrderCntLsb of the i-th entry in the long-term RPS of the current picture. The length of the poc_lsb_lt[i] syntax element is log 2_max_pic_order_cnt_lsb_minus4+4 bits.
used_by_curr_pic_it_flag[i] equal to 0 specifies that the i-th entry in the long-term RPS of the current picture is not used for reference by the current picture.
In some embodiments, the variables PocLsbLt[i] and UsedByCurrPicLt[i] are derived as follows:
delta_poc_msb_present_flag[i] equal to 1 specifies that delta_poc_msb_cycle_lt[i] is present. delta_poc_msb_present_flag[i] equal to 0 specifies that delta_poc_msb_cycle_lt[i] is not present.
In some embodiments, let prevTid0Pic be the previous picture in decoding order that has TemporalId equal to 0 and is not a RASL, RADL or SLNR picture. Let setOfPrevPocVals be a set consisting of the following:
In some embodiments, when there is more than one value in setOfPrevPocVals for which the value modulo MaxPicOrderCntLsb is equal to PocLsbLt[i], delta_poc_msb_present_flag[i] shall be equal to 1.
delta_poc_msb_cycle_it[i] is used to determine the value of the most significant bits of the picture order count value of the i-th entry in the long-term RPS of the current picture. When delta_poc_msb_cycle_lt[i] is not present, it is inferred to be equal to 0.
In some embodiments, the variable DeltaPocMsbCycleLt[i] is derived as follows:
In some embodiments, the motion vector prediction is only allowed if the target reference picture type and the predicted reference picture type is the same. In other words, when the types are different, motion vector prediction is disallowed.
Advanced Motion Vector Prediction (AMVP) is an example of motion vector prediction that includes an existing implementation. The relevant portion of the existing AMVP implementation is detailed below.
The motion vector mvLXA and the availability flag availableFlagLXA are derived in the following ordered steps:
The motion vector mvLXB and the availability flag availableFlagLXB are derived in the following ordered steps:
Temporal Motion Vector Prediction (TMVP) is another example of motion vector prediction that includes an existing implementation. The relevant portion of the existing TMVP implementation is detailed below.
The variables mvLXCol and availableFlagLXCol are derived as follows:
Intra-block copy (IBC) has been extends the concept of motion compensation from inter-frame coding to intra-frame coding. As shown in
In HEVC-SCC, an inter-coded coding unit (CU) can apply IBC if it chooses the current picture as its reference picture. The MV is renamed as block vector (BV) in this case, and a BV always has an integer-pixel precision. To be compatible with main profile HEVC, the current picture is marked as a “long-term” reference picture in the Decoded Picture Buffer (DPB). It should be noted that similarly, in multiple view/3D video coding standards, the inter-view reference picture is also marked as a “long-term” reference picture.
2.1 Embodiments of Picture Marking when IBC is Enabled
Semantics related to IBC in PPS. pps_curr_pic_ref_enabled_flag equal to 1 specifies that a picture referring to the PPS may be included in a reference picture list of a slice of the picture itself. pps_curr_pic_ref_enabled_flag equal to 0 specifies that a picture referring to the PPS is never included in a reference picture list of a slice of the picture itself. When not present, the value of pps_curr_pic_ref_enabled_flag is inferred to be equal to 0.
It is a requirement of bitstream conformance that when sps_curr_pic_ref_enabled_flag is equal to 0, the value of pps_curr_pic_ref_enabled_flag shall be equal to 0.
The variable TwoVersionsOfCurrDecPicFlag is derived as follows:
TwoVersionsOfCurrDecPicFlag=pps_curr_pic_ref_enabled_flag && (sample_adaptive_offset_enabled_flag∥!pps_deblocking_filter_disabled_flag∥deblocking_filter_override_enabled_flag)
When sps_max_dec_pic_buffering_minus1[TemporalId] is equal to 0, the value of TwoVersionsOfCurrDecPicFlag shall be equal to 0.
Decoding process. The current decoded picture after the invocation of the in-loop filter process is stored in the DPB in an empty picture storage buffer, the DPB fullness is incremented by one and this picture is marked as “used for short-term reference”.
When TwoVersionsOfCurrDecPicFlag is equal to 1, the current decoded picture before the invocation of the in-loop filter process as specified in clause F.8.7 [1] is stored in the DPB in an empty picture storage buffer, the DPB fullness is incremented by one, and this picture is marked as “used for long-term reference”.
3. Examples of the Joint Exploration Model (JEM)
In some embodiments, future video coding technologies are explored using a reference software known as the Joint Exploration Model (JEM). In JEM, sub-block based prediction is adopted in several coding tools, such as affine prediction, alternative temporal motion vector prediction (ATMVP), spatial-temporal motion vector prediction (STMVP), bi-directional optical flow (BIO), Frame-Rate Up Conversion (FRUC), Locally Adaptive Motion Vector Resolution (LAMVR), Overlapped Block Motion Compensation (OBMC), Local Illumination Compensation (LIC), and Decoder-side Motion Vector Refinement (DMVR).
3.1 Examples of Affine Prediction
In HEVC, only a translation motion model is applied for motion compensation prediction (MCP). However, the camera and objects may have many kinds of motion, e.g. zoom in/out, rotation, perspective motions, and/or other irregular motions. JEM, on the other hand, applies a simplified affine transform motion compensation prediction.
As shown in
Here, MvPre is the motion vector fraction accuracy (e.g., 1/16 in JEM). (v2x, v2y) is motion vector of the bottom-left control point, calculated according to Eq. (1). M and N can be adjusted downward if necessary to make it a divisor of w and h, respectively.
In the JEM, there are two affine motion modes: AF_INTER mode and AF_MERGE mode. For CUs with both width and height larger than 8, AF_INTER mode can be applied. An affine flag in CU level is signaled in the bitstream to indicate whether AF_INTER mode is used. In the AF_INTER mode, a candidate list with motion vector pair {(v0, v1)|v0={vA, vB, vc}, v1 {vD, vE}} is constructed using the neighboring blocks.
When a CU is applied in AF_MERGE mode, it gets the first block coded with an affine mode from the valid neighboring reconstructed blocks.
After the CPMV of the current CU v0 and v1 are computed according to the affine motion model in Eq. (1), the MVF of the current CU can be generated. In order to identify whether the current CU is coded with AF_MERGE mode, an affine flag can be signaled in the bitstream when there is at least one neighboring block is coded in affine mode.
3.2 Examples of Alternative Temporal Motion Vector Prediction (ATMVP)
In the ATMVP method, the temporal motion vector prediction (TMVP) method is modified by fetching multiple sets of motion information (including motion vectors and reference indices) from blocks smaller than the current CU.
In the first step, a reference picture 650 and the corresponding block is determined by the motion information of the spatial neighboring blocks of the current CU 600. To avoid the repetitive scanning process of neighboring blocks, the first merge candidate in the merge candidate list of the current CU 600 is used. The first available motion vector as well as its associated reference index are set to be the temporal vector and the index to the motion source picture. This way, the corresponding block may be more accurately identified, compared with TMVP, wherein the corresponding block (sometimes called collocated block) is always in a bottom-right or center position relative to the current CU.
In the second step, a corresponding block of the sub-CU 651 is identified by the temporal vector in the motion source picture 650, by adding to the coordinate of the current CU the temporal vector. For each sub-CU, the motion information of its corresponding block (e.g., the smallest motion grid that covers the center sample) is used to derive the motion information for the sub-CU. After the motion information of a corresponding N×N block is identified, it is converted to the motion vectors and reference indices of the current sub-CU, in the same way as TMVP of HEVC, wherein motion scaling and other procedures apply. For example, the decoder checks whether the low-delay condition (e.g. the POCs of all reference pictures of the current picture are smaller than the POC of the current picture) is fulfilled and possibly uses motion vector MVx (e.g., the motion vector corresponding to reference picture list X) to predict motion vector MVy (e.g., with X being equal to 0 or 1 and Y being equal to 1−X) for each sub-CU.
3.3 Examples of Spatial-Temporal Motion Vector Prediction (STMVP)
In the STMVP method, the motion vectors of the sub-CUs are derived recursively, following raster scan order.
The motion derivation for sub-CU A starts by identifying its two spatial neighbors. The first neighbor is the N×N block above sub-CU A 701 (block c 713). If this block c (713) is not available or is intra coded the other N×N blocks above sub-CU A (701) are checked (from left to right, starting at block c 713). The second neighbor is a block to the left of the sub-CU A 701 (block b 712). If block b (712) is not available or is intra coded other blocks to the left of sub-CU A 701 are checked (from top to bottom, staring at block b 712). The motion information obtained from the neighboring blocks for each list is scaled to the first reference frame for a given list. Next, temporal motion vector predictor (TMVP) of sub-block A 701 is derived by following the same procedure of TMVP derivation as specified in HEVC. The motion information of the collocated block at block D 704 is fetched and scaled accordingly. Finally, after retrieving and scaling the motion information, all available motion vectors are averaged separately for each reference list. The averaged motion vector is assigned as the motion vector of the current sub-CU.
3.4 Examples of Bi-Directional Optical Flow (BIO)
The bi-directional optical flow (BIO) method is a sample-wise motion refinement performed on top of block-wise motion compensation for bi-prediction. In some implementations, the sample-level motion refinement does not use signaling.
Let I(k) be the luma value from reference k (k=0, 1) after block motion compensation, and ∂I(k)/∂x, ∂I(k)/∂y are horizontal and vertical components of the I(k) gradient, respectively. Assuming the optical flow is valid, the motion vector field (vx, vy) is given by:
∂I(k)/∂t+vx∂I(k)/∂x+vu∂I(k)/∂y=0. Eq. (3)
Combining this optical flow equation with Hermite interpolation for the motion trajectory of each sample results in a unique third-order polynomial that matches both the function values I(k) and derivatives ∂I(k)/∂x, ∂I(k)/∂y at the ends. The value of this polynomial at t=0 is the BIO prediction:
predBIO=½·(I(0)+I(1)+vx/2·(τ1∂I(1)/∂x−τ0∂I(0)/∂x)+vy/2·(τ1∂I(1)/∂y−τ0∂I(0)/∂y)). Eq. (4)
The motion vector field (vx, vy) is determined by minimizing the difference A between values in points A and B.
Δ=(I(0)−I(1)0+vx(τ1∂I(1)/∂x+τ0∂I(0)/∂x)+vy(τ1∂I(1)/∂y+τ0∂I(0)/∂y)) Eq. (5)
All values in the above equation depend on the sample location, denoted as (i′, j′). Assuming the motion is consistent in the local surrounding area, Δ can be minimized inside the (2M+1)×(2M+1) square window Ω centered on the currently predicted point (i, j), where M is equal to 2:
For this optimization problem, the JEM uses a simplified approach making first a minimization in the vertical direction and then in the horizontal direction. This results in the following:
where,
In order to avoid division by zero or a very small value, regularization parameters r and m can be introduced in Eq. (7) and Eq. (8), where:
r=500·4d-8 Eq. (10)
m=700·4d-8 Eq. (11)
Here, d is bit depth of the video samples.
In order to keep the memory access for BIO the same as for regular bi-predictive motion compensation, all prediction and gradients values, I(k), ∂I(k)/∂x, ∂I(k)/∂y are calculated for positions inside the current block.
With BIO, it is possible that the motion field can be refined for each sample. To reduce the computational complexity, a block-based design of BIO is used in the JEM. The motion refinement can be calculated based on a 4×4 block. In the block-based BIO, the values of sn in Eq. (9) of all samples in a 4×4 block can be aggregated, and then the aggregated values of sn in are used to derived BIO motion vectors offset for the 4×4 block. More specifically, the following formula can used for block-based BIO derivation:
Here, bk denotes the set of samples belonging to the k-th 4×4 block of the predicted block. sn in Eq (7) and Eq (8) are replaced by ((sn,bk)>>4) to derive the associated motion vector offsets.
In some scenarios, MV regiment of BIO may be unreliable due to noise or irregular motion. Therefore, in BIO, the magnitude of MV regiment is clipped to a threshold value. The threshold value is determined based on whether the reference pictures of the current picture are all from one direction. For example, if all the reference pictures of the current picture are from one direction, the value of the threshold is set to 12×214-d; otherwise, it is set to 12×213-d.
Gradients for BIO can be calculated at the same time with motion compensation interpolation using operations consistent with HEVC motion compensation process (e.g., 2D separable Finite Impulse Response (FIR)). In some embodiments, the input for the 2D separable FIR is the same reference frame sample as for motion compensation process and fractional position (fracX, fracY) according to the fractional part of block motion vector. For horizontal gradient ∂I/∂x, a signal is first interpolated vertically using BIOfilterS corresponding to the fractional position fracY with de-scaling shift d−8. Gradient filter BIOfilterG is then applied in horizontal direction corresponding to the fractional position fracX with de-scaling shift by 18−d. For vertical gradient ∂I/∂y, a gradient filter is applied vertically using BIOfilterG corresponding to the fractional position fracY with de-scaling shift d−8. The signal displacement is then performed using BIOfilterS in horizontal direction corresponding to the fractional position fracX with de-scaling shift by 18−d. The length of interpolation filter for gradients calculation BIOfilterG and signal displacement BIOfilterF can be shorter (e.g., 6-tap) in order to maintain reasonable complexity. Table 2 shows example filters that can be used for gradients calculation of different fractional positions of block motion vector in BIO. Table 3 shows example interpolation filters that can be used for prediction signal generation in BIO.
In the JEM, BIG can be applied to all bi-predicted blocks when the two predictions are from different reference pictures. When Local Illumination Compensation (LIC) is enabled for a CU, BIG can be disabled.
In some embodiments, OBMC is applied for a block after normal MC process. To reduce the computational complexity, BIG may not be applied during the OBMC process. This means that BIG is applied in the MC process for a block when using its own MV and is not applied in the MC process when the MV of a neighboring block is used during the OBMC process.
4. Exemplary Methods for IBC in Video Coding
The methods 1600, 1700, 1800 and 1900, described in the context of
Example 1. After determining that the current picture must be stored in the buffer for a duration corresponding to the duration of a long-term reference picture, the current picture is not marked as a “long-term” reference picture in a buffer (e.g., a decoded picture buffer). Instead, it is marked as a new type of reference picture different from “short-term” or “long-term”. For example, it may be marked as a “current” reference picture, a “self” reference picture, an “instant” reference picture, an “intra block copy” reference picture, and so on.
Example 2. It is proposed that affine prediction cannot be applied for IBC coded blocks. In this case, when a block is coded with IBC mode, the signaling of indications of affine prediction is skipped.
Example 3. It is proposed that IBC cannot be applied for a block with affine prediction. In this case, when a block is coded with affine mode, the signaling of indications of IBC is skipped.
Example 4. Alternatively, it is proposed that affine prediction can be applied for IBC coded blocks. In this case, the indications of affine and IBC may be both signaled. When affine prediction is applied for a IBC coded block, the following may further apply:
Example 5. It is proposed that the temporal vector used in the first step of ATMVP cannot be derived from a neighboring block coded with IBC. In one example, a neighboring block with the current picture as its reference picture is marked as “unavailable” or intra-coded in the first step of ATMVP.
Example 6. It is proposed that a sub-CU's corresponding block is marked as “unavailable” or intra-coded if the corresponding block is coded with IBC in the second step of ATMVP.
Example 7. Alternatively, it is proposed that the motion information of a sub-CU's corresponding block is copied to the Sub-CU without any scaling if corresponding block is coded with IBC in the second step of ATMVP. The Sub-CU applies IBC with the same MV as the corresponding block but the reference picture is changed to the current picture.
Example 8. More than one ATMVP candidates may be added wherein one may be derived from temporal neighboring blocks using above methods and the other one is derived from temporal neighboring blocks with at least one sub-CU with different way of deriving sub-CU motion information if the co-located sub-CU is coded with IBC.
Example 9. It is proposed a neighbouring block is marked as “unavailable” or intra-coded if the corresponding block is coded with IBC in STMVP.
Example 10. Alternatively, it is proposed the motion information of a neighbouring block is copied to the Sub-CU without any scaling if the neighbouring block is coded with IBC in STMVP. The Sub-CU applies IBC with the same MV as the neighbouring block.
Example 11. It is proposed that the averaged (or other kinds of derivation function, like weighted average) motion vector can only be derived from MVs all referring to the current picture or all referring to a reference picture not identical to the current picture.
Example 12. More than one STMVP candidates may be added wherein one may be derived from neighboring blocks with non-current pictures of all sub-CUs and one may be derived from neighboring blocks with current-pictures of all sub-CUs.
Example 13. It is proposed that BIO cannot be applied for IBC coded blocks. In one example, if at least one reference picture of the current block is the current picture, BIO is not conducted in the current block. Listed below are some examples of the technology described in this application. A block, as used in this application, can be a contiguous or a noncontiguous collection of pixels, voxels, sub-pixels, and/or sub-voxels. For example, a block can be rectilinear, such as a 4×4 square, 6×4 rectangle, or curvilinear, such as an ellipse.
A portion of the visual information, as used in this application, can be a subset of visual information. A coded representation, as used in this application, can be a bitstream representing the visual information that has been encoded using one of the techniques described in this application. An indicator, as used in this application, can be a flag or a field in the coded representation or can be multiple separate flags or fields.
A decoding technique, as used in this application can be applied by a decoder and can be implemented in hardware or software. The decoding technique can undo in reverse sequence everything a coder does. When an appropriate decoding technique is applied to an encoded representation, a visual information can be obtained as a result.
An initial block in the plurality of blocks, as used in this application, is a block occurring before the first block in the coded representation.
Property can include a luma of the sample, an x-direction and/or a y-direction gradient of the luma, a distance between the second sample and the third and fourth corresponding samples. The difference the values to minimize can be expressed by equation (5).
The obtained values can include luma values, values of luma gradients in the X-direction and/or values of luma gradients in the Y-direction.
Listing of examples:
14 is a block diagram illustrating an example of the architecture for a computer system or other control device 2000 that can be utilized to implement various portions of the presently disclosed technology, including (but not limited to) methods 1600, 1700, 1800 and 1900. In
The processor(s) 2005 may include central processing units (CPUs) to control the overall operation of, for example, the host computer. In certain embodiments, the processor(s) 2005 accomplish this by executing software or firmware stored in memory 2010. The processor(s) 2005 may be, or may include, one or more programmable general-purpose or special-purpose microprocessors, digital signal processors (DSPs), programmable controllers, application specific integrated circuits (ASICs), programmable logic devices (PLDs), or the like, or a combination of such devices.
The memory 2010 can be or include the main memory of the computer system. The memory 2010 represents any suitable form of random access memory (RAM), read-only memory (ROM), flash memory, or the like, or a combination of such devices. In use, the memory 2010 may contain, among other things, a set of machine instructions which, when executed by processor 2005, causes the processor 2005 to perform operations to implement embodiments of the presently disclosed technology.
Also connected to the processor(s) 2005 through the interconnect 2025 is a (optional) network adapter 2015. The network adapter 2015 provides the computer system 2000 with the ability to communicate with remote devices, such as the storage clients, and/or other storage servers, and may be, for example, an Ethernet adapter or Fiber Channel adapter.
To support various functions of the mobile device 2100, the memory 2102 can store information and data, such as instructions, software, values, images, and other data processed or referenced by the processor 2101. For example, various types of Random Access Memory (RAM) devices, Read Only Memory (ROM) devices, Flash Memory devices, and other suitable storage media can be used to implement storage functions of the memory 2102. In some implementations, the mobile device 2100 includes an input/output (I/O) unit 2103 to interface the processor 2101 and/or memory 2102 to other modules, units or devices. For example, the I/O unit 2103 can interface the processor 2101 and memory 2102 with to utilize various types of wireless interfaces compatible with typical data communication standards, e.g., such as between the one or more computers in the cloud and the user device. In some implementations, the mobile device 2100 can interface with other devices using a wired connection via the I/O unit 2103. The mobile device 2100 can also interface with other external interfaces, such as data storage, and/or visual or audio display devices 2104, to retrieve and transfer data and information that can be processed by the processor, stored in the memory, or exhibited on an output unit of a display device 2104 or an external device. For example, the display device 2104 can display a video frame that includes a block (a CU, PU or TU) that applies the intra-block copy based on whether the block is encoded using a motion compensation algorithm, and in accordance with the disclosed technology.
In some embodiments, a video decoder apparatus may implement a method of video decoding in which the intra-block copy as described herein is used for video decoding. The method may be similar to the above-described methods 1600, 1700, 1800 and 1900.
In some embodiments, a decoder-side method of video decoding may use the intra-block copy for improving video quality by determining whether a current block of the current picture is to be decoded using a motion compensation algorithm, and decoding, based on the determining, the current block by selectively applying an intra-block copy to the current block.
In other embodiments, a decoder-side method of video decoding may use the intra-block copy for improving video quality by determining whether a current block of the current picture is to be decoded using an intra-block copy, and decoding, based on the determining, the current block by selectively applying a motion compensation algorithm to the current block.
In some embodiments, the video decoding methods may be implemented using a decoding apparatus that is implemented on a hardware platform as described with respect to
Below are improvements measured by incorporating IBC into VTM-1.0, which is a reference software for the video coding standard named Versatile Video Coding (VVC). VTM stands for VVC Test Model.
In the above table, “Y”, “U”, “V” represent colors in the YUV color encoding system which encodes a color image or video taking human perception into account. The EncT and DecT represent a ratio of the encoding and decoding time using the IBC compared to the encoding and decoding time without the IBC, respectively. Specifically,
EncT=TestEncodingTime/anchorEncodingTime
DecT=TestEncodingTime/anchorEncodingTime.
The various classes, such as Class A1, Class A2, etc., represent a grouping of standard video sequences used in testing performance of various video coding techniques. The negative percentages under the “Y”, “U”, “V” columns represent bit-rate savings when IBC is added to VTM-1.0. The percentages under the EncT and DecT columns that are over 100% show how much the encoding/decoding with IBC is slower than encoding/decoding without IBC. For example, a percentage of 150% means that the encoding/decoding with IBC is 50% slower than the encoding/decoding without the IBC. The percentage below 100% shows how much the encoding/decoding with IBC is faster than encoding/decoding without the IBC. Two classes, class F and class SCC, highlighted in green in the table above, show that bit-rate savings exceed 3%.
From the foregoing, it will be appreciated that specific embodiments of the presently disclosed technology have been described herein for purposes of illustration, but that various modifications may be made without deviating from the scope of the invention. Accordingly, the presently disclosed technology is not limited except as by the appended claims.
Implementations of the subject matter and the functional operations described in this patent document can be implemented in various systems, digital electronic circuitry, or in computer software, firmware, or hardware, including the structures disclosed in this specification and their structural equivalents, or in combinations of one or more of them. Implementations of the subject matter described in this specification can be implemented as one or more computer program products, i.e., one or more modules of computer program instructions encoded on a tangible and non-transitory computer readable medium for execution by, or to control the operation of, data processing apparatus. The computer readable medium can be a machine-readable storage device, a machine-readable storage substrate, a memory device, a composition of matter effecting a machine-readable propagated signal, or a combination of one or more of them. The term “data processing unit” or “data processing apparatus” encompasses all apparatus, devices, and machines for processing data, including by way of example a programmable processor, a computer, or multiple processors or computers. The apparatus can include, in addition to hardware, code that creates an execution environment for the computer program in question, e.g., code that constitutes processor firmware, a protocol stack, a database management system, an operating system, or a combination of one or more of them.
A computer program (also known as a program, software, software application, script, or code) can be written in any form of programming language, including compiled or interpreted languages, and it can be deployed in any form, including as a stand-alone program or as a module, component, subroutine, or other unit suitable for use in a computing environment. A computer program does not necessarily correspond to a file in a file system. A program can be stored in a portion of a file that holds other programs or data (e.g., one or more scripts stored in a markup language document), in a single file dedicated to the program in question, or in multiple coordinated files (e.g., files that store one or more modules, sub programs, or portions of code). A computer program can be deployed to be executed on one computer or on multiple computers that are located at one site or distributed across multiple sites and interconnected by a communication network.
The processes and logic flows described in this specification can be performed by one or more programmable processors executing one or more computer programs to perform functions by operating on input data and generating output. The processes and logic flows can also be performed by, and apparatus can also be implemented as, special purpose logic circuitry, e.g., an FPGA (field programmable gate array) or an ASIC (application specific integrated circuit).
Processors suitable for the execution of a computer program include, by way of example, both general and special purpose microprocessors, and any one or more processors of any kind of digital computer. Generally, a processor will receive instructions and data from a read only memory or a random access memory or both. The essential elements of a computer are a processor for performing instructions and one or more memory devices for storing instructions and data. Generally, a computer will also include, or be operatively coupled to receive data from or transfer data to, or both, one or more mass storage devices for storing data, e.g., magnetic, magneto optical disks, or optical disks. However, a computer need not have such devices. Computer readable media suitable for storing computer program instructions and data include all forms of nonvolatile memory, media and memory devices, including by way of example semiconductor memory devices, e.g., EPROM, EEPROM, and flash memory devices. The processor and the memory can be supplemented by, or incorporated in, special purpose logic circuitry.
It is intended that the specification, together with the drawings, be considered exemplary only, where exemplary means an example. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. Additionally, the use of “or” is intended to include “and/or”, unless the context clearly indicates otherwise.
While this patent document contains many specifics, these should not be construed as limitations on the scope of any invention or of what may be claimed, but rather as descriptions of features that may be specific to particular embodiments of particular inventions. Certain features that are described in this patent document in the context of separate embodiments can also be implemented in combination in a single embodiment. Conversely, various features that are described in the context of a single embodiment can also be implemented in multiple embodiments separately or in any suitable subcombination. Moreover, although features may be described above as acting in certain combinations and even initially claimed as such, one or more features from a claimed combination can in some cases be excised from the combination, and the claimed combination may be directed to a subcombination or variation of a subcombination.
Similarly, while operations are depicted in the drawings in a particular order, this should not be understood as requiring that such operations be performed in the particular order shown or in sequential order, or that all illustrated operations be performed, to achieve desirable results. Moreover, the separation of various system components in the embodiments described in this patent document should not be understood as requiring such separation in all embodiments.
Only a few implementations and examples are described and other implementations, enhancements and variations can be made based on what is described and illustrated in this patent document.
Number | Date | Country | Kind |
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PCT/CN2018/089920 | Jun 2018 | WO | international |
This application is a continuation of U.S. application Ser. No. 17/011,157, filed on Sep. 3, 2020, which is based on International Application No. PCT/IB2019/054614, filed on Jun. 4, 2019, which claims the priority to and benefits of International Patent Application No. PCT/CN2018/089920, filed on Jun. 5, 2018. All the patent application is hereby incorporated by reference in their entireties.
Number | Name | Date | Kind |
---|---|---|---|
7529302 | Mukerjee et al. | May 2009 | B2 |
8184715 | Rosenzweig et al. | May 2012 | B1 |
8462846 | Zhang | Jun 2013 | B2 |
9294777 | Wang | Mar 2016 | B2 |
9374595 | Kim et al. | Jun 2016 | B2 |
9432684 | Lee et al. | Aug 2016 | B2 |
9521425 | Chen et al. | Dec 2016 | B2 |
9615089 | Fartukov et al. | Apr 2017 | B2 |
9667996 | Chen et al. | May 2017 | B2 |
9674542 | Chen et al. | Jun 2017 | B2 |
9762927 | Chen et al. | Sep 2017 | B2 |
9900593 | Xiu et al. | Feb 2018 | B2 |
9948930 | Panusopone et al. | Apr 2018 | B2 |
9955186 | Chon et al. | Apr 2018 | B2 |
10045014 | Zhang et al. | Aug 2018 | B2 |
10142655 | Lin et al. | Nov 2018 | B2 |
10298950 | Wang et al. | May 2019 | B2 |
10362330 | Li et al. | Jul 2019 | B1 |
10404990 | Hendry et al. | Sep 2019 | B2 |
10419763 | Huang et al. | Sep 2019 | B2 |
10440378 | Xu et al. | Oct 2019 | B1 |
10448010 | Chen et al. | Oct 2019 | B2 |
10484686 | Xiu et al. | Nov 2019 | B2 |
10491902 | Xu et al. | Nov 2019 | B1 |
10523964 | Chuang et al. | Dec 2019 | B2 |
10560712 | Zou et al. | Feb 2020 | B2 |
10701366 | Chen et al. | Jun 2020 | B2 |
10708592 | Dong et al. | Jul 2020 | B2 |
10757417 | Zhang et al. | Aug 2020 | B2 |
10778999 | Li et al. | Sep 2020 | B2 |
10779002 | Chen et al. | Sep 2020 | B2 |
10785494 | Chien et al. | Sep 2020 | B2 |
10805630 | Li et al. | Oct 2020 | B2 |
10841609 | Liu et al. | Nov 2020 | B1 |
10904565 | Chuang et al. | Jan 2021 | B2 |
11172196 | Zhang et al. | Nov 2021 | B2 |
11197003 | Zhang et al. | Dec 2021 | B2 |
11197007 | Zhang et al. | Dec 2021 | B2 |
11202065 | Zhang et al. | Dec 2021 | B2 |
11202081 | Zhang et al. | Dec 2021 | B2 |
11477463 | Zhang et al. | Oct 2022 | B2 |
11509915 | Zhang et al. | Nov 2022 | B2 |
11523123 | Zhang et al. | Dec 2022 | B2 |
11616945 | Zhang et al. | Mar 2023 | B2 |
20070192762 | Eichenberger et al. | Aug 2007 | A1 |
20110002386 | Zhang | Jan 2011 | A1 |
20110194609 | Rusert et al. | Aug 2011 | A1 |
20110200107 | Ryu | Aug 2011 | A1 |
20120219216 | Sato | Aug 2012 | A1 |
20120287999 | Li et al. | Nov 2012 | A1 |
20120320984 | Zhou et al. | Dec 2012 | A1 |
20130003842 | Kondo | Jan 2013 | A1 |
20130101041 | Fishwick et al. | Apr 2013 | A1 |
20130107958 | Shimada et al. | May 2013 | A1 |
20130128976 | Koyama et al. | May 2013 | A1 |
20130182755 | Chen et al. | Jul 2013 | A1 |
20130229485 | Rusanovskyy et al. | Sep 2013 | A1 |
20130272410 | Seregin et al. | Oct 2013 | A1 |
20130329007 | Zhang et al. | Dec 2013 | A1 |
20140086325 | Chen et al. | Mar 2014 | A1 |
20140286408 | Zhang et al. | Sep 2014 | A1 |
20140286416 | Jeon et al. | Sep 2014 | A1 |
20140294066 | Kondo | Oct 2014 | A1 |
20140294078 | Seregin et al. | Oct 2014 | A1 |
20140334551 | Kim et al. | Nov 2014 | A1 |
20150023423 | Zhang et al. | Jan 2015 | A1 |
20150181216 | Zhang et al. | Jun 2015 | A1 |
20150249828 | Rosewarne et al. | Sep 2015 | A1 |
20150312588 | Yamamoto et al. | Oct 2015 | A1 |
20150373350 | Hendry et al. | Dec 2015 | A1 |
20150373357 | Pang et al. | Dec 2015 | A1 |
20150373362 | Pang et al. | Dec 2015 | A1 |
20160057420 | Pang et al. | Feb 2016 | A1 |
20160073132 | Zhang et al. | Mar 2016 | A1 |
20160100189 | Pang et al. | Apr 2016 | A1 |
20160142729 | Wang et al. | May 2016 | A1 |
20160286229 | Li et al. | Sep 2016 | A1 |
20160366441 | An et al. | Dec 2016 | A1 |
20160373756 | Yu et al. | Dec 2016 | A1 |
20170054996 | Xu et al. | Feb 2017 | A1 |
20170085905 | Kadono et al. | Mar 2017 | A1 |
20170142418 | Li et al. | May 2017 | A1 |
20170223378 | Tao et al. | Aug 2017 | A1 |
20170238005 | Chien et al. | Aug 2017 | A1 |
20170238011 | Pettersson et al. | Aug 2017 | A1 |
20170272748 | Seregin et al. | Sep 2017 | A1 |
20170272782 | Li et al. | Sep 2017 | A1 |
20170289566 | He et al. | Oct 2017 | A1 |
20170310990 | Hsu | Oct 2017 | A1 |
20170332095 | Zou et al. | Nov 2017 | A1 |
20170332099 | Lee et al. | Nov 2017 | A1 |
20170339404 | Panusopone et al. | Nov 2017 | A1 |
20170339405 | Wang et al. | Nov 2017 | A1 |
20180041762 | Ikai et al. | Feb 2018 | A1 |
20180048889 | Zhang et al. | Feb 2018 | A1 |
20180054628 | Pettersson et al. | Feb 2018 | A1 |
20180063553 | Zhang et al. | Mar 2018 | A1 |
20180098062 | Li et al. | Apr 2018 | A1 |
20180098087 | Li et al. | Apr 2018 | A1 |
20180124394 | Xu et al. | May 2018 | A1 |
20180131952 | Xiu et al. | May 2018 | A1 |
20180184117 | Chen et al. | Jun 2018 | A1 |
20180192069 | Chen et al. | Jul 2018 | A1 |
20180192072 | Chen | Jul 2018 | A1 |
20180199056 | Sato | Jul 2018 | A1 |
20180220149 | Son et al. | Aug 2018 | A1 |
20180247396 | Pouli et al. | Aug 2018 | A1 |
20180249172 | Chen | Aug 2018 | A1 |
20180270500 | Li et al. | Sep 2018 | A1 |
20180278951 | Seregin et al. | Sep 2018 | A1 |
20180288425 | Panusopone et al. | Oct 2018 | A1 |
20180288441 | Zhang et al. | Oct 2018 | A1 |
20180324454 | Lin et al. | Nov 2018 | A1 |
20180332298 | Liu et al. | Nov 2018 | A1 |
20180376166 | Chuang et al. | Dec 2018 | A1 |
20190020895 | Liu et al. | Jan 2019 | A1 |
20190037231 | Ikai et al. | Jan 2019 | A1 |
20190052886 | Chiang et al. | Feb 2019 | A1 |
20190058897 | Han et al. | Feb 2019 | A1 |
20190068977 | Zhang et al. | Feb 2019 | A1 |
20190075293 | Lim et al. | Mar 2019 | A1 |
20190104303 | Xiu et al. | Apr 2019 | A1 |
20190124332 | Lim et al. | Apr 2019 | A1 |
20190158866 | Kim | May 2019 | A1 |
20190182504 | Lainema | Jun 2019 | A1 |
20190191171 | Ikai et al. | Jun 2019 | A1 |
20190222859 | Chuang et al. | Jul 2019 | A1 |
20190246128 | Xu et al. | Aug 2019 | A1 |
20190246143 | Zhang | Aug 2019 | A1 |
20190273943 | Zhao et al. | Sep 2019 | A1 |
20190306502 | Gadde et al. | Oct 2019 | A1 |
20190320181 | Chen et al. | Oct 2019 | A1 |
20190320189 | Cooper et al. | Oct 2019 | A1 |
20190335170 | Lee et al. | Oct 2019 | A1 |
20190342547 | Lee et al. | Nov 2019 | A1 |
20190364295 | Li et al. | Nov 2019 | A1 |
20190373259 | Xu | Dec 2019 | A1 |
20190373261 | Eglimez et al. | Dec 2019 | A1 |
20190387250 | Boyce et al. | Dec 2019 | A1 |
20200021837 | Ikai et al. | Jan 2020 | A1 |
20200021839 | Pham Van et al. | Jan 2020 | A1 |
20200045310 | Chen et al. | Feb 2020 | A1 |
20200045311 | Yoo | Feb 2020 | A1 |
20200053364 | Seo | Feb 2020 | A1 |
20200059658 | Chien et al. | Feb 2020 | A1 |
20200084441 | Lee et al. | Mar 2020 | A1 |
20200084454 | Liu et al. | Mar 2020 | A1 |
20200099951 | Hung et al. | Mar 2020 | A1 |
20200112741 | Han et al. | Apr 2020 | A1 |
20200120334 | Xu et al. | Apr 2020 | A1 |
20200128237 | Xu et al. | Apr 2020 | A1 |
20200128258 | Chen et al. | Apr 2020 | A1 |
20200137398 | Zhao et al. | Apr 2020 | A1 |
20200145688 | Zou et al. | May 2020 | A1 |
20200154127 | Lee | May 2020 | A1 |
20200169726 | Kim et al. | May 2020 | A1 |
20200177911 | Aono et al. | Jun 2020 | A1 |
20200213594 | Liu et al. | Jul 2020 | A1 |
20200213612 | Liu et al. | Jul 2020 | A1 |
20200213622 | Xu et al. | Jul 2020 | A1 |
20200221077 | Park et al. | Jul 2020 | A1 |
20200221110 | Chien et al. | Jul 2020 | A1 |
20200221120 | Robert et al. | Jul 2020 | A1 |
20200267408 | Lee et al. | Aug 2020 | A1 |
20200275120 | Lin et al. | Aug 2020 | A1 |
20200296380 | Aono et al. | Sep 2020 | A1 |
20200296382 | Zhao et al. | Sep 2020 | A1 |
20200296415 | Chen et al. | Sep 2020 | A1 |
20200336738 | Xiu et al. | Oct 2020 | A1 |
20200351505 | Seo | Nov 2020 | A1 |
20200359029 | Liu et al. | Nov 2020 | A1 |
20200374543 | Liu et al. | Nov 2020 | A1 |
20200374544 | Liu et al. | Nov 2020 | A1 |
20200382771 | Liu et al. | Dec 2020 | A1 |
20200382795 | Zhang et al. | Dec 2020 | A1 |
20200382807 | Liu et al. | Dec 2020 | A1 |
20200396453 | Zhang et al. | Dec 2020 | A1 |
20200396462 | Zhang et al. | Dec 2020 | A1 |
20200396465 | Zhang et al. | Dec 2020 | A1 |
20200404255 | Zhang et al. | Dec 2020 | A1 |
20200404260 | Zhang et al. | Dec 2020 | A1 |
20200413048 | Zhang et al. | Dec 2020 | A1 |
20210006780 | Zhang et al. | Jan 2021 | A1 |
20210006787 | Zhang et al. | Jan 2021 | A1 |
20210029356 | Zhang et al. | Jan 2021 | A1 |
20210029362 | Liu et al. | Jan 2021 | A1 |
20210029368 | Zhang et al. | Jan 2021 | A1 |
20210037240 | Zhang et al. | Feb 2021 | A1 |
20210037256 | Zhang et al. | Feb 2021 | A1 |
20210051339 | Liu et al. | Feb 2021 | A1 |
20210067783 | Liu et al. | Mar 2021 | A1 |
20210076050 | Zhang et al. | Mar 2021 | A1 |
20210076063 | Liu et al. | Mar 2021 | A1 |
20210092379 | Zhang et al. | Mar 2021 | A1 |
20210092435 | Liu et al. | Mar 2021 | A1 |
20210105482 | Zhang et al. | Apr 2021 | A1 |
20210152846 | Zhang et al. | May 2021 | A1 |
20210203958 | Zhang et al. | Jul 2021 | A1 |
20210218980 | Zhang et al. | Jul 2021 | A1 |
20210227234 | Zhang et al. | Jul 2021 | A1 |
20210352302 | Zhang et al. | Nov 2021 | A1 |
20210392341 | Zhang et al. | Dec 2021 | A1 |
20220070488 | Chen et al. | Mar 2022 | A1 |
20220070489 | Zhang et al. | Mar 2022 | A1 |
20220217363 | Zhang et al. | Jul 2022 | A1 |
20220264125 | Zhang et al. | Aug 2022 | A1 |
Number | Date | Country |
---|---|---|
3025490 | Dec 2017 | CA |
3037685 | Mar 2018 | CA |
1672174 | Sep 2005 | CN |
1710959 | Dec 2005 | CN |
1777283 | May 2006 | CN |
101605255 | Dec 2009 | CN |
101895751 | Nov 2010 | CN |
102577388 | Jul 2012 | CN |
103561263 | Feb 2014 | CN |
104053005 | Sep 2014 | CN |
104170381 | Nov 2014 | CN |
104221376 | Dec 2014 | CN |
107979756 | May 2015 | CN |
104904207 | Sep 2015 | CN |
105306944 | Feb 2016 | CN |
105532000 | Apr 2016 | CN |
105678808 | Jun 2016 | CN |
105723713 | Jun 2016 | CN |
105917650 | Aug 2016 | CN |
106303543 | Jan 2017 | CN |
106416245 | Feb 2017 | CN |
106537915 | Mar 2017 | CN |
106559669 | Apr 2017 | CN |
106688232 | May 2017 | CN |
107079161 | Aug 2017 | CN |
107113424 | Aug 2017 | CN |
107113442 | Aug 2017 | CN |
107211156 | Sep 2017 | CN |
107409225 | Nov 2017 | CN |
107426568 | Dec 2017 | CN |
107534778 | Jan 2018 | CN |
107615765 | Jan 2018 | CN |
107852490 | Mar 2018 | CN |
107925775 | Apr 2018 | CN |
108012153 | May 2018 | CN |
108028929 | May 2018 | CN |
108432250 | Aug 2018 | CN |
108632629 | Oct 2018 | CN |
112020829 | Dec 2020 | CN |
3788782 | Mar 2021 | EP |
2539213 | Dec 2016 | GB |
H08186825 | Jul 1996 | JP |
2007272733 | Oct 2007 | JP |
2011077761 | Apr 2011 | JP |
2013098745 | May 2013 | JP |
2021513818 | May 2021 | JP |
20200128154 | Nov 2020 | KR |
201540047 | Oct 2015 | TW |
201709738 | Mar 2017 | TW |
201832557 | Sep 2018 | TW |
2000065829 | Nov 2000 | WO |
2009080133 | Jul 2009 | WO |
2013168407 | Nov 2013 | WO |
2016048834 | Mar 2016 | WO |
2016057701 | Apr 2016 | WO |
2016091161 | Jun 2016 | WO |
2016138513 | Sep 2016 | WO |
2016183224 | Nov 2016 | WO |
2017130696 | Mar 2017 | WO |
2017118411 | Jul 2017 | WO |
2017133661 | Aug 2017 | WO |
2017157264 | Sep 2017 | WO |
2017157281 | Sep 2017 | WO |
2017165391 | Sep 2017 | WO |
2017188509 | Nov 2017 | WO |
2017195554 | Nov 2017 | WO |
2017197126 | Nov 2017 | WO |
2017197146 | Nov 2017 | WO |
2017206803 | Dec 2017 | WO |
2018047668 | Mar 2018 | WO |
2018066241 | Apr 2018 | WO |
2018067823 | Apr 2018 | WO |
2018097692 | May 2018 | WO |
2018097693 | Jul 2018 | WO |
2018184589 | Oct 2018 | WO |
2020086331 | Apr 2020 | WO |
Entry |
---|
Chen et al. “Algorithm Description of Joint Exploration Test Model 7 (JEM 7),” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 7th Meeting, Torino, IT, Jul. 13-21, 2017, document JVET-G1001, 2017. |
Chen et al. “Description of SDR, HDR and 360 degree Video Coding Technology Proposal by Qualcomm and Technicolor—low and high complexity versions,” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 10th Meeting, San Diego, US, Apr. 10-20, 2018, document JVET-J0021, 2018. |
Chen et al. “DMVR Extension baed on Template Matching,” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 10th Meeting, San Diego, US, Apr. 10-20, 2018, document JVET-J0057, 2018. |
Chien et al. “Modification of Merge Candidate Derivation,” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 2nd Meeting, San Diego, USA, Feb. 20-26, 2016, document JVET-B0058, 2016. |
He et al. “Non-SCCE1: Improved Intra Block Copy Coding with Block Vector Derivation,” Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 18th Meeting, Sapporo, JP, Jun. 30-Jul. 9, 2017, document JCTVC-R0165, 2014. |
Hsu et al. “Description of SDR Video Coding Technology Proposal by Mediatek,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 10th Meeting, San Diego, US, Apr. 10-20, 2018, document JVET-J0018, 2018. |
Li et al. “Adaptive Motion Vector Resolution for Screen Content,” Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 19th Meeting, Strasbourg, FR, Oct. 17-24, 2014, document JCTVC-S0085, 2014. |
Toma et al. “Description of SDR Video Coding Technology Proposal by Panasonic,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 10th Meetingmm San Diego, US, Apr. 10-20, 2018, document JVET-J0020, 2018. |
Xu et al. “Intra Block Copy in HEVC Screen Content Coding Extensions,” IEEE Journal on Emerging and Selected Topics in Circuits and Systems, Dec. 2016, 6(4):409-419. |
Zhang et al. “Rotate Intra Block Copy for Still Image Coding,” 2015 IEEE International Conference on Image Processing (ICIP), IEEE, Sep. 27, 2015, pp. 4102-4106. |
Zhang et al. “On Adaptive Motion Vector Resolution,” Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 20th Meeting, Geneva, CH, Feb. 10-18, 2015, document JCTVC-T0059, 2015. |
Zou et al. “Improved Affine Motion Prediction,” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP3 and ISO/IEC JTC 1/SC 29/WG 11, 3rd Meeting, Geneva, CH, May 26-Jun. 1, 2016, document JVET-C0062, 2016. |
International Search Report and Written Opinion from PCT/IB2019/054602 dated Aug. 21, 2019 (17 pages). |
International Search Report and Written Opinion from PCT/IB2019/054604 dated Sep. 26, 2019 (17 pages). |
International Search Report and Written Opinion from PCT/IB2019/054611 dated Aug. 29, 2019 (88 pages). |
International Search Report and Written Opinion from PCT/IB2019/054612 dated Sep. 26, 2019 (17 pages). |
International Search Report and Written Opinion from PCT/IB2019/054614 dated Aug. 27, 2019 (14 pages). |
International Search Report and Written Opinion from PCT/IB2019/054650 dated Oct. 28, 2019 (20 pages). |
International Search Report and Written Opinion from PCT/IB2019/054652 dated Sep. 27, 2019 (18 pages). |
International Search Report and Written Opinion from PCT/IB2019/054654 dated Aug. 27, 2019 (85 pages). |
Sullivan et al. “Meeting Report of the 18th Meeting of the Joint Collaborative Team on Video Coding (JCT-VC), Sapporo, JP, Jun. 30-Jul. 9, 2014”, Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG16 WP3 and ISO/IEC JTC1/SC29/WG11, 18th Meeting: Sapporo, JP, Jun. 30-Jul. 9, 2014, JCTVC-R, 2014. |
Non-Final Office Action from U.S. Appl. No. 17/019,629 dated Nov. 13, 2020. |
Non-Final Office Action from U.S. Appl. No. 17/031,451 dated Dec. 4, 2020. |
Notice of Allowance from U.S. Appl. No. 17/011,131 dated Dec. 10, 2020. |
Non-Final Office Action from U.S. Appl. No. 17/005,521 dated Jan. 7, 2021. |
Non-Final Office Action from U.S. Appl. No. 17/071,357 dated Sep. 21, 2021. |
Advisory Action from U.S. Appl. No. 17/074,892 dated Aug. 4, 2021. |
Final Office Action from U.S. Appl. No. 17/161,391 dated Jul. 14, 2021. |
Non-Final Office Action from U.S. Appl. No. 17/011,157 dated Nov. 17, 2020. |
Huang, Wanzhang, “Research on Side Information Generation of Distributed Video Coding,” South China University of Technology, Guangzhou, China, 2012. |
Jang et al. “Non-CE8: Modification on SbTMVP Process Regarding with CPR,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting, Marrakech, MA, Jan. 9-18, 2019, document JVET-M0335, 2019. |
Lai et al. “CE8-Related: Clarification on Interaction Between CPR and other Inter Coding Tools,” Joint Video Experts Teram (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting, Marrakech, MA, Jan. 9-18, 2019, document JVET-M0175, 2019. |
Solovyev et al. “Non-CE4: Merge Mode Modification,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 11th Meeting: Ljubljana, SI, Jul. 10-18, 2018, document JVET-K0056, 2018. |
Xu et al. “Non-CE8: Mismatch Between Text Specification and Reference Software on ATMVP Candidate Derivation When CPR is Enabled,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 29/WG 11, 13th Meeting, Marrakech, MA, Jan. 9-18, 2019, document JVET-M0409, 2019. |
Yang et al. “BOG Report on CE4 Related Contributions,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 11th Meeting: Ljubljana, SI, Jul. 10-18, 2018, document JVET-K0546, 2018. |
Zhao et al. “Intra Mini-Block Copy Algorithm for Screen Content Coding,” Journal of Computer Applications, 2016, 36(7): 1938-1943. |
Zuo et al. “Intra Block Copy for Intra-Frame Coding,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 10th Meeting: San Diego, US, Apr. 10-20, 2018, document JVET-J0042, 2018. |
Bross et al. “Versatile Video Coding (Draft 3),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11 12th Meeting, Macao, CN, Oct. 3-12, 2018. document JVET-L1001, 2018. |
Zhang et al. “AHG16: Clean-up on MV Rounding,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting, Marrakech, MA Jan. 9-18, 2019, document JVET-M0265, 2019. |
Extended European Search Report from European Patent Application No. 19882864.2 dated Mar. 21, 2022 (9 pages). |
Non Final Office Action from U.S. Appl. No. 17/019,629 dated Jun. 8, 2022. |
Final Office Action from U.S. Appl. No. 17/031,451 dated Dec. 21, 2021. |
Notice of Allowance n from U.S. Appl. No. 17/071,357 dated Feb. 2, 2022. |
Office Action from Indian Patent Application No. 202127002718 dated Jan. 6, 2022. |
Bross et al. “Versatlie Video Coding (Draft 2),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 11th Meeting, Ljubljana, SI, Jul. 10-18, 2018, document JVET-K1001, 2018. |
Bross et al. “Versatile Video Coding (Draft 4),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting, Marrakech, MA, Jan. 9-18, 2019, document JVET-M1001, 2019. |
Bross et al. “Versatile Video Coding (Draft 5),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 14th Meeting, Geneva, CH, Mar. 19-27, 2019, document JVET-N1001, 2019. |
Chen et al. “EE3: Generalized Bi-Prediction,” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 4th Meeting, Chengdu, CN, Oct. 15-21, 2016, document JVET-D0102, 2016. |
JEM-7.0: https://jvet.hhi.fraunhofer.de/svn/svn_HMJEMSoftware/tags/ HM-16.6-JEM-7.0. (only website). |
Han et al. “CE4-Related: Modification on Merge List,” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting, Marrakech, MA, Jan. 9-18, 2019, document JVET-M0127, 2019. |
Hsiao et al. “CE4.2.8: Merge Mode Enhancement,” Joint Video Experts Team (JVET of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 11th Meeting: Ljubljana, SI, Jul. 10-18, 2018, document JVET-K0245, 2018. |
Hsiao et al. “CE4.4.12: Pairwise Average Candidates,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 12th Meeting, Macao, CN, Oct. 3-12, 2018, document JVET-L0090, 2019. |
H.265/HEVC, https://www.itu.int/rec/T-REC-H.265. |
Lee et al. “Unified Condition for Affine Merge and Affine Inter Mode,” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 5th Meeting, Geneva, CH, Jan. 12-20, 2017, JVET-E0039, 2017. |
Liao et al. “CE10.1.b: Triangular Prediction Unit Mode,” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 12th Meeting, Macao, CN, Oct. 3-12, 2018, document JVET-L0124. 2018. |
Li et al. “Multi-Type-Tree.” Joint Video Exploration Team (JVET), of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 4th Meeting: Chengdu, CN, Oct. 15-21, 2016, document JVET-D0117rl, 2016. |
Li et al. “Non-CE4: Harmonization between HMVP and Gbi,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting: Marrakech, MA, Jan. 9-18, 2019, document JVET-M0264, 2019. |
Luthra et al. Overview of the H.264/AVC Video Coding Standard, Proc. SPIE, 5203, Applications of Digital Image Processing, Nov. 19, 2003, Optical Science and Technology, SPIE 48th annutal Meeting, San Diego, CA, US, 2003. |
Su et al. “CE4.4.1: Generalized Bi-Prediction for Intercoding,” Joint Video Exploration Team of ISO/IEC JTC 1/SC 29/ WG 11 and ITU-T SG 16, Ljubljana, Jul. 11-18, 2018, document No. JVET-K0248, 2018. |
Sullivan et al. “Overview of the High Efficiency Video Coding (HEVC) Standard,” IEEE Transactions on Circuits and Systems for Video Technology, Dec. 2012, 22(12):1649-1668. |
Van Der Auwera et al. “Description of Core Experiment 3: Intra Prediction and Mode Coding,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 10th Meeting, San Diego, USA, Apr. 10-20, 2018. document JVET-J1023, 2018. |
Xu et al. “CE8-Related Combination Test of JVET-N0176/JVET-N0317/JVET-N0382 on Simplification of IBC Vector Prediction,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 14th Meeting, Geneva, CH, Mar. 19-27, 2019, document JVET-N0843, 2019. |
Yang et al. “Description of Core Experiment 4 (CE4): Inter Prediction and Motion Vector Coding,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 11th Meeting, Ljubljana, SI, Jul. 10-18, 2018, document JVET-K1024, 2018. |
Zhang et al. “CE4-Related: Simplified Affine Prediction,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 11th Meeting, Ljubljana, SI, Jul. 10-18, 2018, document JVET-K0103. 2018. |
Zhang et al. “CE4-related: History-based Motion Vector Prediction”, Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 11th Meeting, Ljubljana, SI, 10-18 (Jul. 2018), Document JVET-K0104, 2018. |
Zhang et al. “CE4.2.14: Planar Motion Vector Prediction,” Joint Video Experts Team (JVET) of ITU-T SG 16 and WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 11th Meeting: Ljubljaba, SI, Jul. 10-18, 2018, document JVET-K0135, 2018. |
Zhang et al. “CE4: Affine Prediction with 4×4 Sub-blocks for Chroma Components (Test 4.1.16),” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 12th Meeting, Macao, CN, Oct. 3-12, 2018, document JVET-L0265, 2018. |
Zhang et al. “CE3-Related: Modified Chroma Derived Mode,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 12th Meeting, Macao, CN, Oct. 3-12, 2018, document JVET-L0272, 2018. |
Zhang et al. “Adaptive Motion Vector Resolution Rounding Align,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 2/WG 11, 12th Meeting, Macao, CN, Oct. 3-12, 2018, document JVET-L0377, 2018. |
Zhang et al. “BOG Report on CE4 Related Contributions,” Joint Video Experts Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 13th Meeting: Marrakech, MA, Jan. 9-18, 2019, document JVET-M0843, 2019. |
Zhou et al. “Spatial-Temporal Merge Mode (Non Subblock STMVP),” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 11th Meeting: Ljubljana, SI, Jul. 10-18, 2018, document JVET-K0532, and JVET-K0161, 2018. |
International Search Report and Written Opinion from PCT/CN2019/117116 dated Jan. 2, 2020 (9 pages). |
International Search Report and Written Opinion from PCT/CN2019/117118 dated Feb. 5, 2020 (9 pages). |
International Search Report and Written Opinion from PCT/CN2019/117119 dated Jan. 23, 2020 (9 pages). |
International Search Report and Written Opinion from PCT/IB2019/055244 dated Nov. 18, 2019 (18 pages). |
International Search Report and Written Opinion from PCT/IB2019/055246 dated Nov. 7, 2019 (18 pages). |
International Search Report and Written Opinion from PCT/IB2019/055247 dated Nov. 7, 2019 (21 pages). |
International Search Report and Written Opinion from PCT/IB2019/058078 dated Mar. 3, 2020(20 pages). |
International Search Report and Written Opinion from PCT/IB2019/058079 dated Mar. 3, 2020(26 pages). |
International Search Report and Written Opinion from PCT/IB2019/058081 dated Mar. 25, 2020(21 pages). |
Non-Final Office Action from U.S. Appl. No. 17/071,357 dated Dec. 8, 2020. |
Non-Final Office Action from U.S. Appl. No. 17/074,842 dated Dec. 23, 2020. |
Non-Final Office Action from U.S. Appl. No. 17/074,892 dated Dec. 24, 2020. |
Non-Final Office Action from U.S. Appl. No. 17/099,042 dated Dec. 31, 2020. |
Notice of Allowance from U.S. Appl. No. 17/071,412 dated Jan. 7, 2021. |
Non-Final Office Action from U.S. Appl. No. 17/161,391 dated Mar. 25, 2021. |
Chen et al. “Description of SDR, HDR and 360 degree Video Coding Technology Proposal by Huawei, GoPro, HiSilicon, and Samsung,” Joint Video Exploration Team (JVET) of ITU-T SG 16 WP 3 and ISO/IEC JTC 1/SC 29/WG 11, 10th Meeting, San Diego, US, 10-20, Apr. 2018, document JVET-J0025, 2018. |
“High Efficiency Video Coding” Series H: Audiovisual and Multimedia Systems: Infrastructure of Audiovisual Services—Coding of Moving Video, ITU-T, H.265, 2018. |
Li et al. “Affine Deformation Model Based Intra Block Copy for Intra Frame Coding,” 2020, Institute of Information and Communication Engineering, Zhejiang University. |
Alshin et al. “Bi-Directional Optical Flow for Improving Motion Compensation,” 28th Picture Coding Symposium, PCS2010, Dec. 8, 2010, Nagoya, Japan, pp. 422-425. |
Li et al. “Combining Directional Intra Prediction and Intra Block Copy with Block Partitioning for HEVC,” 2016 IEEE International Conference on Image Processing (ICIP), Phoenix, AZ, USA, 2016, pp. 524-528. |
Final Office Action from U.S. Appl. No. 17/019,629 dated Feb. 26, 2021. |
Final Office Action from U.S. Appl. No. 17/005,521 dated Apr. 26, 2021. |
Intention to Grant from British Patent Application No. 2018867.8 dated Nov. 11, 2022 (2 pages). |
Examination Report from Indian Patent Application No. 202228045435 dated Dec. 26, 2022. |
Non Final Office Action from U.S. Appl. No. 17/525,745 dated Nov. 10, 2022. |
Han et al. “A Dynamic Motion Vector Referencing Scheme for Video Coding,” 2016 IEEE International Conference on Image Processing (ICIP), 2016, pp. 2032-2036. |
Koyama et al. “Modification of Derivation Process of Motion Vector Information for Interlace Format,” Joint Collaborative Team on Video Coding (JCT-VC) of ITU-T SG16 WP3 and ISO/IEC JTC1/SC29/WG11 7th Meeting: Geneva, CH, Nov. 21-30, 2011, document JCTVC-G196, 2011. |
Shimada et al. “Non-CE9/Non-CE13: Averaged Merge Candidate,” Joint Collaborative Team on Video Coding (JCT-VC)of ITU-T SG16 WP3 and ISO/IEC JTC1/SC29/WG11 7th Meeting: Geneva, CH, Nov. 21-30, 2011, document JCTVC-G195, 2011. |
Non Final Office Action from U.S. Appl. No. 17/210,797 dated Aug. 2, 2022. |
Non Final Office Action from U.S. Appl. No. 17/412,771 dated Feb. 16, 2023. |
Non Final Office Action from U.S. Appl. No. 17/732,849 dated Mar. 2, 2023. |
Number | Date | Country | |
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20220078452 A1 | Mar 2022 | US |
Number | Date | Country | |
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Parent | 17011157 | Sep 2020 | US |
Child | 17529607 | US | |
Parent | PCT/IB2019/054614 | Jun 2019 | US |
Child | 17011157 | US |